CN102611833A - Camera sharing processing structure - Google Patents
Camera sharing processing structure Download PDFInfo
- Publication number
- CN102611833A CN102611833A CN201110085285XA CN201110085285A CN102611833A CN 102611833 A CN102611833 A CN 102611833A CN 201110085285X A CN201110085285X A CN 201110085285XA CN 201110085285 A CN201110085285 A CN 201110085285A CN 102611833 A CN102611833 A CN 102611833A
- Authority
- CN
- China
- Prior art keywords
- camera
- signal processing
- process chip
- cameras
- processing structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Studio Devices (AREA)
Abstract
The invention discloses a camera sharing processing structure, comprising a processing chip, data lines and cameras, wherein the processing chip at least comprises a signal processing input port which is electrically connected with the at least two cameras. The camera sharing processing structure has the beneficial effects that compared with the conventional structure enabling one signal processing input port to correspond to one camera, the structure disclosed by the invention enables the one signal processing input port to correspond to the two or more cameras, thereby saving cost, reducing the date lines, and reducing EMI (Electro-Magnetic Interference).
Description
Technical field
The present invention relates to a kind of field of video processing, relate in particular to the shared Processing Structure of a kind of camera.
Background technology
Existing process chip is to adopt the corresponding camera input signal of an input port to the signal of video signal processing mode of camera.If in the supervisory control system many cameras are arranged, then possibly need many process chip or adopt more high-end process chip, cause cost too high, data wire is too much, and EMI is too high.
Referring to Fig. 1, shown in the figure, this process chip comprises P1 and two signal processing input ports of P2, and the P1 port comprises 8 pins, is respectively P1.0, P1.1, P1.2, P1.3, P1.4, P1.5, P1.6, P1.7; The P2 port comprises 8 pins, is respectively P2.0, P2.1, P2.2, P2.3, P2.4, P2.5, P2.6, P2.7.8 data wires of first camera are sent into P1.0～P1.7, and 8 data wires of second camera are sent into P2.0～P2.7.Like this, the input signal that process chip input port just can only a corresponding camera.
Therefore, be badly in need of a kind of can under the prerequisite that does not increase process chip quantity or port number, with the input signal of 2 cameras of an input port correspondence, can significantly the saving cost like this, and reduce the quantity of data wire, reduce EMI.
Summary of the invention
The technical problem that the present invention mainly solves provides the shared Processing Structure of a kind of camera; This structure is under the prerequisite that does not increase process chip, and the input signal of input port corresponding 2 or above camera can be saved cost like this; And reduce the quantity of data wire, reduce EMI.
For solving the problems of the technologies described above; The technical scheme that the present invention adopts is: provide a kind of camera shared Processing Structure; Comprise process chip, data wire and camera; Said process chip comprises a signal processing input port at least, and a said signal processing input port is electrically connected with two cameras at least.
Wherein, said Processing Structure also comprises the front end signal processing module that is used for the signal of camera collection is carried out front-end processing, and said a plurality of cameras are electrically connected with a signal processing input port of process chip through a front end signal processing module.
Wherein, Said Processing Structure also comprises the front end signal processing module that is used for the signal of camera collection is carried out front-end processing; The processing terminal of the signal processing port of said process chip is divided into two groups at least, and each group is handled terminal and is electrically connected with at least two cameras through a signal processing module.
Wherein, said process chip is 8～32 bit data process chip, and each signal processing port has 8～32 and handles terminal, and the output port of each camera has 8～32 lead-out terminals.
Wherein, Said camera quantity is four; Front end signal processing module quantity is four; Process chip quantity is one; Process chip comprises the first input end mouth and second input port, and the first input end mouth comprises eight pins, and second input port comprises eight pins; It is sub that eight data wires of first camera are handled first～four-input terminal of sending into process chip first input end mouth by four data wires in the back through the first front end signal processing module; Eight data wires of second camera are handled the back through the second front end signal processing module and are sent into the five～eight input terminal of first input end mouth by four data wires, and eight data wires of the 3rd camera are sent into first～four-input terminal of second input port by four data wires after the 3rd front end signal processing module is handled sub, and eight data wires of the 4th camera are sent into the five～eight input terminal of second input port by four data wires after the processing of the 4th front end signal processing module.
Wherein, described front end signal processing module is positioned at camera inside or outside.
Wherein, said camera is the above cameras of 1,000,000 pixels.
Wherein, said camera has infrared lamp, and this camera is type camera day and night.
Wherein, said Processing Structure also comprises a synchronization module, said synchronization module to directly with a port of process chip at least two cameras being connected carry out signal Synchronization, the output of said synchronization module is electrically connected with the I/O Enable Pin of process chip.
Wherein, Said Processing Structure also comprises at least two synchronization modules; Said synchronization module to directly with a port of process chip at least two cameras being connected carry out signal Synchronization, the output of said synchronization module is electrically connected with the I/O Enable Pin of process chip.
Wherein, described synchronization module is positioned at camera inside or outside.
Wherein, said camera is the above cameras of 1,000,000 pixels.
Wherein, said camera has infrared lamp, and this camera is type camera day and night.
The invention has the beneficial effects as follows: the structure that is different from the corresponding camera of a signal processing input port of prior art; The present invention proposes the structure of the corresponding two or more cameras of a signal processing input port; Can save cost like this; And reduce the quantity of data wire, reduce EMI.
Description of drawings
Fig. 1 is the prior art constructions sketch map;
Fig. 2 is the structural representation of the embodiment of the invention one;
Fig. 3 is the structural representation of the embodiment of the invention two.
Embodiment
By specifying technology contents of the present invention, structural feature, realized purpose and effect, give explanation below in conjunction with execution mode and conjunction with figs. are detailed.
See also Fig. 2; The structural representation of the shared Processing Structure specific embodiment of camera of the present invention, shown in the figure, this process chip 1 comprises P1 and P2 signal processing input port; The P1 port comprises 8 pins, is respectively P1.0, P1.1, P1.2, P1.3, P1.4, P1.5, P1.6, P1.7; The P2 port comprises 8 pins, is respectively P2.0, P2.1, P2.2, P2.3, P2.4, P2.5, P2.6, P2.7.8 data wires of the first camera 2A are called 4 data wires and send into P1.0～P1.3 after the first front end signal processing module 3A handles; 8 data wires of the second camera 2B are called 4 data wires and send into P1.4～P1.7 after the second front end signal processing module 3B handles; 8 data wires of the 3rd camera 2C are called 4 data wires and send into P2.0～P2.3 after the 3rd front end signal processing module 3C handles, 8 data wires of the 4th camera 2D are called 4 data wires and send into P2.4～P2.7 after the 4th front end signal processing module 3D handles.Process chip comprises that also front end signal processing module control terminal KZ1, KZ2, KZ3, KZ4, front end signal processing module control terminal KZ1 are used for controlling first front end signal processing module 3A work; Front end signal processing module control terminal KZ2 is used for controlling second front end signal processing module 3B work; Front end signal processing module control terminal KZ3 is used for controlling the 3rd front end signal processing module 3C work, and front end signal processing module control terminal KZ4 is used for controlling the 4th front end signal processing module 3D work.
Certainly; A front end signal processing module can connect and connects a camera; Also can a front end signal processing module connect more than two cameras; Perhaps form tree structure or network structure,, reach the shared structure of handling port of a plurality of cameras so long as make a plurality of cameras be connected with a processing port of process chip through front end signal processing module through front end signal processing module; All should think the replacement that is equal to of the present invention, fall into protection scope of the present invention.
It is inner that the first above-mentioned front end signal processing module 3A can be positioned at the first camera 2A, as the part of internal circuit.This first front end signal processing module 3A also can be positioned at the outside of the first camera 2A, becomes peripheral circuit.
It is inner that the second above-mentioned front end signal processing module 3B can be positioned at the second camera 2B, as the part of internal circuit.This second front end signal processing module 3B also can be positioned at the outside of the second camera 2B, becomes peripheral circuit.
It is inner that the 3rd above-mentioned front end signal processing module 3C can be positioned at the 3rd camera 2C, as the part of internal circuit.The 3rd front end signal processing module 3C also can be positioned at the outside of the 3rd camera 2C, becomes peripheral circuit.
It is inner that the 4th above-mentioned front end signal processing module 3D can be positioned at the 4th camera 2D, as the part of internal circuit.The 4th front end signal processing module 3D also can be positioned at the outside of the 4th camera 2D, becomes peripheral circuit.
Above-mentioned front end signal processing module is mainly used in to be adjusted the image signal of camera, makes the gap of amplitude of signal dwindle, and the fluctuation of amplitude reduces, and makes that signal is more prone to handle.The image signal level that produces like camera is 0～255; Image signal level through after the processing of front end signal processing module becomes 0～128; So original needs take the signal of 8 pins of process chip, just only need take 4 pins of process chip after treatment.By that analogy,, can use the image signal level after front end signal processing module is handled to become littler, so that can use the corresponding a plurality of cameras of a signal processing input port if under the situation that picture quality allows.
The image signal level that camera produces also can be 0～1024; Image signal level through after the processing of front end signal processing module becomes 0～4,0～8,0～16,0～32; 0～64; 0～128,0～256 or 0～512, such signal processing input port just can corresponding a plurality of cameras.
Referring to Fig. 3; The structural representation of an alternative embodiment of the invention; Shown in the figure; The input port of process chip 1 ' is 8～32 input terminals, and the first shooting 2A ', the second camera 2B ', the 3rd camera 2C ' or the 4th camera 2D ' have 8～32 lead-out terminals, and 2～31 terminals in 8～32 lead-out terminals of this first camera 2A ', the second camera 2B ', the 3rd camera 2C ' or the 4th camera 2D ' directly are electrically connected with the input terminal of process chip 1 '.
The first camera 2A ' also has the first signal Enable Pin SK1; The second camera 2B ' also has secondary signal Enable Pin SK2; The 3rd camera 2C ' also has the 3rd signal Enable Pin SK3; The 4th camera 2D ' also has the 4th signal Enable Pin SK4; The first signal Enable Pin SK1 and secondary signal Enable Pin SK2 through synchronization module 4A ' carry out with logical operation after send into first group of I/O mouth Enable Pin of process chip, the 3rd signal Enable Pin SK3 and the 4th signal Enable Pin SK4 through synchronization module 4B ' carry out with logical operation after send into second group of I/O mouth Enable Pin of process chip.Process chip also has synchronization module control terminal KT1 and KT2, and control terminal KT1 is used for controlling synchronization module 4A ' work, and control terminal KT2 is used for controlling synchronization module 4B ' work.
Certainly; A synchronization module can connect a camera, also can connect more than two cameras by a synchronization module, perhaps forms tree structure or network structure through synchronization module; So long as make a plurality of cameras be connected with a processing port of process chip through synchronization module; Reach the shared structure of handling port of a plurality of cameras, all should think the replacement that is equal to of the present invention, fall into protection scope of the present invention.
Above-mentioned camera can be the camera below 1,000,000, further also can be the camera more than 1,000,000 pixels.Further, this camera can have infrared lamp, makes this camera become day and night type camera.
Therefore, the present invention proposes the new structure of the corresponding two or more cameras of a signal processing input port, can save cost like this, and reduce the quantity of data wire, reduce EMI.
Camera of the present invention is construed as a kind of CIS, and this CIS can be the inducing pixel of rectangular array, the CIS that also can arrange for horizontal linear inducing pixel or vertically linear inducing pixel.
The above is merely embodiments of the invention; Be not so limit claim of the present invention; Every equivalent structure or equivalent flow process conversion that utilizes specification of the present invention and accompanying drawing content to be done; Or directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the present invention.
Claims (13)
1. the shared Processing Structure of camera is characterized in that, comprises process chip, data wire and camera, and said process chip comprises a signal processing input port at least, and a said signal processing input port is electrically connected with two cameras at least.
2. the shared Processing Structure of camera according to claim 1; It is characterized in that: said Processing Structure also comprises the front end signal processing module that is used for the signal of camera collection is carried out front-end processing, and said a plurality of cameras are electrically connected with a signal processing input port of process chip through a front end signal processing module.
3. the shared Processing Structure of camera according to claim 1; It is characterized in that: said Processing Structure also comprises the front end signal processing module that is used for the signal of camera collection is carried out front-end processing; The processing terminal of the signal processing port of said process chip is divided into two groups at least, and each group is handled terminal and is electrically connected with at least two cameras through a signal processing module.
4. according to the shared Processing Structure of each described camera of claim 1～3; It is characterized in that: said process chip is 8～32 bit data process chip; Each signal processing port has 8～32 and handles terminal, and the output port of each camera has 8～32 lead-out terminals.
5. the shared Processing Structure of camera according to claim 4; It is characterized in that: said camera quantity is four; Front end signal processing module quantity is four; Process chip quantity is one; Process chip comprises the first input end mouth and second input port; The first input end mouth comprises eight pins; Second input port comprises eight pins, and eight data wires of first camera are handled the back through the first front end signal processing module and sent into first～four-input terminal of process chip first input end mouth by four data wires, and eight data wires of second camera are sent into the five～eight input terminal of first input end mouth by four data wires after the processing of the second front end signal processing module; Eight data wires of the 3rd camera are handled the back through the 3rd front end signal processing module and are sent into first～four-input terminal of second input port by four data wires, and eight data wires of the 4th camera are sent into the five～eight input terminal of second input port by four data wires after the processing of the 4th front end signal processing module.
6. the shared Processing Structure of camera according to claim 5 is characterized in that: it is inner or outside that described front end signal processing module is positioned at camera.
7. the shared Processing Structure of camera according to claim 6 is characterized in that: said camera is the above cameras of 1,000,000 pixels.
8. the shared Processing Structure of camera according to claim 7, it is characterized in that: said camera has infrared lamp, and this camera is type camera day and night.
9. the shared Processing Structure of camera according to claim 1; It is characterized in that; Said Processing Structure also comprises a synchronization module; Said synchronization module to directly with a port of process chip at least two cameras being connected carry out signal Synchronization, the output of said synchronization module is electrically connected with the I/O Enable Pin of process chip.
10. the shared Processing Structure of camera according to claim 1; It is characterized in that; Said Processing Structure also comprises at least two synchronization modules; Said synchronization module to directly with a port of process chip at least two cameras being connected carry out signal Synchronization, the output of said synchronization module is electrically connected with the I/O Enable Pin of process chip.
11. according to claim 9 or the shared Processing Structure of 10 described cameras, it is characterized in that: it is inner or outside that described synchronization module is positioned at camera.
12. the shared Processing Structure of camera according to claim 11 is characterized in that: said camera is the above cameras of 1,000,000 pixels.
13. the shared Processing Structure of camera according to claim 12 is characterized in that: said camera has infrared lamp, this camera is type camera day and night.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110085285.XA CN102611833B (en) | 2011-04-06 | Photographic head shares and processes structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110085285.XA CN102611833B (en) | 2011-04-06 | Photographic head shares and processes structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102611833A true CN102611833A (en) | 2012-07-25 |
| CN102611833B CN102611833B (en) | 2016-12-14 |
Family
ID=
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101316210A (en) * | 2008-06-26 | 2008-12-03 | 河海大学 | Multi-cam biomechanism-imitated intelligent perception broadband wireless mesh network |
| CN101335787A (en) * | 2008-08-06 | 2008-12-31 | 青岛海信移动通信技术股份有限公司 | Communication apparatus and camera controlling method thereof |
| CN101674400A (en) * | 2008-09-12 | 2010-03-17 | 深圳市经纬科技有限公司 | Camera system and method thereof |
| CN201758429U (en) * | 2010-08-17 | 2011-03-09 | 西安理工大学 | Vehicular rearview panorama system based on digital signal processor |
| JP4706466B2 (en) * | 2005-12-16 | 2011-06-22 | 株式会社日立製作所 | Imaging device |
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4706466B2 (en) * | 2005-12-16 | 2011-06-22 | 株式会社日立製作所 | Imaging device |
| CN101316210A (en) * | 2008-06-26 | 2008-12-03 | 河海大学 | Multi-cam biomechanism-imitated intelligent perception broadband wireless mesh network |
| CN101335787A (en) * | 2008-08-06 | 2008-12-31 | 青岛海信移动通信技术股份有限公司 | Communication apparatus and camera controlling method thereof |
| CN101674400A (en) * | 2008-09-12 | 2010-03-17 | 深圳市经纬科技有限公司 | Camera system and method thereof |
| CN201758429U (en) * | 2010-08-17 | 2011-03-09 | 西安理工大学 | Vehicular rearview panorama system based on digital signal processor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103201764B (en) | Use the data localized of multiple processor | |
| CN102226943B (en) | System and method for realizing screen splicing | |
| CN206865611U (en) | Video-splicing processor | |
| CN102006420B (en) | Design method capable of using external synchronous cameral with various data output formats | |
| CN105516624A (en) | Multi-core digital signal processor (DSP) based multi-channel image acquisition processing system | |
| CN207218845U (en) | Look around camera device | |
| CN105659594A (en) | Data processing apparatus for transmitting/receiving compressed pixel data groups of picture and indication information of pixel data grouping setting and related data processing method | |
| CN104978929A (en) | Point-by-point correcting method of LED display device, system architecture for correcting, and controller | |
| CN104104827A (en) | High-precision large-format scanner photoelectric image processing system and implementation method thereof | |
| CN106952609A (en) | Display system and displaying screen controller | |
| CN204517977U (en) | A kind of handheld device, external picture pick-up device and data transmission system | |
| CN102611833A (en) | Camera sharing processing structure | |
| CN105681685A (en) | Signal processor and system and implementation method of picture in picture and multi-screen display | |
| CN102611833B (en) | Photographic head shares and processes structure | |
| WO2016150285A1 (en) | Optical transmission device and apparatus, and method for designing optical transmission device | |
| CN110418079A (en) | Image signal conversion equipment | |
| CN103313029A (en) | Terminal for video conference | |
| CN201986081U (en) | 3-dimensional signal processing module and television | |
| CN104461428A (en) | Multi-channel DVI (digital Visual Interface) image fusion correction control host | |
| CN209086898U (en) | A kind of video KVM equipment of novel VPX framework | |
| CN203827441U (en) | Multipurpose module for TV set | |
| CN103327300A (en) | Audio/video transmission system and method based on USB 2.0 protocol | |
| CN207491126U (en) | A kind of data distribution system available for LED display | |
| CN105338234A (en) | Endoscopic intelligent camera | |
| CN101729884A (en) | Image acquiring device and image preprocessing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |