CN102468309B - Complementary metal-oxide-semiconductor (CMOS) image sensor, and forming method thereof - Google Patents
Complementary metal-oxide-semiconductor (CMOS) image sensor, and forming method thereof Download PDFInfo
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- CN102468309B CN102468309B CN201010532663.XA CN201010532663A CN102468309B CN 102468309 B CN102468309 B CN 102468309B CN 201010532663 A CN201010532663 A CN 201010532663A CN 102468309 B CN102468309 B CN 102468309B
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Abstract
The invention discloses a complementary metal-oxide-semiconductor (CMOS) image sensor, and a forming method thereof. The CMOS image sensor comprises a substrate, photodiodes and transistors which are formed on the substrate, a dielectric layer, interconnection structures, grooves, and organic materials, wherein the transistors are connected with the photodiodes; the dielectric layer is formed on the substrate; the interconnection structures are formed in the dielectric layer and are connected with the transistors; the grooves are formed in the dielectric layer and positioned above the photodiodes; and the organic materials are filled into the grooves. The light which is received by the photodiodes can be increased, and imaging quality can be improved.
Description
Technical field
The present invention relates to technical field of semiconductors, relate in particular to cmos image sensor and forming method thereof.
Background technology
Imageing sensor receiving optical signals and light signal is converted to the signal of telecommunication, then the signal of telecommunication can be transmitted for further processing, such as digitlization, then in the memory such as memory, CD, store, or for demonstration, printing etc. on display.Imageing sensor is generally used for the devices such as digital camera, video camera, scanner, facsimile machine.Imageing sensor is the important component part that forms digital camera, according to element difference, be divided into charge coupled cell (CCD, Charge Coupled Device) imageing sensor and metal oxide semiconductor device (CMOS, Complementary Metal-Oxide Semiconductor) imageing sensor.
Development along with semiconductor technology, the design rule of COMS imageing sensor is proportional decline also, therefore the design of pixel (pixel) circuit of cmos image sensor also becomes increasingly complex, and the metal interconnecting layer in the metal interconnect structure of pixel region develops into present three layer metal interconnect by double layer of metal interconnection before.Fig. 1 is the cross-sectional view of the cmos image sensor of existing three layer metal interconnect, in Fig. 1, only show a part of pixel region, and peripheral logical circuit district is not shown, with reference to figure 1, existing cmos image sensor comprises: silicon substrate 10, in silicon substrate 10, be formed with photodiode 11, and the transistor 12 that comprises source region 121, drain region 122 and grid 123; On the surface of silicon substrate 10 and grid 123, be formed with dielectric layer 13, in dielectric layer 13, be formed with interconnection structure 14, this interconnection structure 14 comprises the plug (there is no label in figure) of three layer metal interconnect line 141,142,143 and connection metal interconnection line and transistor 12; On dielectric layer 13 surfaces, forming colour has colour filter 15, and this chromatic color filter 15 is divided into a plurality of pixel cells, and each pixel cell comprises R, G, B sub-pixel area; On chromatic color filter 15, be formed with lens 16, corresponding each sub-pixel area is formed with lens 16.
Light is injected after lens 16, through lens 16, colour filter 15 and dielectric layer 13, arrive photodiode 11, photodiode 11 is converted to the signal of telecommunication by light signal, the signal of telecommunication is sent to peripheral logical circuit (not shown) through transistor 12 and interconnection structure 14, peripheral logical circuit to Electric signal processing after output image.
Development due to semiconductor technology, device size is more and more less, cause wiring complicated, the interconnecting metal layer of pixel region develops into three layers by two-layer, the cmos image sensor of above-described prior art, metal interconnect structure comprises three layer metal interconnect line and connection metal interconnection line and transistorized plug, complexity due to interconnection structure, can cause dot structure to complicate, and the area of each sub-pixel area diminishes, the light that each sub-pixel area receives tails off, the light of injecting accordingly photodiode also tails off, this will affect photo-quantum efficiency (light quantum efficiency), and modal noise (pattem noise) is more and more obvious.Based on above reason, finally can affect the effect of imaging.
In May, 2010, the Granted publication number of Granted publication on the 12nd was " CN101197320B " Chinese patent discloses a kind of " manufacture method of cmos image sensor and cmos image sensor ", yet, do not solve above-described technical problem.
Summary of the invention
The problem that the present invention solves is that the light that the cmos image sensor of prior art is injected photodiode tails off.
For addressing the above problem, the invention provides a kind of cmos image sensor, comprising:
Substrate, is formed at photodiode, the transistor of described substrate, and photodiode connects described in described transistor AND gate;
Dielectric layer, is formed in described substrate;
Interconnection structure, is formed in described dielectric layer, is connected with described transistor;
Also comprise:
Groove, is formed at described dielectric layer, is positioned at described photodiode top;
Organic material, is filled in described groove.
Optionally, described groove comprises top and bottom, and the opening at described top is greater than the opening of described bottom.
Optionally, described top is bowl-shape.
Optionally, the refractive index of described organic material is greater than the refractive index of described dielectric layer.
Optionally, described dielectric layer is silicon dioxide; On described silicon dioxide, be formed with silicon nitride.
Optionally, the refractive index of described organic material is greater than 1.65.
Optionally, diffusion impervious layer, is formed at the surface of sidewall and bottom and the described dielectric layer of described groove, and the refractive index of described diffusion impervious layer is greater than the refractive index of described dielectric layer.
Optionally, the material of described diffusion impervious layer is silicon nitride.
Optionally, also comprise colored filter, be positioned on described dielectric layer.
Optionally, also comprise lens, be positioned on described colored filter, and be positioned at described photodiode top.
Optionally, described interconnection structure comprises three layer metal interconnect line and connects described three layer metal interconnect line, transistorized plug.
The present invention also provides a kind of method that forms cmos image sensor, comprising:
Substrate is provided, is formed with photodiode, transistor in described substrate, photodiode connects described in described transistor AND gate;
In described silicon base, form dielectric layer, and form interconnection structure in described dielectric layer, described interconnection structure is connected with described transistor;
Also comprise:
In described dielectric layer, form groove, described groove is positioned at described photodiode top;
In described groove, fill organic material.
Optionally, described groove comprises top and bottom, and the opening at described top is greater than the opening of described bottom.
Optionally, described top is bowl-shape.
Optionally, the refractive index of described organic material is greater than the refractive index of described dielectric layer.
Optionally, described dielectric layer is silicon dioxide; On described silicon dioxide, be formed with silicon nitride.
Optionally, the refractive index of described organic material is greater than 1.65.
Optionally, the method that forms groove in described dielectric layer is:
With photoetching, etching technics, at described dielectric layer, form opening;
Utilize spin coating proceeding to form photoresist on described dielectric layer He in described opening;
Photoresist and dielectric layer described in etching, afterwards, remove the photoresist not being etched away and form groove.
Optionally, also comprise: form diffusion impervious layer, be formed at sidewall, bottom and the described dielectric layer surface of described groove; The refractive index of described diffusion impervious layer is greater than the refractive index of described dielectric layer.
Optionally, the material of described diffusion impervious layer is silicon nitride.
Optionally, also comprise: form colored filter, be positioned on described dielectric layer.
Optionally, also comprise formation lens, be positioned on described colored filter, and be positioned at described photodiode top.
Optionally, described interconnection structure comprises three layer metal interconnect line and connects described three layer metal interconnect line, transistorized plug.
Compared with prior art, the present invention has the following advantages:
Cmos image sensor of the present invention, dielectric layer above photodiode forms groove, and in groove, fill organic material, thereby after in light is injected groove, be incident in the light of recess sidewall, some can inject photodiode after reflection, refraction, compared with prior art, can increase like this light amount that photodiode receives.
And in specific embodiments of the invention, groove comprises top and bottom, the opening at described top is greater than the opening of described bottom, because the opening at top is greater than the opening of bottom, can be added to the light being incident upon in groove, thereby can further increase the light of injecting photodiode.
And, in the specific embodiment of the invention, the refractive index of organic material is greater than the material of dielectric layer, be incident in the light of recess sidewall, at the light being greater than within the scope of critical angle, can all inject photodiode, and also some can inject photodiode after superrefraction to be less than light within the scope of critical angle, the further like this light amount that can increase photodiode reception, better improves image quality.
Accompanying drawing explanation
Fig. 1 is the cross-sectional view of the cmos image sensor of prior art;
Fig. 2 is the flow chart of method of the formation cmos image sensor of the specific embodiment of the invention;
Fig. 3 a～Fig. 3 g is the cross-sectional view of the formation cmos image sensor of the specific embodiment of the invention;
Fig. 4 is the cross-sectional view of groove;
Fig. 5 is the index path that light of the present invention is injected recess sidewall.
Embodiment
Cmos image sensor of the specific embodiment of the invention and forming method thereof, dielectric layer above photodiode forms groove, and in groove, fill organic material, thereby after in light is injected groove, be incident in the light of recess sidewall, some can inject photodiode after reflection, refraction, compared with prior art, can increase like this light amount that photodiode receives.
At the light being greater than within the scope of critical angle, can all inject photodiode, and also some can inject photodiode after superrefraction to be less than light within the scope of critical angle, can increase like this light amount that photodiode receives.
For those skilled in the art be can better understand the present invention, below in conjunction with accompanying drawing, describe the method for the formation cmos image sensor of the specific embodiment of the invention in detail.
Fig. 2 is the flow chart of method of the formation cmos image sensor of the specific embodiment of the invention, and with reference to figure 2, the method for the formation cmos image sensor of the specific embodiment of the invention comprises:
Step S1, provides substrate, is formed with photodiode, transistor in described substrate, and photodiode connects described in described transistor AND gate;
Step S2 forms dielectric layer in described substrate, and forms interconnection structure in described dielectric layer, and described interconnection structure is connected with described transistor;
Step S3, forms groove at described dielectric layer, and described groove is positioned at described photodiode top;
Step S4 fills organic material in described groove.
The cross-sectional view of the formation cmos image sensor that Fig. 3 a～Fig. 3 g is the specific embodiment of the invention, for the embodiment that those skilled in the art be can better understand the present invention, below in conjunction with specific embodiment and Fig. 2, Fig. 3 a～Fig. 3 g, describe the method for the formation cmos image sensor of the specific embodiment of the invention in detail.
In conjunction with reference to figure 2 and Fig. 3 a, perform step S1, substrate 30 is provided, in described substrate 30, be formed with photodiode 31, transistor 32, described transistor 32 is connected with described photodiode 31.With reference to figure 3a, substrate 30 is provided, the material of this substrate 30 can be silicon or the SiGe of monocrystalline or non crystalline structure; Also can be silicon-on-insulator (SOI); Or the material that can also comprise other, such as III-V compounds of group such as GaAs.Provide after substrate 30, at the interior formation photodiode 31 of substrate 30, and form transistor 32 in substrate 30, transistor 32 comprises source electrode 321, drain electrode 322 and grid 323, source electrode 321 and drain electrode 322 are formed in substrate 30, and source electrode 321 or drain electrode 322 are connected with photodiode 31, and grid 323 is formed in substrate 30, between substrate 30 and grid 323, is also formed with gate dielectric layer (not shown).Wherein, the known technology that the method that forms photodiode 31 and transistor 32 is those skilled in the art, does not elaborate at this.
In conjunction with reference to figure 2 and Fig. 3 b, perform step S2, in described substrate 30, form dielectric layer 33, and form interconnection structure 34 in described dielectric layer 33, described interconnection structure 34 is connected with described transistor 32.With reference to figure 3b, interconnection structure 34 comprises: the first metal interconnecting wires 341, the second metal interconnecting wires 342, the 3rd metal interconnecting wires 343, the first plug 344, the second plug 345 and the 3rd plug 346.The first plug 344 is connected with grid 343 with source electrode 341, drain electrode 342, and is connected with the first metal interconnecting wires 341; The second metal interconnecting wires 342 is connected with the first plug 344 with the first metal interconnecting wires 341 by the second plug 345; The 3rd metal interconnecting wires 343 is connected with the second plug 345 with the second metal interconnecting wires 342 by the 3rd plug 346.
The concrete grammar that forms dielectric layer 33 and interconnection structure 34 is: in substrate 30, form first medium layer (in figure not label), in first medium layer, form through hole, in through hole, fill metal, for example tungsten, forms the first plug 344 and is connected with grid 323 with described source electrode 321, drain electrode 322 respectively; On first medium layer, form metal level afterwards, metal aluminium lamination for example, metal level forms the first metal interconnecting wires 341 described in photoetching, etching.Then, on first medium layer, form second medium layer (in figure not label), in second medium layer, form through hole, in through hole, fill metal, for example tungsten, forms the second plug 345, be connected with corresponding the first plug 344 with first metal interconnecting wires 341 and (in figure, do not illustrate and being connected of the first plug, according to the layout of interconnection structure, the second plug 345 can be connected with the first metal interconnecting wires 341, also can be connected with corresponding the first plug 344); On second medium layer, form metal level afterwards, metal aluminium lamination for example, metal level forms the second metal interconnecting wires 342 described in photoetching, etching.Then, on second medium layer, form the 3rd dielectric layer (in figure not label), in the 3rd dielectric layer, form through hole, in through hole, fill metal, for example tungsten, forms the 3rd plug 346, be connected with corresponding the second plug 345 with the second metal interconnecting wires 342 and (in figure, do not illustrate and being connected of the second plug, according to the layout of interconnection structure, the 3rd plug 346 can be connected with the second metal interconnecting wires 342, also can be connected with corresponding the second plug 345); On the 3rd dielectric layer, form metal level afterwards, metal aluminium lamination for example, metal level forms the 3rd metal interconnecting wires 343 described in photoetching, etching.Wherein, first medium layer, second medium layer and the 3rd dielectric layer have formed dielectric layer 33.In the specific embodiment of the invention, the material of dielectric layer 33 is silicon dioxide, and the material of first medium layer, second medium layer and the 3rd dielectric layer is silicon dioxide, certainly, and the other materials that also can be known to the skilled person.The aluminium interconnection technique that the method for above-described formation interconnection structure is known to the skilled person, in other embodiments, the method that forms interconnection structure can be also dual-damascene technics.
In conjunction with reference to figure 2 and Fig. 3 e, perform step S3, at described dielectric layer 33, form grooves 37, described groove 37 is positioned at described photodiode 31 tops.It should be noted that, in this specific embodiment of the present invention, the degree of depth of the degree of depth of groove 37 and dielectric layer 33 is basic identical, in other embodiments of the invention, the degree of depth of groove 37 also can be greater than the degree of depth of dielectric layer 33, that is to say that groove 37 can extend to other layer of (not shown) between substrate and dielectric layer 33.Fig. 4 is the schematic diagram of groove 37, and in conjunction with reference to figure 4, in specific embodiments of the invention, the groove 37 in dielectric layer 33 comprises bottom 371 and top 372, and the opening at described top 372 is greater than the opening of described bottom 371.In this specific embodiment, described bottom 371 is column, top 372 is bowl-shape, and the height d of bottom 371 is 2 microns (μ m), the width c of bottom 371 is 1.5 microns (μ m), the width a on the bowl limit at top 372 is 0.5 micron (μ m), and the height b on bowl limit is 0.3 micron (μ m).
In the specific embodiment of the invention, the method that forms groove 37 is:
With reference to figure 3c, with photoetching, etching technics, at described dielectric layer 33, form opening 35.Be specially: on described dielectric layer 33, form photoresist layer (not shown), then graphical described photoresist layer (not shown), take patterned photoresist layer as mask, described in etching, dielectric layer 33, at dielectric layer 33, form opening 35, utilize afterwards cineration technics to remove photoresist.
With reference to figure 3d, utilize spin coating photoresist process on described dielectric layer 33 and the interior formation photoresist 36 of described opening 35.The height of photoresist 36 in opening 35 can be determined according to actual needs, it highly can not affect the present invention, key of the present invention is while utilizing spin coating proceeding to form photoresist, photoresist 362 on the Thickness Ratio dielectric layer 33 of opening 35 and the photoresist 361 of the corner of dielectric layer 33, and the feature of the thin thickness of the photoresist in opening 35 363, with reference to figure 3e, after etching photoresist 36, in the etching technics of dielectric layer 33, dry etching photoresist 36, after the thin location 361 of the photoresist on dielectric layer 33 is etched, continue the dielectric layer 33 that etching is not hidden by photoresist 36, place by a kind of like this mode etching dielectric layer 33 at the top of opening 35, thereby form the groove 37 that top 372 width are greater than bottom 371 width, utilize afterwards cineration technics to remove the photoresist not being etched away, form groove 37.Therefore, after forming photoresist 36, utilize dry etch process etching photoresist 36 and dielectric layer 33, then, remove the photoresist not being etched away, form groove 37.
Form after groove 37, in conjunction with reference to figure 2 and Fig. 3 f, perform step S4, at the interior filling organic material 39 of described groove 37.Wherein, the refractive index of organic material is greater than the refractive index of dielectric layer.In specific embodiments of the invention, before the interior filling organic material 39 of groove 37, also be included on groove 37 and dielectric layer 33 and form SiN diffusion impervious layer 38, this diffusion impervious layer 38 is to prevent that the organic material of filling from diffusing to dielectric layer 33, thereby affects the performance of device.In the present invention, the refractive index of diffusion impervious layer 38 is greater than the refractive index of dielectric layer.After the interior filling organic material 39 of groove 37, utilize flatening process to carry out planarization until expose diffusion impervious layer 38 to organic material 39.In specific embodiments of the invention, dielectric layer material is silicon dioxide, and its refractive index is 1.46, and the material of diffusion impervious layer is silicon nitride, and its refractive index is 2.05, and the refractive index of the organic material 39 of filling is greater than 1.65.
With reference to figure 3g, the method of formation cmos image sensor of the present invention, after the interior filling organic material 39 of groove 37, also comprise: on the surface of diffusion impervious layer 38 and organic material 39, form colored filter 41, this chromatic color filter 41 is divided into a plurality of pixel cells, and each pixel cell comprises R, G, B sub-pixel area.After forming colored filter 40, also comprise and form lens 42, be positioned at described colored filter 41 surfaces upper, and be positioned at described photodiode 31 tops, corresponding each sub-pixel area is formed with lens 42.The method that forms colored filter 41 and lens 42 is known to the skilled person technology, at this, is not described in detail.
The cmos image sensor forming according to the method for formation cmos image sensor of the present invention, when there being light, inject lens, while injecting in groove via colored filter, silicon nitride diffusion impervious layer and dielectric layer, owing to filling organic material in groove, thereby after in light is injected groove, be incident in the light of recess sidewall, some can inject photodiode after reflection, refraction, compared with prior art, can increase like this light amount that photodiode receives.
And, in the specific embodiment of the invention, the refractive index of organic material is greater than the material of dielectric layer, be incident in the light of recess sidewall, at the light being greater than within the scope of critical angle, can all inject photodiode, and also some can inject photodiode after superrefraction to be less than light within the scope of critical angle, the further like this light amount that can increase photodiode reception, better improves image quality.Fig. 5 is the index path that light of the present invention is injected part recess sidewall, wherein, the refractive index of the transparent material 39 of filling is 1.85, the refractive index of silica dioxide medium layer 33 is 1.46, the refractive index of SiN diffusion impervious layer 38 is 2.05, in diagram, light is that the light that is incident to trenched side-wall occurs after total reflection on the interface of dielectric layer 33 and diffusion impervious layer 38, through refraction, be incident to again in groove, then inject photodiode, therefore at the light being greater than within the scope of critical angle, all can on the interface of dielectric layer 33 and diffusion impervious layer 38, occur after total reflection, through refraction, be incident to again in groove, can increase the light of finally injecting photodiode like this, thereby can improve image quality.
And, in specific embodiments of the invention, groove comprises top and bottom, the opening at described top is greater than the opening of described bottom, because the opening at top is greater than the opening of bottom, the light that is incident to top via a series of reflection after, still some light can be injected photodiode, can further increase the light of injecting photodiode like this.
Based on above-described spirit of the present invention, the present invention also provides a kind of cmos image sensor, and with reference to figure 3g, cmos image sensor comprises: substrate 30, be formed at photodiode 31, the transistor 32 of described substrate 30, described transistor 32 is connected with described photodiode 31; Dielectric layer 33, is formed in described substrate 30; Interconnection structure 34 (in conjunction with reference to figure 3b), is formed in described dielectric layer 33, is connected with described transistor 32; Also comprise: groove, be formed at described dielectric layer 33, be positioned at described photodiode top; Organic material 39, is filled in described groove.Cmos image sensor of the present invention, dielectric layer above photodiode forms groove, and in groove, fill organic material, thereby after in light is injected groove, be incident in the light of recess sidewall, some can inject photodiode after reflection, refraction, compared with prior art, can increase like this light amount that photodiode receives.
In the specific embodiment of the invention, the material of this substrate 30 can be silicon or the SiGe of monocrystalline or non crystalline structure; Also can be silicon-on-insulator (SOI); Or the material that can also comprise other, such as III-V compounds of group such as GaAs.
In the specific embodiment of the invention, transistor 32 comprises source electrode 321, drain electrode 322 and grid 323, and source electrode 321 and drain electrode 322 are formed in substrate 30, and source electrode 321 and draining 322 is connected with photodiode 31, and grid 323 is formed in substrate 30.
In the specific embodiment of the invention, interconnection structure 34 (in conjunction with reference to figure 3b) comprising: the first metal interconnecting wires 341, the second metal interconnecting wires 342, the 3rd metal interconnecting wires 343, the first plug 344, the second plug 345 and the 3rd plug 346; The first plug 344 is connected with grid 343 with source electrode 341, drain electrode 342, the first metal interconnecting wires 341 is connected with the first plug, the second metal interconnecting wires 342 is connected with the first plug 344 with the first metal interconnecting wires 341 by the second plug 345, and the 3rd metal interconnecting wires 343 is connected with the second plug 345 with the second metal interconnecting wires 342 by the 3rd plug 346.
In conjunction with reference to figure 4, in the specific embodiment of the invention, the groove 37 in dielectric layer 33 comprises bottom 371 and top 372, and the opening at described top 372 is greater than the opening of described bottom 371.In this specific embodiment, described bottom 371 is column, top 372 is bowl-shape, and the height d of bottom 371 is 2 microns (μ m), the width c of bottom 371 is 1.5 microns (μ m), the width a on the bowl limit at top 372 is 0.5 micron (μ m), and the height b on bowl limit is 0.3 micron (μ m).In specific embodiments of the invention, groove comprises top and bottom, and the opening at described top is greater than the opening of described bottom, because the opening at top is greater than the opening of bottom, the light being incident upon in groove can be added to, thereby the light of injecting photodiode can be further increased.
And, in the specific embodiment of the invention, on groove 37 and dielectric layer 33, forming SiN diffusion impervious layer 38, this diffusion impervious layer 38 is to prevent that the organic material of filling from diffusing to dielectric layer 33, thereby affects the performance of device.
In the specific embodiment of the invention, the refractive index of diffusion impervious layer is greater than the refractive index of dielectric layer, and the refractive index of organic material is greater than the refractive index of dielectric layer.In one embodiment, dielectric layer material is silicon dioxide, and its refractive index is 1.46, and the material of diffusion impervious layer is silicon nitride, and its refractive index is 2.05, and the refractive index of organic material is greater than 1.65.Be incident in the light of recess sidewall, at the light being greater than within the scope of critical angle, can all inject photodiode, and, also some can inject photodiode after superrefraction to be less than light within the scope of critical angle, the further like this light amount that can increase photodiode reception, better improves image quality.
In the specific embodiment of the invention, cmos image sensor also comprises colored filter 41, is positioned on described dielectric layer 33, due in specific embodiments of the invention, on dielectric layer 33, be formed with diffusion impervious layer, so colored filter 41 is formed on dielectric layer 33 and is formed with on diffusion impervious layer.Also comprise lens 42, be positioned on described colored filter 41, and be positioned at described photodiode 31 tops.
Although the present invention with preferred embodiment openly as above; but it is not for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can utilize method and the technology contents of above-mentioned announcement to make possible change and modification to technical solution of the present invention; therefore; every content that does not depart from technical solution of the present invention; any simple modification, equivalent variations and the modification above embodiment done according to technical spirit of the present invention, all belong to the protection range of technical solution of the present invention.
Claims (9)
1. a method that forms cmos image sensor, comprising:
Substrate is provided, is formed with photodiode, transistor in described substrate, photodiode connects described in described transistor AND gate;
In described substrate, form dielectric layer, and form interconnection structure in described dielectric layer, described interconnection structure is connected with described transistor;
It is characterized in that, also comprise:
In described dielectric layer, form groove, described groove is positioned at described photodiode top; Described groove comprises top and bottom, and the opening that described top is bowl-shape and described top is greater than the opening of described bottom;
The method that forms groove in described dielectric layer is:
With photoetching, etching technics, at described dielectric layer, form opening;
Utilize spin coating proceeding to form photoresist on described dielectric layer He in described opening, the thin thickness of the photoresist on the Thickness Ratio dielectric layer of the photoresist of opening and dielectric layer corner and in opening;
Photoresist described in dry etching, after the thin location of the photoresist on dielectric layer is etched, continues the dielectric layer that etching is not hidden by photoresist, afterwards, removes the photoresist not being etched away and forms groove;
In described groove, fill organic material.
2. the method for formation cmos image sensor as claimed in claim 1, is characterized in that, the refractive index of described organic material is greater than the refractive index of described dielectric layer.
3. the method for formation cmos image sensor as claimed in claim 2, is characterized in that, described dielectric layer is silicon dioxide; Described silica surface is formed with silicon nitride.
4. the method for formation cmos image sensor as claimed in claim 3, is characterized in that, the refractive index of described organic material is greater than 1.65.
5. the method for formation cmos image sensor as claimed in claim 2, is characterized in that, also comprises: form diffusion impervious layer, be formed at sidewall, bottom and the described dielectric layer surface of described groove; The refractive index of described diffusion impervious layer is greater than the refractive index of described dielectric layer.
6. the method for formation cmos image sensor as claimed in claim 5, is characterized in that, the material of described diffusion impervious layer is silicon nitride.
7. the method for formation cmos image sensor as claimed in claim 1, is characterized in that, also comprises: form colored filter, be positioned on described dielectric layer.
8. the method for formation cmos image sensor as claimed in claim 7, is characterized in that, also comprises formation lens, is positioned on described colored filter surface, and is positioned at described photodiode top.
9. the method for formation cmos image sensor as claimed in claim 1, is characterized in that, described interconnection structure comprises three layer metal interconnect line and connects described three layer metal interconnect line, transistorized plug.
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| CN115995478B (en) * | 2023-03-24 | 2023-06-27 | 合肥新晶集成电路有限公司 | Image sensor and method for manufacturing the same |
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