CN102270646A - Backside illuminated CMOS imaging sensor - Google Patents
Backside illuminated CMOS imaging sensor Download PDFInfo
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- CN102270646A CN102270646A CN2010101975231A CN201010197523A CN102270646A CN 102270646 A CN102270646 A CN 102270646A CN 2010101975231 A CN2010101975231 A CN 2010101975231A CN 201010197523 A CN201010197523 A CN 201010197523A CN 102270646 A CN102270646 A CN 102270646A
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Abstract
The invention provides a backside illuminated imaging sensor of a complementary metal-oxide semiconductor (CMOS). The sensor comprises: a semiconductor substrate, which has a first surface and a second surface that is opposite to the first surface and has at least one pixel unit area; and an isolation structure, which is between adjacent pixel unit areas; besides, the isolation structure is a deeply grooved isolation structure that penetrates the first surface and the second surface of the semiconductor substrate. According to the invention, interference of electric signals between the adjacent pixel unit areas can be reduced; a display bleaching phenomenon of the CMOS imaging sensor can be improved; and imaging quality can be enhanced.
Description
Technical field
The present invention relates to imageing sensor, particularly the cmos image sensor of photodetector for backside-illuminated.
Background technology
Imageing sensor is an important component part of forming digital camera, be divided into electric charge coupling (CCD according to the element difference, Charge Coupled Device) imageing sensor and metal-oxide semiconductor (MOS) (CMOS, Complementary Metal-Oxide Semiconductor) imageing sensor.Wherein, because cmos image sensor integrated level height, easily and the CMOS manufacture craft compatibility of standard, and low in energy consumption, along with the improvement of CMOS manufacture craft, cmos image sensor becomes the mainstream technology of present imageing sensor.
A kind of existing C mos image sensor is disclosed in application number is 200710148796.5 Chinese patent application.The existing C mos image sensor comprises Semiconductor substrate, and described Semiconductor substrate generally includes some pixel cell zones that matrix is arranged that are, and has fleet plough groove isolation structure (STI) between the adjacent unit pixel zone.Please refer to Fig. 1, Fig. 1 is an existing C mos image sensor structural representation, described cmos image sensor comprises: Semiconductor substrate 100, and described Semiconductor substrate 100 comprises some pixel cells zone 103, is that example describes with 2 pixel cells zone 103 among the figure; Has fleet plough groove isolation structure 106 between the adjacent pixel unit zone 103.Wherein said pixel cell zone 103 is used to form pixel, common described pixel cell zone 103 comprises photodiode area 104 and transistor area 105, described photodiode area 104 is used to form photodiode, and described photodiode is used for opto-electronic conversion; Described transistor area 105 is used to form transistor, and described transistor is used for the signal of telecommunication of photodiode converts is amplified back output.Described fleet plough groove isolation structure 106 is used for the isolation of neighbor.Described Semiconductor substrate 100 comprises first surface 101 and second surface on the other side 102.Light enters in the pixel cell zone 103 from second surface 102.Those skilled in the art are called described cmos image sensor (Backside illuminated) cmos image sensor of photodetector for backside-illuminated.
Find that in practice the cmos image sensor of above-mentioned photodetector for backside-illuminated has the problem that demonstration is faded, and has influenced image quality.
Therefore, need a kind of cmos image sensor of photodetector for backside-illuminated, can improve the problem that demonstration is faded, improve the image quality of cmos image sensor.
Summary of the invention
The problem that the present invention solves has provided a kind of cmos image sensor of photodetector for backside-illuminated, can improve to show the problem of fading, and improves the image quality of cmos image sensor.
For addressing the above problem, the invention provides a kind of cmos image sensor of photodetector for backside-illuminated, comprising:
Semiconductor substrate, described Semiconductor substrate have first surface and second surface on the other side;
Described Semiconductor substrate comprises at least one pixel cell zone;
Isolation structure is between the adjacent pixel unit zone;
Wherein, described isolation structure is the deep trench isolation structure, and described deep trench isolation structure runs through the first surface and the second surface of described Semiconductor substrate.
Optionally, the width of described deep trench isolation structure is smaller or equal to 0.25 micron.
Optionally, the depth bounds of described deep trench isolation structure is 1.5～4 microns.
Optionally, described deep trench isolation structure inner stuffing is a dielectric.
Optionally, described dielectric refractive index is less than 0.8 times of the refractive index of described Semiconductor substrate.
Optionally, described Semiconductor substrate be formed with filter and lenticule successively, described filter and lenticule are positioned at the second surface of described Semiconductor substrate.
The present invention also provides a kind of manufacture method of cmos image sensor of photodetector for backside-illuminated, comprising:
Semiconductor substrate is provided, and described Semiconductor substrate has first surface and the 3rd surface on the other side, and described Semiconductor substrate comprises at least one pixel cell zone;
In described Semiconductor substrate, form the deep trench isolation structure along described first surface, described deep trench isolation structure has along the bottom of groove depth direction, described groove depth direction is perpendicular to described first surface and the 3rd surface, and described deep trench isolation structure is between the adjacent unit pixel zone;
For stopping layer, along described Semiconductor substrate the 3rd surface described Semiconductor substrate is carried out attenuate with the bottom of described deep trench isolation structure, stop at second surface, described second surface exposes the bottom of described deep trench isolation structure.
Optionally, described thining method comprises the method for cmp.
Optionally, describedly in described Semiconductor substrate, form the deep trench isolation structure along described first surface and comprise step:
Between the adjacent pixel unit zone of first surface, form hard mask layer with first opening;
Along described first opening Semiconductor substrate is carried out etching, in described Semiconductor substrate, form second opening;
Filling dielectric in described second opening,
Remove described hard mask layer, form the deep trench isolation structure.
Optionally, the depth bounds of described deep trench isolation structure is 1.5～4 microns.
Optionally, the width of described deep trench isolation structure is smaller or equal to 0.25 micron.
Optionally, described dielectric refractive index is less than 0.8 times of the refractive index of described Semiconductor substrate.
Optionally, also comprise: forming filter and lenticule successively along described second surface with the pixel cell zone, described filter and lenticular manufacture method comprise lithography step, in the described lithography step with the mark of described deep trench isolation structure as lithography alignment.
Compared with prior art, the present invention has the following advantages:
By the deep trench isolation structure of the first surface and the second surface that run through Semiconductor substrate is set between the adjacent pixel unit zone, carry out the isolation between neighbor, avoided the photo-generated carrier in the pixel cell zone to diffuse to the adjacent pixel unit zone, minimizing causes crosstalking of the signal of telecommunication to the adjacent pixel unit zone, the demonstration that has improved cmos image sensor is faded, and has improved image quality.
Further, filler in the described deep trench isolation structure is a dielectric, described dielectric refractive index is less than 0.8 times of the Semiconductor substrate refractive index, light forms total reflection at the interface of deep trench isolation structure and Semiconductor substrate, avoid light to enter the adjacent unit pixel zone through the deep trench isolation structure, reduced the crosstalking of the light signal in adjacent pixel unit zone, the demonstration that has further improved cmos image sensor is faded, and has improved image quality; Described deep trench isolation structure filling dielectric is a silica, has different colors with the silicon of Semiconductor substrate, in carrying out photoetching process formation filter and lenticular process, the deep trench isolation structure can be used as the alignment mark of photoetching, need not special alignment, save processing step, reduced production cost.
Description of drawings
Fig. 1 is a prior art cmos image sensor structural representation.
Fig. 2 is the cmos image sensor structural representation of one embodiment of the present of invention.
Fig. 3 is that light forms the total reflection principle schematic diagram in deep trench isolation structure and Semiconductor substrate interface.
Fig. 4 is the manufacture method schematic flow sheet of the cmos image sensor of one embodiment of the present of invention.
Fig. 5～Fig. 9 is a cmos image sensor manufacture method cross-sectional view of the present invention.
Embodiment
(Backside illuminated) cmos image sensor of existing photodetector for backside-illuminated exists and shows the problem of fading.Discover that through the inventor reason of fading is crosstalk (crosstalk) of neighbor.One of described reason of crosstalking is that existing fleet plough groove isolation structure can't effectively be isolated photo-generated carrier diffusion between the adjacent unit pixel.Owing to adopt the incident ray of the cmos image sensor of photodetector for backside-illuminated to enter the pixel cell zone of Semiconductor substrate through lenticule and filter, prior art is in order to improve effective photosensitive area of the photodiode in the pixel cell zone, the degree of depth of normal light electric diode is bigger, its degree of depth can reach more than 10000 dusts, and the depth bounds of existing fleet plough groove isolation structure is generally 2000～5000 dusts.When carrying out opto-electronic conversion, the photo-generated carrier that described photodiode opto-electronic conversion is produced may spread, and existing fleet plough groove isolation structure can't effectively be isolated photo-generated carrier, thereby photo-generated carrier may be to neighbor, neighbor is caused crosstalking of the signal of telecommunication, thereby cause the demonstration of cmos image sensor to be faded.
The cmos image sensor of photodetector for backside-illuminated provided by the invention has solved crosstalking of the signal of telecommunication, has improved the demonstration COLOR FASTNESS PROBLEM of cmos image sensor, and the cmos image sensor of described photodetector for backside-illuminated comprises:
Semiconductor substrate, described Semiconductor substrate have first surface and second surface on the other side;
Described Semiconductor substrate comprises at least one pixel cell zone;
Isolation structure is between the adjacent pixel unit zone;
Wherein, described isolation structure is the deep trench isolation structure, and described deep trench isolation structure runs through the first surface and the second surface of described Semiconductor substrate.
Below in conjunction with specific embodiments technical scheme of the present invention is described in detail.Please refer to Fig. 2, Fig. 2 is the cmos image sensor structural representation of one embodiment of the invention.
Described cmos image sensor comprises Semiconductor substrate 200, and the material of described Semiconductor substrate 200 can be silicon, SOI, gallium nitride or GaAs.Described Semiconductor substrate 200 has first surface 201 and second surface on the other side 202.In the present embodiment, the silicon substrate of described Semiconductor substrate 200 for having the P-type conduction type.
As Fig. 2, described Semiconductor substrate 200 comprises at least one pixel cell zone 203, for convenience of explanation, is that example describes with 2 pixel cell zones 203.Has deep trench isolation structure 206 between the adjacent unit pixel zone 203.Described deep trench isolation structure 206 runs through the first surface 201 and the second surface 202 of described Semiconductor substrate 200.The pixel cell zone 203 of Semiconductor substrate 200 is formed with filter 209 and lenticule 210.In the present embodiment, the ranges of indices of refraction of described lenticule 210 is 1.2～4, and its material can be silicon nitride SiN
X, zirconia ZrO
2, hafnium oxide HfO
2, titanium oxide TiO
2, aluminium oxide Al
3O
2, zinc oxide ZnO
2Deng, the ranges of indices of refraction of described filter 209 is 1.4～2, its material can be photoresist.Described filter 209 and lenticule 210 form by photoetching process, and in the photo-etching technological process that forms filter, the alignment mark that deep trench isolation structure 206 can be used as photoetching uses.
Still with reference to figure 2, described pixel cell zone 203 is used to form pixel.Described pixel cell zone 203 comprises photodiode area 204 and transistor area 205.Described photodiode area 204 is used to form photodiode, and described photodiode is used to carry out opto-electronic conversion, will be converted to the corresponding signal of telecommunication from the light signal of second surface 202 incidents, produces photo-generated carrier.Described transistor area 205 is used to form transistor, and described transistor is used for the signal of telecommunication of described photodiode converts is amplified, exports.According to actual conditions, comprise 3 or 3 above transistors in the described transistor area 205, have fleet plough groove isolation structure between the described transistor, be used for isolating mutually between the transistor in the pixel.The depth bounds of described fleet plough groove isolation structure is 2000～5000 dusts.
In the present embodiment, described deep trench isolation structure 206 runs through the first surface 201 and the second surface 202 of described Semiconductor substrate 200.As an embodiment, the thickness range of described Semiconductor substrate 200 is 1.5～4 microns, and the thickness of described deep trench isolation structure 206 should be identical with the degree of depth of described Semiconductor substrate 200, is 1.5～4 microns.As preferred embodiment, the thickness of described Semiconductor substrate 200 is 2～3 microns, so that the photodiode in the pixel cell zone 203 can better absorb incident ray, correspondingly, the depth bounds of described deep trench isolation structure 206 is preferably 2～3 microns.Because described deep trench isolation structure 206 runs through the first surface 201 and the second surface 202 of described Semiconductor substrate 200, therefore, the photo-generated carrier that deep trench isolation structure 206 can effectively stop the photodiode of pixel to produce when opto-electronic conversion diffuses to neighbor, minimizing is crosstalked to the signal of telecommunication of neighbor, the pixel of improving cmos image sensor is faded, and has improved the image quality of cmos image sensor.
The width of described deep trench isolation structure 206 is less than or equal to the width of the fleet plough groove isolation structure of prior art, to save chip area.As an embodiment, the width range of described deep trench isolation structure 206 is smaller or equal to 0.25 micron.
Described deep trench isolation structure 206 inner stuffings are dielectric, 0.8 times of the refractive index of the little described Semiconductor substrate of described dielectric refractive index.Incident ray enters pixel cell zone 203 o'clock and forms total reflection at the interface of deep trench isolation structure 203 and Semiconductor substrate 200 like this, avoid incident ray to enter adjacent pixel unit zone 203 through deep trench isolation structure 206, crosstalking of light signal caused in adjacent pixel unit zone 203, further improve the problem that the demonstration of cmos image sensor is faded.Light forms the principle of total reflection at the interface of deep trench isolation structure and Semiconductor substrate for convenience of explanation, and explanation is amplified in the subregion 300 of cmos image sensor among Fig. 2.Described subregion 300 comprises pixel cell zone 203, the deep trench isolation structure 206 of corresponding filter 209, lenticule 210 and 203 both sides, pixel cell zone with it.Please refer to Fig. 3, Fig. 3 is that light forms the total reflection principle schematic diagram in deep trench isolation structure and Semiconductor substrate interface.
As shown in Figure 3, light A enters pixel cell zone 203 from the second surface 202 of air process lenticule 210, filter 209, Semiconductor substrate 200, desirable situation is, light A is absorbed by the photodiode in pixel cell zone 203, but, since light A may have certain inclination angle so light may incident deep trench isolation structure 206 and the interface of Semiconductor substrate 200.The refractive index difference owing to the material difference of common air, lenticule 210, filter 209, Semiconductor substrate 200, the refraction of light takes place repeatedly in the interface of light A arrival deep trench isolation structure 206 and Semiconductor substrate 200.Particularly, be O1 at the normal of lenticule 210 and air interface, the angle of light A and described normal O1 is a1 in air, through superrefraction, the angle of light A and normal O1 is a2 in lenticule 210; Light A transfers to the interface of lenticule 210 and filter 209 in lenticule 210, the normal at the interface of described lenticule 210 and filter 209 is O2, the angle of light A and described normal O2 is a3 in lenticule 210, through superrefraction, the angle of light A and described normal O2 is aa4 in filter 209; Light A transfers to the interface of filter 209 and Semiconductor substrate 200 in filter 209, described filter 209 is O3 with the normal at the interface of Semiconductor substrate 200, the angle of described light A and described normal O3 is a5 in filter 209, through superrefraction, the angle a6 of light A and normal O3 in Semiconductor substrate 200; In Semiconductor substrate 200, described light A transfers to the interface of Semiconductor substrate 200 and described deep trench isolation structure 206, described Semiconductor substrate 200 is O4 with the normal at the interface of described deep trench isolation structure 206, and the angle of light A and normal O4 is β in Semiconductor substrate 200.In the present embodiment, the interface of deep trench isolation structure 206 and Semiconductor substrate 200 is perpendicular to the interface of filter 209 with Semiconductor substrate 200, and therefore, normal O4 is vertical with normal O3, thereby angle beta and angle a6 be complementary angle each other.
Because in practice, those skilled in the art are optimized setting to the thickness of lenticule 210, the thickness of filter 209, can be so that make angle a6 identical with angle a1.The maximum of angle a1 is called the chief ray inclination angle, and (chief ray angle, CRA), and the angular range at chief ray inclination angle is 0～35 °.Therefore, angle a6 range of tilt angles is 0～35 °, and the angular range of the complementary angle β of angle a6 is 55～90 °, and promptly the ranges of incidence angles of light and normal O4 is 55～90 °.Therefore, suppose that the cirtical angle of total reflection is α, if want light in the interface formation total reflection of Semiconductor substrate 200 with deep trench isolation structure 206, α should be less than being 55 °, to guarantee when the ranges of incidence angles of light and normal O4 is 55～90 °, arbitrary incidence angle is all greater than α, thereby the incidence angle of light and normal O4 can form total reflection when being 55～90 °.Suppose that the cirtical angle of total reflection is 55 °, the refractive index of Semiconductor substrate 200 is x, and dielectric refractive indexes of filling in the deep trench isolation structure 206 are y, then according to total reflection computing formula: sin55 °/sin90 °=y/x
y＝sin55°*x＝0.8*x
As the above analysis, when the cirtical angle of total reflection was 55 °, dielectric refractive indexes of filling in the corresponding deep trench isolation structure 206 were 0.8 times of refractive index of Semiconductor substrate 200.
Because the critical angle α of total reflection depends on the refractive index of Semiconductor substrate 200 and the index of refraction relationship of deep trench isolation structure 206 interior filling dielectrics.Particularly, under the certain situation of the refractive index of Semiconductor substrate 200, dielectric refractive index of filling in the deep trench isolation structure 206 is more little, and the critical angle α of total reflection is more little.By the analysis of front as can be known, the dielectric refractive index when the critical angle of total reflection is 55 ° in the deep trench isolation result 206 of correspondence is 0.8 times of Semiconductor substrate 200 refractive indexes.If will make the cirtical angle of total reflection less than 55 °, total reflection should take place to guarantee light A at the interface of deep trench isolation structure 206 and Semiconductor substrate 200 less than 0.8 times of Semiconductor substrate 200 refractive indexes in dielectric refractive index of filling in the deep trench isolation structure 206.Thereby light A stays in the pixel cell zone 203, avoids light A to cause through deep trench isolation structure 206 pairs of adjacent pixel unit zones and crosstalks, the demonstration that further improves the existing C mos image sensor phenomenon of fading.
As an embodiment, when the material of described Semiconductor substrate 200 was silicon, the filler of described deep trench isolation structure 206 can be silica, and the refractive index of described silica can be smaller or equal to 0.8 times of the refractive index of silicon.In the present embodiment, the refractive index of silicon is 3.46, and the refractive index of silica is 1.46, and incident ray can form total reflection at the interface of deep trench isolation structure 206 and Semiconductor substrate 200 like this.Alternately, under 0.8 times of prerequisite of dielectric refractive index smaller or equal to the refractive index of silicon substrate of filling in deep trench isolation structure 206, the dielectric of filling in the deep trench isolation structure 206 can be other materials.When the material of Semiconductor substrate 200 is other semi-conducting materials, dielectric material of filling in the deep trench isolation structure 206 can also be other materials, but dielectric refractive index of filling in the deep trench isolation structure 206 should be less than 0.8 times of Semiconductor substrate 200 refractive indexes, to guarantee forming total reflection at the interface of deep trench isolation structure 206 and Semiconductor substrate 200.
Need to prove, above-mentioned analysis is consistent with the width of second surface 202 perpendicular to first surface 201 with deep trench isolation structure 206 edges, thereby the interface of deep trench isolation structure 206 and Semiconductor substrate 200 is for to describe for example perpendicular to first surface 201 and second surface 202.In practice, because the restriction of manufacturing process, deep trench isolation structure 206 is along inhomogeneous to the width possibility of second surface 202 directions perpendicular to first surface 201, cause having certain angle of inclination between the interface of deep trench isolation structure 206 and Semiconductor substrate 200 and first surface 201 and the second surface 202, but described angle of inclination is less in the influence that described interface forms total reflection to incident ray, can ignore.Therefore, under 0.8 times the situation of the refractive index of filling dielectric less than Semiconductor substrate 200 refractive indexes, incident ray can form total reflection at described interface in deep trench isolation structure 206.
The present invention also provides a kind of manufacture method of cmos image sensor.Please refer to Fig. 4, Fig. 4 is the manufacture method schematic flow sheet of the cmos image sensor of one embodiment of the invention.Described method comprises:
Step S1 provides Semiconductor substrate, and described Semiconductor substrate has first surface and the 3rd surface on the other side, and described Semiconductor substrate comprises at least one pixel cell zone;
Step S2, in described Semiconductor substrate, form the deep trench isolation structure along described first surface, described deep trench isolation structure has along the bottom of groove depth direction, described groove depth direction is perpendicular to described first surface and the 3rd surface, and described deep trench isolation structure is between the adjacent unit pixel zone;
Step S3 for stopping layer, carries out attenuate along described Semiconductor substrate the 3rd surface to described Semiconductor substrate with the bottom of described deep trench isolation structure, stops at second surface, and described second surface exposes the bottom of described deep trench isolation structure.Below in conjunction with embodiment technical scheme of the present invention is elaborated.Please refer to Fig. 5～Fig. 9, Fig. 5～Fig. 9 is a cmos image sensor manufacture method cross-sectional view of the present invention.
At first, please refer to Fig. 5, Semiconductor substrate 200 is provided, described Semiconductor substrate 200 has first surface 201 and the 3rd surface 211 on the other side.Described Semiconductor substrate 200 comprises at least one pixel cell zone 203, and for convenience of explanation, 2 pixel cell zones 203 of present embodiment describe for example.Described pixel cell zone 203 is used for follow-up formation pixel.
Then, form the hard mask layer 207 with first opening between the adjacent unit pixel zone 203 of first surface 201, the material of described hard mask layer 207 can be oxide, silicon nitride etc.Then, along described first opening Semiconductor substrate 200 is carried out etching, form second opening 208 in described Semiconductor substrate 200, described second opening 208 is between adjacent pixel unit zone 203.Described second opening 208 has 211 opening directions perpendicular to first surface 201 and the 3rd surface.
Then, with reference to figure 6, filling dielectric in described second opening 208.Described dielectric refractive index is less than 0.8 times of the refractive index of Semiconductor substrate 200.As an embodiment, when the material of described Semiconductor substrate 200 was silicon, described dielectric material was selected from silica.In the present embodiment, the refractive index of silicon is 3.46, and the refractive index of silica is 1.46.Alternative, when the material of described Semiconductor substrate 200 was silicon, described dielectric material can be refractive index other dielectrics of 0.8 times (for example being silicon nitride or silicon oxynitride etc.) less than the refractive index of silicon.In other embodiment, the material of described Semiconductor substrate 200 can be other semi-conducting materials such as germanium, GaAs, under 0.8 times the prerequisite of refractive index less than the refractive index of Semiconductor substrate 200, described dielectric material also can be silicon nitride or silicon oxynitride.If described dielectric material is a silica, its fill method can be high density plasma CVD method (HDPCVD) and spin glass method (SOG).
Then, with reference to figure 7, remove the dielectric that is positioned at first surface 201 tops of the described hard mask layer 207 and second opening 208, form deep trench isolation structure 206, described deep trench isolation structure 206 has along the bottom of groove depth direction, described groove depth direction is consistent with the opening direction of second opening 208, and the groove depth direction of promptly described deep trench isolation structure 206 is perpendicular to described first surface 201 and the 3rd surface 211.The depth bounds of described deep trench isolation structure 206 is 1.5～4 microns, and its width is smaller or equal to 0.25 micron.As an embodiment, the dielectric method that is positioned at first surface 201 tops of the described hard mask layer 207 of described removal and second opening 208 is the method for cmp.
Then, with reference to figure 8, for stopping layer, carry out attenuate along the 211 pairs of Semiconductor substrate 200 in described Semiconductor substrate 200 the 3rd surface with the bottom of described deep trench isolation structure 206, stop at second surface 202, described second surface 202 exposes the bottom of described deep trench isolation structure 206.Described deep trench isolation structure 206 runs through the first surface 201 and the second surface on the other side 202 of described Semiconductor substrate 200.As an embodiment, described thining method comprises chemical and mechanical grinding method.Because the material of Semiconductor substrate 200 is a silicon, the dielectric of filling in the deep trench isolation structure 206 is a silica, described cmp step has different grinding rates to silicon and silica, and therefore, the bottom of deep trench isolation structure 206 can be used as the layer that stops of grinding.
Then, with reference to figure 9, form filter 209 and lenticule 210 successively in described pixel cell zone 202, the forming process of described filter 209 and lenticule 210 comprises photoetching process, and described photoetching process is the mark of lithography alignment with described deep trench isolation structure 206.Because fill oxide in the deep trench isolation structure 206, and the material of Semiconductor substrate 200 is a silicon, the color of described deep trench isolation structure 206 is different with the color of Semiconductor substrate 200, when exposure, deep trench isolation structure 206 can be used as the mark of lithography alignment, make the technology of lithography alignment layer with prior art specially and compare, do not need special lithography alignment layer, reduce processing step.The material of described filter 209 is same as the prior art, and as an embodiment, the material of filter 209 is a photoresist; The material of described lenticule 210 is same as the prior art, and as an embodiment, the material of lenticule 210 is to be silicon nitride SiN
X, zirconia ZrO
2, hafnium oxide HfO
2, titanium oxide TiO
2, aluminium oxide Al
3O
2, zinc oxide ZnO
2Deng.
Usually, after deep trench isolation structure 206 forms and to Semiconductor substrate 200, carry out reduction process before, usually will be in pixel cell zone 203 the formation pixel.Known technology as those skilled in the art does not elaborate at this.
To sum up, the invention provides a kind of cmos image sensor of photodetector for backside-illuminated, has the deep trench isolation structure between the pixel cell zone of the cmos image sensor of described photodetector for backside-illuminated, described deep trench isolation structure runs through the first surface and the second surface on the other side of described Semiconductor substrate, thereby effectively isolate neighbor, avoid crosstalking of the neighbor signal of telecommunication, improved the demonstration COLOR FASTNESS PROBLEM of cmos image sensor, improved image quality.Further, described deep trench isolation inside configuration filling dielectric, described dielectric refractive index is less than 0.8 times of the refractive index of Semiconductor substrate, light forms total reflection on the interface of deep trench isolation structure and Semiconductor substrate, avoid light to enter neighbor, neighbor is caused crosstalking of light signal, improved the demonstration COLOR FASTNESS PROBLEM of cmos image sensor more, improved image quality.Simultaneously, when forming filter and lenticular photoetching process, described deep trench isolation structure can be used as the mark of lithography alignment, has reduced processing step.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (13)
1. the cmos image sensor of a photodetector for backside-illuminated comprises:
Semiconductor substrate, described Semiconductor substrate have first surface and second surface on the other side;
Described Semiconductor substrate comprises at least one pixel cell zone;
Isolation structure is between the adjacent pixel unit zone;
It is characterized in that described isolation structure is the deep trench isolation structure, described deep trench isolation structure runs through
The first surface of described Semiconductor substrate and second surface.
2. the cmos image sensor of photodetector for backside-illuminated as claimed in claim 1 is characterized in that, the width of described deep trench isolation structure is smaller or equal to 0.25 micron.
3. the cmos image sensor of photodetector for backside-illuminated as claimed in claim 1 is characterized in that, the depth bounds of described deep trench isolation structure is 1.5～4 microns.
4. the cmos image sensor of photodetector for backside-illuminated as claimed in claim 1 is characterized in that, described deep trench isolation structure inner stuffing is a dielectric.
5. the cmos image sensor of photodetector for backside-illuminated as claimed in claim 4 is characterized in that, described dielectric refractive index is less than 0.8 times of the refractive index of described Semiconductor substrate.
6. the cmos image sensor of photodetector for backside-illuminated as claimed in claim 1 is characterized in that, described Semiconductor substrate be formed with filter and lenticule successively, described filter and lenticule are positioned at the second surface of described Semiconductor substrate.
7. the manufacture method of the cmos image sensor of a photodetector for backside-illuminated, it is characterized in that, comprise: Semiconductor substrate is provided, and described Semiconductor substrate has first surface and the 3rd surface on the other side, and described Semiconductor substrate comprises at least one pixel cell zone;
In described Semiconductor substrate, form the deep trench isolation structure along described first surface, described deep trench isolation structure has along the bottom of groove depth direction, described groove depth direction is perpendicular to described first surface and the 3rd surface, and described deep trench isolation structure is between the adjacent unit pixel zone;
For stopping layer, along described Semiconductor substrate the 3rd surface described Semiconductor substrate is carried out attenuate with the bottom of described deep trench isolation structure, stop at second surface, described second surface exposes the bottom of described deep trench isolation structure.
8. the manufacture method of the cmos image sensor of photodetector for backside-illuminated as claimed in claim 7 is characterized in that, described thining method comprises the method for cmp.
9. the manufacture method of the cmos image sensor of photodetector for backside-illuminated as claimed in claim 7 is characterized in that, describedly forms the deep trench isolation structure along described first surface in described Semiconductor substrate and comprises step:
Between the adjacent pixel unit zone of first surface, form hard mask layer with first opening; Along described first opening Semiconductor substrate is carried out etching, in described Semiconductor substrate, form second opening;
Filling dielectric in described second opening,
Remove described hard mask layer, form the deep trench isolation structure.
10. the manufacture method of the cmos image sensor of photodetector for backside-illuminated as claimed in claim 9 is characterized in that, the depth bounds of described deep trench isolation structure is 1.5～4 microns.
11. the manufacture method of the cmos image sensor of photodetector for backside-illuminated as claimed in claim 9 is characterized in that, the width of described deep trench isolation structure is smaller or equal to 0.25 micron.
12. the manufacture method of the cmos image sensor of photodetector for backside-illuminated as claimed in claim 9 is characterized in that, described dielectric refractive index is less than 0.8 times of the refractive index of described Semiconductor substrate.
13. the manufacture method of the cmos image sensor of photodetector for backside-illuminated as claimed in claim 7, it is characterized in that, also comprise: forming filter and lenticule successively along described second surface with the pixel cell zone, described filter and lenticular manufacture method comprise lithography step, in the described lithography step with the mark of described deep trench isolation structure as lithography alignment.
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