CN102456540B - Method for preparing photoetching alignment mark applied to epitaxial process - Google Patents

Method for preparing photoetching alignment mark applied to epitaxial process Download PDF

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CN102456540B
CN102456540B CN201010511407.2A CN201010511407A CN102456540B CN 102456540 B CN102456540 B CN 102456540B CN 201010511407 A CN201010511407 A CN 201010511407A CN 102456540 B CN102456540 B CN 102456540B
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growth
aligned
layer pattern
speed
alignment mark
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CN102456540A (en
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王雷
孟鸿林
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

The invention discloses a method for preparing a photoetching alignment mark applied to an epitaxial process. The photoetching alignment mark comprises an aligned layer pattern before epitaxial growth and an alignment layer pattern after epitaxial growth, and compensation patterns with compensation growth speed difference are symmetrically increased or decreased on four corners of a photoetching mask of the aligned layer pattern according to the difference between the growth speed of a one-dimensional pattern and the growth speed of a two-dimensional pattern in the epitaxial process. Due to the adoption of the preparation method disclosed by the invention, the epitaxy distortion caused by different growth speed can be reduced.

Description

Be applied to the preparation method of the photoetching alignment mark in epitaxy technique
Technical field
The present invention relates to a kind of preparation method of photoetching alignment mark, particularly a kind of preparation method who is applied to the photoetching alignment mark in epitaxy technique.
Background technology
For conventional semiconductor high pressure high workload current device, need to there is the monocrystalline silicon of specific doping content and Uniform Doped as Withstand voltage layer or resistance to fluid layer.And that extension (also claiming EPI) technique has doping content is controlled, doping content evenly and epitaxial loayer in strict accordance with the feature of crystal orientation growth, therefore in actual semiconductor production, conventionally all adopt grow tolerating high voltage or tolerate the rete of large electric current of the mode of epitaxial growth (EPI).
But EPI technique, in having various advantages, also exists some shortcomings, pattern distortion is exactly that one of them is very important and have a strong impact on the shortcoming of follow-up photoetching Alignment Process.Because EPI is a kind of strictly technique based on the growth of silicon substrate crystal orientation, therefore for figure (the one dimension figure of 1D, be the figure extending along single direction in plane, be generally along single crystal orientation) there is good anti-aliasing (seeing Fig. 8).But for 2D figure (X-Y scheme, it is the figure extending along two different directions in plane, be generally the figure infall along two different crystal orientations), due to grow along two different crystal orientation (seeing Fig. 9) simultaneously, now along with EPI technique, the variation of substrate crystal orientation and graphics shape, the growth rate that can produce 2D position is faster or slower than the characteristic of the growth rate of 1D position, as represented in Fig. 9, the extension atom of shaded side is subject to the impact in both direction crystal orientation, its speed of growth will produce significant difference with other extension atoms around, thereby generation pattern distortion.
Along with the speed difference of epitaxial loayer 1D growth and 2D growth becomes large, epitaxially grown thickness increase, pattern distortion meeting is more and more serious, causes measuring inaccurate, and inner evenness variation, measures unstablely etc., can cause cannot measuring completely under extreme case.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of preparation method who is applied to the photoetching alignment mark in epitaxy technique, and it can reduce the distortion of epitaxial patterns.
For solving the problems of the technologies described above, the preparation method who is applied to the photoetching alignment mark in epitaxy technique of the present invention, comprise: according to the difference of the speed of growth of the speed of growth of outer time delay one dimension figure and X-Y scheme, increase symmetrically or cut the compensation figure with compensatory growth speed difference at the lithography mask version that is aligned layer pattern four jiaos.
Preparation method of the present invention, according to the feature of 2D figure growth speed in concrete epitaxy technique, by zooming in or out the layer pattern that is aligned of 2D position, the final growth area of 2D position and 1D position is reached an agreement, thereby reduce because the inconsistent epitaxial patterns distortion causing of 2D figure and 1D figure growth rate.
Accompanying drawing explanation
Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation:
Fig. 1 is of the present invention one concrete lithography mask version example;
Fig. 2 is another concrete lithography mask version example of the present invention;
Fig. 3 to Fig. 7 is respectively the example of the compensation figure in the present invention
Fig. 8 is one dimension Self-aligned growth schematic atomic diagram;
Fig. 9 is X-Y scheme epitaxial growth schematic atomic diagram.
Embodiment
In epitaxy technique, at 2D figure place (such as) crosspoint of the line of two different directions, epitaxial growth meeting is carried out along multiple crystal orientation simultaneously, and the growth of 1D Self-aligned is only carried out along a crystal orientation.The growth of the growth of both direction and a direction, growth rate is along with process conditions, substrate crystal orientation, the difference of the conditions such as graphics shape and difference causes the distortion of epitaxial loayer figure thus.And the preparation method who is applied to the photoetching alignment mark in epitaxy technique of the present invention produces based on this understanding just, by being aligned layer pattern increase before extension or cutting a compensation figure, the pattern distortion causing to compensate epitaxial growth speed difference.Because the preparation of photoetching alignment mark comprises the aligning layer pattern preparation after the preparation and the epitaxial growth that are aligned layer pattern before epitaxial growth, preparation method of the present invention is specially: in the time being aligned layer pattern for depression figure, the speed of growth of outer time delay 1D figure is greater than the speed of growth of 2D figure, when photoetching process definition is aligned layer pattern, the lithography mask version using is original four jiaos of figures that cut symmetrically after a compensation figure that are aligned figure lithography mask version; When the speed of growth of outer time delay 1D figure is less than the speed of growth of 2D figure, when photoetching process definition is aligned layer pattern, at original four jiaos of figures that increase symmetrically after a compensation figure that are aligned figure lithography mask version.
In actual applications, compensation figure can be miter angle right-angled triangle (seeing Fig. 3), square (seeing Fig. 5), 1/4 fan-shaped (seeing Fig. 6 and Fig. 7), figure as shown in Figure 4 and as shown in Figure 6 figure.The size of compensation figure and concrete shape are by the poor decision of the speed of growth of two kinds of figures in epitaxial growth, can be according to the test of limited number of time, find out the relation between the epitaxial growth technology of shape, size and different-thickness of compensation figure according to the result of compensation extension distortion.The size a maximum of compensating images can be 1/4 overall dimensions, and minimum is 0.1um.The overall dimensions A that is aligned layer photoetching alignment figure is 1~100um, is preferably 10~50um.
In an example, be aligned layer pattern for depression figure, the speed of growth of outer time delay one dimension Self-aligned is less than the speed of growth of X-Y scheme extension, so in the time that photoetching is aligned layer pattern, adopt the lithography mask version shown in Fig. 1, this lithography mask version is four jiaos of figures that cut symmetrically after a miter angle right-angled triangle original cubic block diagram shape, the layer pattern that is aligned forming is less than original being defined by photoetching process while being aligned layer pattern, and after process epitaxial growth, the final growth area of 2D figure and 1D figure is reached an agreement, reduce pattern distortion.Under a contrary situation example, employing lithography mask version is as shown in Figure 2 as the lithography mask version that is aligned layer pattern, for four jiaos of figures that increase symmetrically after a miter angle right-angled triangle original cubic block diagram shape, i.e. four jiaos of miter angle right-angled triangles that stretch outward symmetrically, the layer pattern that is aligned forming is greater than original being defined by photoetching process while being aligned layer pattern, and after process epitaxial growth, the final growth area of 2D figure and 1D figure is reached an agreement, reduce pattern distortion.
In specific design photo etched mask format, can adopt with the following method:
1) use standard lithography mask version, adopt the EPI technique growth of specifying to carry out epitaxial growth, produce respectively three epitaxial thicknesses, the thickness of standard thickness and extension control bound.One of minimum needs in batches, more in batches many in order more accurately also to produce.
2) need increase still to reduce compensation figure by the distortion judgement of test pattern.
3), afterwards by test, the result distorting according to compensation epitaxial growth is by model between the epitaxy technique of different-thickness, different size and difform compensation figure.
4), finally according to size and the concrete shape of the selected compensation figure of model, the figure after use is optimized is as product figure.
In the present invention indication be aligned layer can be the housing in photoetching alignment mark, can be also the inside casing in photoetching alignment mark.
Form and be aligned layer pattern as example take etch silicon substrate, the depression figure that can form by the silicon substrate of etching graph area or the protruding figure (being that the figure that the peripheral substrate zone of etching remains has afterwards formed projection) being formed by reservation graph area.When being aligned layer pattern protruding figure, the selection of compensation figure is with above-described just in time contrary, be greater than the speed of growth of X-Y scheme extension when the speed of growth of outer time delay one dimension Self-aligned, when photoetching process definition is aligned layer pattern, the lithography mask version using is original four jiaos of figures that increase symmetrically after a compensation figure that are aligned figure lithography mask version; When the speed of growth of outer time delay one dimension Self-aligned is less than the speed of growth of X-Y scheme extension, when photoetching process definition is aligned layer pattern, at original four jiaos of figures that cut symmetrically after a compensation figure that are aligned figure lithography mask version.Because while being aligned layer pattern for depression figure, epitaxy single-crystal is growth outside to inside; And in the time being aligned figure and being protruding figure, epitaxy single-crystal is from inside to outside long, therefore the setting of compensation figure is just in time contrary.

Claims (5)

1. one kind is applied to the preparation method of the photoetching alignment mark in epitaxy technique, described photoetching alignment mark comprises the aligning layer pattern after layer pattern and epitaxial growth that is aligned before epitaxial growth, it is characterized in that: according to the difference of the speed of growth of the speed of growth of outer time delay one dimension figure and X-Y scheme, increase symmetrically or cut the compensation figure with compensatory growth speed difference at the lithography mask version that is aligned layer pattern four jiaos:
The described figure that is aligned is while caving in figure, when the speed of growth of outer time delay one dimension figure is greater than the speed of growth of X-Y scheme, when photoetching process definition is aligned layer pattern, the lithography mask version using is original four jiaos of figures that cut symmetrically after a compensation figure that are aligned layer pattern lithography mask version; When the speed of growth of outer time delay one dimension Self-aligned is less than the speed of growth of X-Y scheme extension, when photoetching process definition is aligned layer pattern, at original four jiaos of figures that increase symmetrically after a compensation figure that are aligned layer pattern lithography mask version;
Described when being aligned figure and being protruding figure, when the speed of growth of outer time delay one dimension figure is greater than the speed of growth of X-Y scheme, when photoetching process definition is aligned layer pattern, the lithography mask version using is original four jiaos of figures that increase symmetrically after a compensation figure that are aligned layer pattern lithography mask version; When the speed of growth of outer time delay one dimension Self-aligned is less than the speed of growth of X-Y scheme extension, when photoetching process definition is aligned layer pattern, at original four jiaos of figures that cut symmetrically after a compensation figure that are aligned layer pattern lithography mask version.
2. according to the preparation method who is applied to the photoetching alignment mark in epitaxy technique claimed in claim 1, it is characterized in that: the corresponding relation between the epitaxial growth technology of shape, size and the different-thickness of described compensation figure, the result that compensates epitaxial growth distortion by experimental evidence draws.
3. according to the preparation method who is applied to the photoetching alignment mark in epitaxy technique claimed in claim 2, it is characterized in that: described compensation figure is miter angle right-angled triangle square or 1/4 fan-shaped.
4. according to the preparation method who is applied to the photoetching alignment mark in epitaxy technique claimed in claim 2, it is characterized in that: the size of described compensation figure is by the poor decision of the speed of growth of two kinds of figures in epitaxial growth.
5. according to the preparation method who is applied to the photoetching alignment mark in epitaxy technique claimed in claim 1, it is characterized in that: described in be aligned the housing that layer pattern is photoetching alignment mark, or be the inside casing of photoetching alignment mark.
CN201010511407.2A 2010-10-19 2010-10-19 Method for preparing photoetching alignment mark applied to epitaxial process Active CN102456540B (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1329357A (en) * 2000-06-08 2002-01-02 株式会社东芝 Aligning method, alignment checking method and photomask
CN1632698A (en) * 2004-09-22 2005-06-29 中国电子科技集团公司第二十四研究所 Method for projecting and photo etching on thick epitaxial layer
CN101088045A (en) * 2005-01-18 2007-12-12 国际商业机器公司 Imprint reference template for multilayer or multipattern registration and method therefor
CN101465306A (en) * 2007-12-19 2009-06-24 上海华虹Nec电子有限公司 Method for measuring distortion of epitaxial growth picture

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Publication number Priority date Publication date Assignee Title
JP2000299452A (en) * 1999-04-16 2000-10-24 Mitsubishi Electric Corp Semiconductor device and manufacture thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1329357A (en) * 2000-06-08 2002-01-02 株式会社东芝 Aligning method, alignment checking method and photomask
CN1632698A (en) * 2004-09-22 2005-06-29 中国电子科技集团公司第二十四研究所 Method for projecting and photo etching on thick epitaxial layer
CN101088045A (en) * 2005-01-18 2007-12-12 国际商业机器公司 Imprint reference template for multilayer or multipattern registration and method therefor
CN101465306A (en) * 2007-12-19 2009-06-24 上海华虹Nec电子有限公司 Method for measuring distortion of epitaxial growth picture

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
JP特开2000-299452A 2000.10.24

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