A kind of binary channels optical module RSSI Trigger processing unit
Technical field
The present invention relates to optical communication field, relate in particular in the OLT optical module of CSFP encapsulation, let twin-channel optical module can enough devices that microprocessor is handled two RSSI Trigger.
Background technology
GEPON (Gigabit Ethernet Passive Optical Network gigabit ethernet passive optical network) is a kind of fiber optic network of at present tool development prospect, is made up of OLT (Optical Line Terminal optical line terminal), ONT (Optical Network Terminal ONT Optical Network Terminal) and optical distribution network.The mode of operation of GEPON is asynchronous time division multiple access pattern, and in uplink service, the OLT system gives the time slot of a transmission of each user data, sends upstream data by ONT to OLT.Because of the mode of operation of time division multiple access,, form by bursty data one by one so its upstream data is discontinuous.The GEPON system is because the position of each ONT is different, distance is different, the optical link state is different; Therefore the loss in its optical fiber is just different; Because each packet all is to be carrier with the light signal in fiber optic network, thereby each packet luminous power different sizes that causes OLT to receive.This just requires OLT that the uplink burst light signal is carried out the monitoring of luminous power, notes abnormalities and can alarm.OLT equipment can be divided into optical-electric module and two parts of system's host computer, and optical-electric module is accomplished the conversion of photosignal, and the monitoring and the alarm of photoelectric properties are provided simultaneously.Prior art is monitored the luminous power size of the burst upstream data bag that receives and the pilot signal that produces is RSSI (indication of a Received Signal Strength Indication receiving end signal intensity) signal.
Programmable logic array PLA (Programmable Logic Array), in 20th century the mid-1970s occur, it is made up of programmable and array and programmable or array.The configuration data of PLA has determined the interconnected relationship and the logic function of PLA local array, changes these data, has also just changed the logic function of device.The development day crescent of singlechip technology is beneficial now, and function has all increased the function of PLA from strength to strength in a lot of microprocessor products series.
Present optical communication market competition more and more fierce, the volume that communication equipment requires is more and more littler, and the interface density that interface board comprises is increasingly high.The optical module that traditional optical receiver separates with optical sender because of its volume is bigger, has been difficult to adapt to the requirement of modern communications equipment.Characteristics such as therefore little encapsulation optical transceiver module is little because of its volume, the cost of material is low, low in energy consumption have been represented the development trend of optic communication device of new generation, are the foundation stones of express network of future generation.
As shown in Figure 1, be the RSSI supervising device structural representation of OLT single channel optical receiver in the prior art.After ONT uplink burst light signal was input to the OLT optical receiver, optical receiver converted light signal into the signal of telecommunication and exports to follow-up system as data; The RSSI supervisory circuit is the aanalogvoltage that is in proportion with input optical power with this electrical signal conversion; Then sampling hold circuit keeps this aanalogvoltage, gathers for the analog to digital converter in the microprocessor; Analog to digital converter converts this aanalogvoltage into binary-coded monitoring optical power value, accomplishes gatherer process; This monitoring optical power value is stored in and keeps supplying machine-readable the getting in position on the memory cell at last.Because the luminous time slot of ONT is the decision of OLT host computer, thus the control signal RSSI Trigger of RSSI supervisory circuit (receiving end signal intensity is indicated triggering signal) also provide by host computer, so could be corresponding with the operating state of ONT.RSSI Trigger sends to sampling hold circuit, whether is used to control this sampling hold circuit work; RSSI Trigger also sends to the interruption input pin of microprocessor, and the work that is used to control analog to digital converter whether.
CSFP MSA (the intensive Small Form-Factor Pluggable multi-source agreement of Compact Small-Form-Factor Pluggable Multi Source Agreement) League of Nations has defined new miniaturization can plug encapsulation standard C SFP; Through utilizing the highly integrated reversible optical assembly that also can send light signal that receives, significantly reduced components and parts cost, volume and the power consumption of optical module.The optical module of twin-channel CSFP encapsulation then further uses two reversible optical assemblies to realize the bidirectional transmit-receive of following two passages of original same overall dimensions simultaneously.The binary channels optical module is for traditional single channel optical module; Do not have very big difference: single channel optical module originally is successively analog-digital converter and memory cell in optical receiver, RSSI observation circuit, sampling hold circuit and the microprocessor to be coupled together, and gives sampling hold circuit and microprocessor with RSSI Trigger by host computer; And the binary channels optical module only is that the analog to digital converter and the memory cell of two single channel optical modules are supplied with by a microprocessor is unified, and provides two passages RSSI Trigger separately by a host computer.Twin-channel benefit is to have increased port density, has improved data throughout, thereby has reduced network equipment cost.
The interrupt system of microprocessor is used for inner or outside accident are responded in time, and carries out corresponding program.In order to make optical module chip steady operation, the down trigger of existing optical module chip generally is a level triggers.Level triggers is to continue to trigger, and interrupt flag register does not latch interrupt request singal, and when in time not responded when interrupting request to get clogged like this, this time interrupt requests will be lost.So the interruption that will make level triggers is by the single-chip microcomputer response and carry out, must guarantee that level that exterior interrupt is imported is maintained to till interruption is performed.In the practical application of single-chip microcomputer, the interrupt signal of single-chip microcomputer not only is used for doing down trigger, also is used for controlling the work of circuit such as other transducer or sampling maintenance.Such as in above-mentioned RSSI monitoring device, also controlling sampling hold circuit simultaneously as the RSSI Trigger of interrupt trigger signal.Therefore RSSI Trigger receives the restriction that burst receives the light packet length, and minimum pulse width has only 300ns.
This just causes the RSSI Trigger of other system application requirements and microprocessor will try to achieve the enough appearance conflicts of interrupt trigger signal.Particularly in the binary channels optical module of CSFP encapsulation was used, the received power monitoring of two passages all depended on the Interrupt Process executive program of microprocessor; But general optical module inside has only a microprocessor, can not carry out two Interrupt Process executive programs simultaneously, so just can not carry out the received power monitoring operation of two passages simultaneously.
In the prior art; The received power observation circuit of binary channels optical module is often after giving RSSI Trigger of first passage; The RSSI Trigger of second passage must between provide at regular intervals, can not conflict guaranteeing with the Interrupt Process executive program of first RSSI Trigger.If RSSI Trigger sequential does not satisfy the optical module requirement, then the monitoring of the received power of binary channels optical module probably just can not the successful execution operation.This has just produced the requirement of specific RSSI Trigger sequential to system's host computer, lack suit property, has limited the scope of application of binary channels optical module, and the sequential that strict demand arranged simultaneously is easy error also, in case make mistakes then can't realize interrupt function.
Summary of the invention
To the problems referred to above; The objective of the invention is to; A kind of RSSI Trigger processing unit that is used for the binary channels optical module is provided, makes the binary channels optical module can receive the RSSI Trigger of two passages simultaneously, and then reduce requirement the host computer RSSI Trigger of system sequential; Reduce the problem of makeing mistakes and producing simultaneously, improve the stability of a system because of RSSI Trigger sequential.
The object of the invention is realized through following technical scheme: a kind of binary channels optical module RSSI Trigger processing unit; Comprise first optical receiver, a RSSI observation circuit, first sampling hold circuit, second optical receiver, the 2nd RSSI observation circuit, second sampling hold circuit, microprocessor, host computer, comprise that also first interrupts holding circuit, the second interruption holding circuit; Host computer sends a RSSI Trigger to the first and interrupts holding circuit, and first interrupts a RSSI Trigger being sent to after holding circuit keeps handling to a RSSI Trigger first interrupt pin of microprocessor again; Host computer sends the 2nd RSSI Trigger to the second and interrupts holding circuit, and second interrupts the 2nd RSSI Trigger being sent to after holding circuit keeps handling to the 2nd RSSI Trigger second interrupt pin of microprocessor again.
Further, said interruption holding circuit comprises diode Q, resistance R, capacitor C; RSSI Trigger from host computer sends to diode Q positive pole, and diode Q negative pole is to the interrupt pin output interrupt trigger signal of microprocessor; Capacitor C one end connects diode Q negative pole, capacitor C other end ground connection; Resistance R is connected in parallel on the capacitor C two ends.Use little integrated circuit of handling the outside as interrupting holding circuit, benefit is this adhesive integrated circuit technology maturation, and stability is high, and the maintenance cost of makeing mistakes when needing replacing is lower.
Further again, said interruption holding circuit comprise or the door, with the door; RSSI Trigger from host computer sends to or the Men Yiduan input, or input connection of the door other end and gate output terminal, or gate output terminal is to the interrupt pin output interrupt trigger signal of microprocessor; This interrupt trigger signal also sends to the input with Men Yiduan, receives the register level from microprocessor internal with door other end input.Functions such as PLA that the use microprocessor internal carries and register are used as interrupting holding circuit, and benefit is that integrated level is high, is quick on the draw, and low production cost can not increase package area yet.
Beneficial effect of the present invention is: the RSSI Trigger that the present invention provides host computer through binary channels optical module RSSI Trigger processing unit keeps handling; The state that can keep two-way RSSI Trigger simultaneously; After making one road light transceiver channel get into RSSI sampling Interrupt Process; The RSSI Trigger state that can keep another road light transceiver channel has simultaneously been avoided the temporal conflict of the different interchannel RSSI Trigger of binary channels optical module, and then has been reduced the requirement to the host computer RSSI Trigger of system sequential; Reduce the problem of makeing mistakes and producing simultaneously, improve the stability of a system because of RSSI Trigger sequential.When holding circuit is interrupted in concrete realization, adopt integrated circuit to realize that then the stability of a system is high, maintenance cost is low; Adopt logical circuit to realize that then production cost is low, integrated level is high, is quick on the draw, and can not increase package area.
Description of drawings
Fig. 1 is the RSSI supervising device structural representation of OLT single channel optical receiver in the prior art;
Fig. 2 is a binary channels optical module RSSI supervising device structural representation of the present invention;
Fig. 3 is the integrated circuit structure figure of a specific embodiment of interruption holding circuit of the present invention;
Fig. 4 is the logic circuit structure figure of another specific embodiment of interruption holding circuit of the present invention.
Embodiment
Disclosed all characteristics in this specification, or the step in disclosed all methods or the process except mutually exclusive characteristic and/or the step, all can make up by any way.
Disclosed arbitrary characteristic in this specification (comprising any claim, summary and accompanying drawing) is only if special narration all can be replaced by other equivalences or the alternative features with similar purpose.That is, only if special narration, each characteristic is an example in a series of equivalences or the similar characteristics.The description to alternative features is to being equal to the description of technical characterictic, must not being regarded as the donation to the public in this specification simultaneously.
Term in this specification (comprising any claim, summary and accompanying drawing) like no specified otherwise, all is defined as the peculiar implication in this area if having the peculiar implication of general sense and this area simultaneously.
Below in conjunction with accompanying drawing and embodiment the present invention is further specified.
As shown in Figure 2, be binary channels optical module RSSI supervising device structural representation of the present invention.Since the binary channels optical module be with two independently the single channel optical module share a microprocessor and a host computer forms, so the circuit structure of traditional single channel OLT optical module is basic identical among its structure and Fig. 1.With the first passage is example, and after ONT uplink burst light signal was input to OLT first optical receiver, first optical receiver converted light signal into the signal of telecommunication and exports to follow-up system as data; The one RSSI supervisory circuit is the aanalogvoltage that is in proportion with input optical power with this electrical signal conversion; Then first sampling hold circuit keeps this aanalogvoltage, gathers for first analog to digital converter in the microprocessor; First analog to digital converter converts this aanalogvoltage into binary-coded monitoring optical power value, accomplishes gatherer process; This monitoring optical power value is stored in and keeps supplying machine-readable the getting in position on first memory cell at last.Because the luminous time slot of ONT is the decision of OLT host computer, thus control signal the one RSSI Trigger of a RSSI supervisory circuit (receiving end signal intensity is indicated triggering signal) also provide by host computer, so could be corresponding with the operating state of ONT.The one RSSI Trigger sends to first sampling hold circuit, whether is used to control this first sampling hold circuit work; The one RSSI Trigger also sends to first of microprocessor and interrupts input pin, and the work that is used to control first analog to digital converter whether.The course of work of second channel is identical with first passage, repeats no more.
Because the binary channels optical module has been shared microprocessor and host computer, therefore when the different RSSI Trigger that adheres to two passages separately has conflict in time, will cause dropout, prior art has the strict demand that produces RSSI Trigger to host computer.The present invention has increased the interruption holding circuit in order to address this problem before the interrupt pin of microprocessor, that is: in the binary channels optical module, increased by first and interrupted holding circuit, the second interruption holding circuit; First interrupts a RSSI Trigger being sent to after the holding circuit reception keeps handling from a RSSI Trigger of host computer and to a RSSI Trigger first interrupt pin of microprocessor again; Second interrupt that holding circuit receives the 2nd RSSI Trigger that host computer sends and the 2nd RSSI Trigger kept handling after again the 2nd RSSI Trigger is sent to second interrupt pin of microprocessor.These two effects of interrupting holding circuits are that the high level with RSSI Trigger keeps the sufficiently long time, after handling the RSSI interrupt requests of another passage, handle the RSSI interrupt requests of this passage for microprocessor again.After having increased these two interruption holding circuits, the RSSI Trigger that the binary channels optical module is not strict with at needs, thus reduced requirement to host computer; The RSSI Trigger of two passages can distinguish independent reception simultaneously, can not produce conflict again, has increased the stability of a system.Certainly, not only the binary channels optical module can use the interruption holding circuit, and the multichannel light module also is the same, only needs an interruption holding circuit just can to an interruption input pin of microprocessor.
According to one embodiment of present invention, interrupt holding circuit and can be the outside integrated circuit of microprocessor, as shown in Figure 3.Be input to the positive pole of diode Q from the RSSI Trigger signal of host computer, the negative pole of diode Q is to the interruption input pin output interrupt trigger signal of microprocessor.Capacitor C one end connects diode Q negative pole, other end ground connection.The effect of capacitor C is that level sampling keeps, and when the RSSI of high level Trigger passes through, constantly to the capacitor C charging, makes it the high level that reaches identical with RSSI Trigger; When RSSI Trigger became low level, because the buffer action of diode Q, capacitor C can't be discharged rapidly, but continued to keep high level state, offered the interruption input pin of microprocessor as interrupt trigger signal.Resistance R is parallel to the capacitor C two ends; Be used for slowly discharging, play the earial drainage effect, next RSSI Trigger can be sampled by capacitor C to capacitor C; The resistance of bleeder resistor R is generally between hundreds of K level or hundreds of M level ohm; Through selecting the resistance of R, can regulate the retention time of sampling capacitance C, make this retention time both greater than time of an Interrupt Process executive program; Minimum less than double RSSI Trigger triggers the cycle again, and concrete resistance those skilled in the art can draw according to concrete actual application environment debugging.
According to another embodiment of the invention, interrupt the logical circuit that the maintenance electric weight also can be made up of the PLA of microprocessor internal, as shown in Figure 4.General micro controller all carries PLA now, can realize the different logical circuit structure through the programming to microprocessor.The logical circuit of present embodiment utilizes the indispensable register of microprocessor can realize interrupting the function of holding circuit easily again.An or end input of door input RSSI Trigger; Or the other end input of door connects and the output of door; Or the output of door is then exported interrupt trigger signal to the interruption input pin of microprocessor; Or gate output terminal is also connected to the end input with door simultaneously, with the other end input of door input register level then.Like this, when microprocesser initialization, register level is set to high level, and do not have RSSI Trigger to get into this moment, so or the door output low level, the register high level with or the low level of door output through with door with computing after, output low level give or; Or door carries out exclusive disjunction, the continuation output low level to RSSI Trigger low level with the low level of door output.Then; If interrupt holding circuit RSSI Trigger input is arranged; Then or door carry out exclusive disjunction to RSSI Trigger high level with the low level of door output; Then export the interrupt trigger signal of high level, this interrupt trigger signal outputs to the interruption input pin of microprocessor on the one hand, also outputs to the input with Men Yiduan on the other hand; Interrupt trigger signal and register high level are carried out and computing the output high level with door; After RSSI Trigger disappears, continue to export to or door with the high level of door output always, then or door also continue the output high level always.Receive or the interrupt trigger signal of the high level of door output up to microprocessor, microprocessor is adjusted to low level with the level of register, and this moment and door be output low level then; Or door also output low level thus.After the microprocessor Interrupt Process is accomplished, once more register level is adjusted to high level, make the interruption holding circuit of present embodiment get back to initial condition at the beginning, prepare to receive again next RSSI Trigger.Should be noted that the so-called register level in the present embodiment is not to have only register to provide, any microprocessor effectively parts of control level all can provide, and all can such as control pins such as chip enable pins.Microprocessor in the present embodiment can be the microprocessor chip of any on the market PLA of carrying function, such as the U.S. ADuC7020 of ADI company microprocessor.