CN102354688A - Power module - Google Patents

Power module Download PDF

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Publication number
CN102354688A
CN102354688A CN2011103066308A CN201110306630A CN102354688A CN 102354688 A CN102354688 A CN 102354688A CN 2011103066308 A CN2011103066308 A CN 2011103066308A CN 201110306630 A CN201110306630 A CN 201110306630A CN 102354688 A CN102354688 A CN 102354688A
Authority
CN
China
Prior art keywords
layer
power model
spacer layer
substrate
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2011103066308A
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Chinese (zh)
Inventor
冯闯
张礼振
刘杰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SHENZHEN WEIYI ELECTRIC CO Ltd
Original Assignee
SHENZHEN WEIYI ELECTRIC CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHENZHEN WEIYI ELECTRIC CO Ltd filed Critical SHENZHEN WEIYI ELECTRIC CO Ltd
Priority to CN2011103066308A priority Critical patent/CN102354688A/en
Publication of CN102354688A publication Critical patent/CN102354688A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The invention relates to a power module comprising a base plate. The base plate comprises an insulating layer in the middle, and a front side conducting layer and a back side conducting layer which are located on both sides of the insulating layer; a solder layer is arranged on the front side conducting layer; a device layer and a lead wire framework are arranged on the solder layer; a gasket layer which is used for ejecting a centre in a die encapsulation process of the power module is further arranged on the solder layer; the power module is further provided with a plastic capsulation material which is used for sealing the device layer, the gasket layer, the partial lead wire framework and the partial base plate; and a centre hole is remained above the gasket layer. According to the power module provided by the invention, the possibility of damaging the insulating layer by using the centre in a die encapsulation technology can be reduced; meanwhile, the flatness of the base plate during a die encapsulation processing procedure of the power module is ensured and the plastic capsulation material is prevented from overflowing in the technology processing procedure, so that the insulation characteristic and the radiation characteristic of the power module are improved, and the reliability and the yield of the power module product are further improved.

Description

A kind of power model
Technical field
The present invention relates to electric and electronic technical field, more particularly, relate to a kind of power model.
Background technology
Power model has a wide range of applications in motor-driven such as air-conditioning, washing machine, field of power electronics.The operating current of power model is very big; The heat that produces under the working condition so is very big, thus require the heat dispersion of the inside of module to get well, and also power model is in practical application; Its upper surface and radiator are closely conflicted, with the heat radiation of enhanced power module to environment.In application; Have between safety regulation power model and the radiator certain dielectric strength will be arranged; Because power model and radiator are closely conflicted, so power model will satisfy the requirement of safety dielectric strength, so require the dielectric voltage withstand performance of power model to get well.
Existing power with power model in, power chip and IC chip attachment are on lead frame, chip and lead frame are through resin-sealed.Because the heat that power chip produces is big, in order to improve heat dissipation characteristics, need make the resin of sealing chip and lead frame thin, specifically, the resin between the back side of the back side and power model of the framework that has mounted power chip is approached.If but this part resin is thin, can bring the shortcoming of the insulation characterisitic decline of power model.
Therefore; For under the prerequisite that improves the power model heat dissipation characteristics; Increase simultaneously under the background of insulation characterisitic, electric power coversion system reliability etc. of power model; (Direct Bonding Copper, DBC) substrate or insulating metal substrate are applied on the power model a kind of Direct Bonding copper widely.The manufacturing of DBC copper base is through two-layer copper being bonded to the positive and negative of ceramic insulation plate under high temperature pressure, and wherein positive copper layer is used for the wiring of power model device (power chip, passive device etc.) and mounting of lead frame.The manufacturing of insulating metal substrate is through layer of copper and aluminium sheet being pressed to the positive and negative of one deck insulating polymer, and wherein positive copper layer is used for the wiring of power model device (power chip, passive device etc.) and mounting of lead frame.
The existing electric power that uses the DBC substrate with power model in; A kind of is not use thimble; As shown in Figure 1; One of them solder layer 110 is configured on the DBC substrate 100, and a device layer 120 and a lead frame 130 are configured on the solder layer 110, and a kind of plastic packaging material 140 is with device layer 120 and part lead frame 130,100 sealings of part DBC substrate.
Another kind is to adopt thimble directly to withstand on the DBC substrate, and as shown in Figure 2, one of them solder layer 110 is configured on the DBC substrate 100; A device layer 120 and a lead frame 130 are configured on the solder layer 110; A kind of plastic packaging material 140 in mould envelope technical process, guarantees the evenness of DBC substrate 100 and plastic packaging material 140 flashes that in manufacturing process, prevent to be used for the mould envelope with device layer 120 and part lead frame 130,100 sealings of part DBC substrate; Adopt thimble directly to be pressed on the DBC substrate 100; On plastic packaging material 140, form a centre hole 150, after mould envelope technology finishes, remove thimble.
According to the above, the manufacturing of a DBC substrate 100 is through being bonded to a front copper layer 102 and a back side copper layer 106 on the ceramic wafer 104 under high temperature pressure.Owing in mould envelope technology, 150 ℃-200 ℃ high temperature can occur; Range of temperature is bigger; (CTE of copper product approximates 17ppm/ ℃ and CTE (thermal coefficient of expansion) does not match between the materials such as the front copper layer 102 of the substrate 100 of DBC, reverse side copper layer 106, ceramic wafer 104 and plastic packaging material 140; The CTE of ceramic material approximates 7ppm/ ℃, and the CTE of plastic packaging material material approximates 15ppm/ ℃).
In above two kinds of schemes, the former does not use thimble, and in mould envelope technology, the wide variation of temperature can cause the poor flatness of DBC substrate 100, warpage occurs, and the heat dissipation characteristics of power model in practical application can be poor.Owing to the evenness problem of DBC substrate 100, flash can appear in plastic packaging material 140 in mould envelope technology, increases the control complexity of technology simultaneously.In the latter's the scheme; Though use thimble to solve the evenness of DBC substrate 100 and the problem of plastic packaging material flash; But when thimble is pressed on the DBC substrate 100, can produce a pressure to DBC substrate 100, this pressure damages the ceramic wafer in the DBC substrate 100 104 sometimes.
Fig. 3 is the enlarged diagram of A part among Fig. 2, can see, when thimble 160 directly is pressed in 100 last times of DBC substrate; Can produce a pressure to DBC substrate 100,, lack toughness because ceramic wafer 104 is a fragility; So can damage to the ceramic wafer in the DBC substrate 100 104; This is embodied in the fine fisssure of ceramic wafer 104, thereby the insulation characterisitic of DBC substrate 100 is descended, and heat dissipation characteristics descends; And then cause the reduction of power model reliability of products, yields to reduce, thereby increase the cost of power model itself.
Though the ceramic wafer in the DBC substrate is thickeied; For example use the thick or thicker ceramic wafer of 0.63mm; Can reduce the possibility that it is damaged; But can reduce its heat dissipation characteristics, like this can only be through the area of DBC substrate being increased or adopting more that the mode of this increase power model cost of the ceramic material of high thermal conductivity (for example aluminium nitride) remedies.
Summary of the invention
The technical problem that the present invention will solve is, to the above-mentioned defective of prior art, provides a kind of substrate insulating layer that can in mould envelope process, reduce because of the suffer damage power model of possibility of thimble.
The technical solution adopted for the present invention to solve the technical problems is:
Construct a kind of power model; Comprise substrate; Said substrate comprises insulating barrier in the middle of being positioned at and front side conductive layer and the backside conductive layer that is positioned at said insulating barrier both sides, and said front side conductive layer is provided with solder layer, and said solder layer is provided with device layer and lead frame; Wherein, On said solder layer, also be provided with the spacer layer that is used for holding in power model mould envelope process thimble, said power model also comprises the plastic packaging material that is used for said device layer, spacer layer, the said lead frame of part and the said base plate seals of part, and centre hole is left in said spacer layer top.
Power model of the present invention, wherein, said spacer layer is the part of said lead frame.
Power model of the present invention, wherein, said lead frame comprises the connecting portion that pastes mutually with said solder layer, and the lead division that extends to form of said connecting portion bending, said spacer layer is the part of a part of or said lead division of said connecting portion.
Power model of the present invention, wherein, said spacer layer is the unitary part that is separated with said lead frame.
Power model of the present invention, wherein, said spacer layer adopts metal to process, and said metal comprises copper, iron or aluminium.
Power model of the present invention, wherein, said spacer layer is polygonal, circle or oval.
Power model of the present invention, wherein, said spacer layer thickness is 0.1mm~6mm.
Power model of the present invention, wherein, said spacer layer area is 0.1mm 2~1cm 2
Power model of the present invention, wherein, said insulating barrier is a ceramic wafer.
Power model of the present invention wherein, is provided with the filler with the identical material of said plastic packaging material in the said centre hole.
Beneficial effect of the present invention is: the spacer layer that is used for holding in power model mould envelope process thimble through increase; Reduce the possibility that the insulating barrier in the substrate that causes because of use thimble in mould envelope technology damages; The evenness of power model substrate in mould envelope processing procedure and the plastic packaging material flash that in manufacturing process, prevents to be used for the mould envelope have been guaranteed simultaneously; Thereby improve insulation characterisitic, the heat dissipation characteristics of power model, and then improve power model reliability of products, yields.For the DBC substrate, the ceramic wafer thickness in the substrate can be reduced simultaneously, the area of substrate need not increase or use more cheap ceramic material, and then reduces the cost of whole power model.
Description of drawings
To combine accompanying drawing and embodiment that the present invention is described further below, in the accompanying drawing:
Fig. 1 is the power model sectional view that does not use thimble of the prior art;
Fig. 2 is that use thimble of the prior art directly withstands on the power model sectional view on the substrate;
Fig. 3 is an A part enlarged diagram among Fig. 2;
Fig. 4 is that the use thimble of preferred embodiment of the present invention withstands on the power model sectional view on the spacer layer independently;
Fig. 5 is the power model sectional view that the use thimble of preferred embodiment of the present invention withstands on the lead frame connecting portion;
Fig. 6 is the power model sectional view that the use thimble of preferred embodiment of the present invention withstands on lead frame folding lead division.
Embodiment
The power model cross section of preferred embodiment of the present invention is as shown in Figure 4; Comprise substrate 10 and plastic packaging material 50; Substrate 10 comprises the insulating barrier 14 in the middle of being positioned at and is positioned at the conductive layer of insulating barrier 14 both sides (front side conductive layer 16 and backside conductive layer 12); The front side conductive layer 16 of substrate 10 is provided with solder layer 20, and solder layer 20 is provided with device layer 30 and lead frame 40, on solder layer 20, also is provided with the spacer layer 70 that is used for holding in power model mould envelope process thimble (not shown); Plastic packaging material 50 leaves centre hole 60 with device layer 30, spacer layer 70, part lead frame 40 and 10 sealings of part substrate above spacer layer 70.When mould seals; Thimble is held on spacer layer 70, avoided directly contacting with substrate 10,70 pairs of mechanical pressures that thimble applied of spacer layer cushion; Therefore reduced because of using the possibility of thimble damaged substrate 10 insulating barriers 14; The flash that can also guarantee the evenness of substrate 10 simultaneously and prevent plastic packaging material 50 in the mould envelope technology, thereby insulation characterisitic, the thermal diffusivity of raising power model, and then improve power model reliability of products and yields.
In a further embodiment, like Fig. 5 and shown in Figure 6, above-mentioned spacer layer 70 is parts of lead frame 40, and need not increase extra material and technology like this can realize.Promptly when mould seals; Thimble is directly held on lead frame 40, and lead frame 40 plays the effect of buffering between substrate 10 and thimble, and absorption portion is from the mechanical pressure of thimble; Therefore reduced pressure, thereby reduced the possibility of destroying substrate 10 insulating barriers 14 substrate 10.
In embodiment further, like Fig. 5 and shown in Figure 6, lead frame 40 comprises the connecting portion 41 that pastes mutually with solder layer 20, and connecting portion 41 bends the lead division 42 that extends to form.Wherein, as shown in Figure 6, spacer layer 70 can be the part of connecting portion 41, and is perhaps as shown in Figure 5, is the part of lead division 42.When spacer layer 70 is connecting portion 41 a part of because connecting portion 41 is through directly welding between solder layer 20 and the substrate 10, absorbent mechanical pressure less relatively; When spacer layer 70 is lead division 42 a part of; Because lead division 42 relative substrates 10 are in vacant state; Mould Feng Shiyu plastic packaging material 50 contacts, and therefore can absorb from the bigger mechanical pressure of thimble, therefore can better play the purpose of protective substrate 10 insulating barriers 14.
In the foregoing description; Though adopt lead frame 40 local directly realization spacer layers 70 to have the advantage of conservation and technology; But when lead frame 40 exposed parts are charged, then need extra the mould left centre hole 60 of being honored as a queen to be filled, in order to avoid electric leakage.The general employing filled centre hole 60 with plastic packaging material 50 identical thermoset, for example epoxy resin.When if lead frame 40 exposed parts are not charged, then can fill also and can not fill centre hole 60.
In another embodiment of the present invention; As shown in Figure 4; Spacer layer 70 is the single part that is separated with only lead frame 40; Promptly adopt extra material and technology to process spacer layer 70 separately, spacer layer 70 is also the same with device layer 30 to be mounted on the substrate 10 through chip mounter specialty, automation, need not fill the centre hole 60 that stays like this.Independently spacer layer 70 can be to adopt metal to process, and wherein metal comprises copper, iron, aluminium etc.
Preferably, the needs when independently the number of spacer layer 70 and position can be sealed according to actual mould are arranged on the substrate 10, and spacer layer 70 can be polygonal, circle or ellipse etc.
Preferably, independently spacer layer 70 thickness are preferably 0.1mm~6mm, have approached very much the effect that may not have buffering, the too thick integrated artistic and the cost that may influence power model.
Preferably, independently spacer layer 70 areas are preferably 0.1mm 2~1cm 2, concrete big I is provided with according to power module substrate 10 areas.
Preferably, substrate 10 insulating barriers 14 among above-mentioned each embodiment are ceramic wafer, and its main component can be alundum (Al etc.; DBC substrate for example, compared to the insulating material of other types, ceramic wafer is prone to split more; But adopted after the spacer layer among above-mentioned each embodiment; Even use thimble also to be not easy to damage ceramic wafer, therefore can the thickness of substrate 10 insulating barriers 14 ceramic wafers be reduced, or adopt other cheap insulating material; And need not increase the area of whole base plate 10, thereby reduce the cost of whole power model.
Among above-mentioned each embodiment, solder layer 20 employing steel meshes will conduct electricity, the scolder (for example tin cream) of good heat conductivity is configured in mode of printing on the characteristic zone of substrate 10, and wherein the specific region refers to mount the zone of device and part lead frame 40; Device layer 30 is through chip mounter special-purpose, automation device to be mounted on the solder layer 20; Lead frame 40 combines with solder layer 20 through special anchor clamps; Device layer 30 is accomplished configuration through high-temperature soldering (for example Reflow Soldering) again with lead frame 40 then; 50 of plastic packaging materials adopt transfer molding technology with device layer 30, part lead frame 40, part substrate 10 and spacer layer 70 sealings.
In sum; The present invention is used for holding in power model mould envelope process the spacer layer 70 of thimble through increase; Reduce the possibility that the insulation board 14 in the substrate 10 that causes because of use thimble in mould envelope technology damages; Guarantee the evenness of power model substrate 10 in mould envelope processing procedure and plastic packaging material 50 flashes that in manufacturing process, prevent to be used for the mould envelope simultaneously, thereby improved insulation characterisitic, the heat dissipation characteristics of power model, and then improved power model reliability of products, yields.For the DBC substrate, the ceramic wafer thickness in the substrate 10 is reduced simultaneously, the area of substrate 10 need not increase or use more cheap ceramic material, and then reduces the cost of whole power model.
Should be understood that, concerning those of ordinary skills, can improve or conversion, and all these improvement and conversion all should belong to the protection range of accompanying claims of the present invention according to above-mentioned explanation.

Claims (10)

1. power model; Comprise substrate (10); Said substrate (10) comprises insulating barrier (14) in the middle of being positioned at and front side conductive layer (16) and the backside conductive layer (12) that is positioned at said insulating barrier (14) both sides; Said front side conductive layer (16) is provided with solder layer (20); Said solder layer (20) is provided with device layer (30) and lead frame (40), it is characterized in that, on said solder layer (20), also is provided with the spacer layer (70) that is used for holding in power model mould envelope process thimble;
Said power model also comprises the plastic packaging material (50) that is used for said device layer (30), spacer layer (70), the said lead frame of part (40) and the said substrate of part (10) sealing, and centre hole (60) is left in said spacer layer (70) top.
2. power model according to claim 1 is characterized in that, said spacer layer (70) is the part of said lead frame (40).
3. power model according to claim 2; It is characterized in that; Said lead frame (40) comprises the connecting portion (41) that pastes mutually with said solder layer (20); And the lead division (42) that extends to form of said connecting portion (41) bending, said spacer layer (70) is the part of a part of or said lead division (42) of said connecting portion (41).
4. power model according to claim 1 is characterized in that, said spacer layer (70) is the unitary part that is separated with said lead frame (40).
5. power model according to claim 4 is characterized in that, said spacer layer (70) adopts metal to process, and said metal comprises copper, iron or aluminium.
6. power model according to claim 4 is characterized in that, said spacer layer (70) is polygonal, circle or oval.
7. power model according to claim 4 is characterized in that, said spacer layer (70) thickness is 0.1mm~6mm.
8. power model according to claim 4 is characterized in that, said spacer layer (70) area is 0.1mm~1cm.
9. power model according to claim 1 is characterized in that, said insulating barrier (14) is a ceramic wafer.
10. power model according to claim 1 is characterized in that, is provided with the filler with the identical material of said plastic packaging material (50) in the said centre hole (60).
CN2011103066308A 2011-10-11 2011-10-11 Power module Pending CN102354688A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011103066308A CN102354688A (en) 2011-10-11 2011-10-11 Power module

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Application Number Priority Date Filing Date Title
CN2011103066308A CN102354688A (en) 2011-10-11 2011-10-11 Power module

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104112730A (en) * 2013-06-09 2014-10-22 广东美的制冷设备有限公司 Intelligent power module and manufacturing method thereof
CN105097719A (en) * 2014-05-21 2015-11-25 三菱电机株式会社 Semiconductor device, manufacturing apparatus for semiconductor device and manufacturing method for semiconductor device, and semiconductor module
US10950516B2 (en) 2017-05-02 2021-03-16 Abb Schweiz Ag Resin encapsulated power semiconductor module with exposed terminal areas
CN116682817A (en) * 2023-05-31 2023-09-01 海信家电集团股份有限公司 Intelligent power module and electronic equipment with same

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CN1309425A (en) * 2000-02-18 2001-08-22 株式会社日立制作所 Semiconductor integrated circuit device and mfg. method thereof
US20030011054A1 (en) * 2001-06-11 2003-01-16 Fairchild Semiconductor Corporation Power module package having improved heat dissipating capability
JP2005328015A (en) * 2004-04-14 2005-11-24 Denso Corp Semiconductor device
CN1893061A (en) * 2005-07-08 2007-01-10 乾坤科技股份有限公司 Package structure of power power-supply module
US20070257351A1 (en) * 2006-05-08 2007-11-08 Fairchild Korea Semiconductor, Ltd. Power module for low thermal resistance and method of fabricating the same
CN201699009U (en) * 2010-06-08 2011-01-05 日立电线(苏州)精工有限公司 Semiconductor packaging structure

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1309425A (en) * 2000-02-18 2001-08-22 株式会社日立制作所 Semiconductor integrated circuit device and mfg. method thereof
US20030011054A1 (en) * 2001-06-11 2003-01-16 Fairchild Semiconductor Corporation Power module package having improved heat dissipating capability
US7061080B2 (en) * 2001-06-11 2006-06-13 Fairchild Korea Semiconductor Ltd. Power module package having improved heat dissipating capability
JP2005328015A (en) * 2004-04-14 2005-11-24 Denso Corp Semiconductor device
CN1893061A (en) * 2005-07-08 2007-01-10 乾坤科技股份有限公司 Package structure of power power-supply module
US20070257351A1 (en) * 2006-05-08 2007-11-08 Fairchild Korea Semiconductor, Ltd. Power module for low thermal resistance and method of fabricating the same
CN201699009U (en) * 2010-06-08 2011-01-05 日立电线(苏州)精工有限公司 Semiconductor packaging structure

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104112730A (en) * 2013-06-09 2014-10-22 广东美的制冷设备有限公司 Intelligent power module and manufacturing method thereof
CN105097719A (en) * 2014-05-21 2015-11-25 三菱电机株式会社 Semiconductor device, manufacturing apparatus for semiconductor device and manufacturing method for semiconductor device, and semiconductor module
CN105097719B (en) * 2014-05-21 2018-02-06 三菱电机株式会社 The manufacture method and semiconductor module of semiconductor device, the manufacture device of semiconductor device and semiconductor device
US10008430B2 (en) 2014-05-21 2018-06-26 Mitsubishi Electric Corporation Semiconductor device, manufacturing apparatus for semiconductor device and manufacturing method for semiconductor device, and semiconductor module
US11417578B2 (en) 2014-05-21 2022-08-16 Mitsubishi Electric Corporation Semiconductor device, manufacturing apparatus for semiconductor device and manufacturing method for semiconductor device, and semiconductor module
US10950516B2 (en) 2017-05-02 2021-03-16 Abb Schweiz Ag Resin encapsulated power semiconductor module with exposed terminal areas
CN116682817A (en) * 2023-05-31 2023-09-01 海信家电集团股份有限公司 Intelligent power module and electronic equipment with same
CN116682817B (en) * 2023-05-31 2023-11-17 海信家电集团股份有限公司 Intelligent power module and electronic equipment with same

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Application publication date: 20120215