CN102254843B - Method for metalizing back of semiconductor chip applied to eutectic packaging - Google Patents
Method for metalizing back of semiconductor chip applied to eutectic packaging Download PDFInfo
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Abstract
The invention relates to a method for metalizing the back of a semiconductor chip applied to eutectic packaging, belonging to the technical field of integrated circuit or discrete device chip manufacturing. The method comprises the following steps of: step 1, plating non-noble metals such as aluminium or titanium, aluminium or chromium and aluminium on the surface of a silicon wafer back substrate in a manner of evaporating or sputtering at first; then, alloying at 300-400 DEG C in an atmosphere of N2 or H2 at 6.5 L/min, so that the non-noble metals and silicon are alloyed to form an adhesion layer; step 2, plating non-noble metals such as titanium, nickel and tin-copper alloy or vanadium, nickel and tin-copper alloy or chromium, nickel and tin-copper alloy on the surface of the adhesion layer in turn in a manner of evaporating or sputtering so as to form a barrier layer; and step 3, finally, plating a noble metal gold on the surface of the barrier layer in a manner of evaporating or sputtering so as to form a conductive layer. According to the method disclosed by the invention, the eutectic chip packaging requirement can be satisfied; the cost for metalizing the back of chip can be reduced; and the product reliability is improved.
Description
Technical field
The present invention relates to a kind of back face metalization method that is applicable to the semiconductor chip of eutectic packaging.Belong to integrated circuit or discrete device chip fabrication techniques field.
Background technology
In recent years, be subjected to fierce internationalization market competition and the shock effect of LED industry development, the semiconductor chip market competition is reached the decisive stage.Along with market competition continues upgrading, chip market is gradually from turning to take the product price competition as main competition situation with product quality competition and price competition and the competition situation of depositing.The cost of product, the reliability of product have become the main standard of weighing product competitiveness.And as critical process---the back face metalization of cost and quality in the discrete device manufacturing, because cost consumption is high, technique is outmoded, more and more be difficult to meet the needs of production.
Before the present invention made, the back face metalization technological process that is applicable to eutectic packaging commonly used had following two kinds:
Current technology one:
Step 3, plate the conductive layer of noble metal on the surface on barrier layer, what conductive layer adopted is Precious Metals-Gold again.
Weak point is:
1, the back face metalization layer process is stable not, easily causes catastrophic failure;
2, cooperate with follow-up packaging technology not good.
Current technology two:
Adhesion layer in step 1, the technique, barrier layer, conductive layer are comprised of the disposable individual layer Precious Metals-Gold that forms at silicon face of mode that adopts evaporation.
Weak point is: with high costs.
To sum up: two kinds of existing techniques also do not reach low cost, high stability, high reliability reaches and the composite request of follow-up packaging technology no-float.
Summary of the invention
The object of the invention is to overcome above-mentioned deficiency, provide a kind of and can reduce the semiconductor chip back face metalization method that is applicable to eutectic packaging that chip back metal changes into this and improves product reliability.
The object of the present invention is achieved like this: a kind of semiconductor chip back face metalization method that is applicable to eutectic packaging, and described method comprises following processing step:
Step 3, last adopt the mode of evaporation or sputter to plate Precious Metals-Gold on the surface on barrier layer again, form conductive layer.
The present invention is applicable to the semiconductor chip back face metalization method of eutectic packaging, and described step 1 base metal gross thickness is: 0.5 micron to 5 microns.
The present invention is applicable to the semiconductor chip back face metalization method of eutectic packaging, and in the described step 2, each layer metal thickness is respectively:
Titanium or chromium or vanadium: 0.05 micron to 0.2 micron;
Nickel: 0.1 micron to 0.5 micron;
Gun-metal: 1 micron to 4 microns.
In the described step 3, the thickness of gold layer is the 0.05-0.3 micron.
The invention has the beneficial effects as follows:
1, the present invention has changed traditional back face metalization structure ﹠processes, two kinds of different processing technologys of the evaporation of multilayer noble metal or sputter and alloy technique are combined, adopt the mode of step 1 that base metal layer and silicon are carried out alloy formation adhesion layer, greatly improved the reliability of back face metalization.Adopt cheap non-noble metal barrier layer to substitute the barrier layer of the precious metal alloys with high costs that may adopt in the current technology one; Adopt adhesion layer and the barrier layer of the noble metal with high costs of the alternative current technology two in cheap non-noble metal adhesion layer and barrier layer, effectively reduce the cost of back face metalization.
2, adopt non-noble metal adhesion layer to reach equally effect good with silicon adhesion, stable performance among the present invention, this base metal adhesion layer has reached the following basic demand to adhesion layer: itself do not form the high resistant compound with adjacent metal, can stop conductive layer and transition zone do not form the high resistant compound with silicon, can form with silicon good low ohmly contact, thermal coefficient of expansion is close with silicon.
3, adopt non-noble metal barrier layer to reach too among the present invention and up and down double layer of metal adhere to good, stable performance, corrosion, the barrier layer requirement of thermal expansion system between adhesion layer and conductive layer can anti-scolder welding the time.
If adopt other metals then can not reach above effect, be difficult to satisfy the requirement of eutectic load.
The present invention and current technology route contrast situation are seen Fig. 1.
Description of drawings
Fig. 1 back side metallization technology of the present invention and current technology comparison diagram.
Fig. 2 is semiconductor chip back face metalization structure section figure of the present invention.
Reference numeral among the figure:
Adhesion layer 3
Silicon chip back side substrate 4.
Embodiment
The present invention is applicable to the semiconductor chip back face metalization method of eutectic packaging, and described method comprises following processing step:
Step 3, last again on the barrier layer 2 surface adopt the mode of evaporation or sputter to plate Precious Metals-Gold, form conductive layer 1.
In the described step 1, titanium, aluminium or chromium, aluminium are metal composite layer, and the base metal gross thickness is: 0.5 micron to 5 microns.
In the described step 2, each layer metal thickness is respectively:
Titanium or chromium or vanadium: 0.05 micron to 0.2 micron;
Nickel: 0.1 micron to 0.5 micron;
Gun-metal: 1 micron to 4 microns.
In the described step 3, the thickness of gold layer is the 0.05-0.3 micron.
The concrete thickness of each metal level also needs to determine according to the demand of follow-up packaging technology.
Fig. 2 is semiconductor chip back face metalization structure section figure of the present invention.
Claims (3)
1. semiconductor chip back face metalization method that is applicable to eutectic packaging, it is characterized in that: described method comprises following processing step:
Step 1, on the surface of silicon chip back side substrate, adopt first the mode of evaporation or sputter to plate base metal aluminium or titanium or chromium, then at 300 ℃ of-400 ℃ of temperature and N
2Or H
2, carry out alloy under the 6.5L/min atmosphere, make base metal and silicon carry out alloy and form adhesion layer;
Step 2, adopt the mode of evaporation or sputter to plate successively base metal titanium, nickel, gun-metal or vanadium, nickel, gun-metal or chromium, nickel on the surface of adhesion layer again, gun-metal forms the barrier layer;
Step 3, last adopt the mode of evaporation or sputter to plate Precious Metals-Gold on the surface on barrier layer again, form conductive layer.
2. a kind of semiconductor chip back face metalization method that is applicable to eutectic packaging according to claim 1, it is characterized in that: described step 1 base metal gross thickness is: 0.5 micron to 5 microns.
3. a kind of semiconductor chip back face metalization method that is applicable to eutectic packaging according to claim 1 and 2, it is characterized in that: in the described step 2, each layer metal thickness is respectively:
Titanium or chromium or vanadium: 0.05 micron to 0.2 micron;
Nickel: 0.1 micron to 0.5 micron;
Gun-metal: 1 micron to 4 microns.
In the described step 3, the thickness of gold layer is the 0.05-0.3 micron.
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Families Citing this family (4)
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CN103963375B (en) * | 2013-01-30 | 2016-12-28 | 苏州同冠微电子有限公司 | Silicon chip back side metallization eutectic structure and manufacturing process thereof |
CN105489515B (en) * | 2015-12-30 | 2019-01-11 | 桂林斯壮微电子有限责任公司 | The eutectic welding method of semiconductor chip |
CN111489953A (en) * | 2019-01-25 | 2020-08-04 | 东莞新科技术研究开发有限公司 | Method for metalizing surface of semiconductor |
CN113299549A (en) * | 2021-05-21 | 2021-08-24 | 深圳市联冀电子有限公司 | Small signal tube core back gold process |
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US4065588A (en) * | 1975-11-20 | 1977-12-27 | Rca Corporation | Method of making gold-cobalt contact for silicon devices |
CN101465305A (en) * | 2008-10-22 | 2009-06-24 | 杭州士兰集成电路有限公司 | Back face metalization technological process and structure for chip low contact resistance |
CN101826472A (en) * | 2010-03-04 | 2010-09-08 | 江阴新顺微电子有限公司 | Multilayer metallizing method for composite material on back of chip |
CN101887862A (en) * | 2009-05-13 | 2010-11-17 | 华越微电子有限公司 | Silicon wafer back metalizing process for eutectic bonding |
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4065588A (en) * | 1975-11-20 | 1977-12-27 | Rca Corporation | Method of making gold-cobalt contact for silicon devices |
CN101465305A (en) * | 2008-10-22 | 2009-06-24 | 杭州士兰集成电路有限公司 | Back face metalization technological process and structure for chip low contact resistance |
CN101887862A (en) * | 2009-05-13 | 2010-11-17 | 华越微电子有限公司 | Silicon wafer back metalizing process for eutectic bonding |
CN101826472A (en) * | 2010-03-04 | 2010-09-08 | 江阴新顺微电子有限公司 | Multilayer metallizing method for composite material on back of chip |
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Address after: No.275 Binjiang Middle Road, Jiangyin Development Zone, Wuxi City, Jiangsu Province Patentee after: Jiangsu Xinshun Microelectronics Co.,Ltd. Address before: No.275 Binjiang Middle Road, Jiangyin Development Zone, Wuxi City, Jiangsu Province Patentee before: XINSUN Co.,Ltd. |