CN102208964A - System and method for realizing log likelihood ratio in digital system - Google Patents
System and method for realizing log likelihood ratio in digital system Download PDFInfo
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Abstract
The invention discloses a system for realizing a log likelihood ratio in a digital system. In the system, a log likelihood ratio (LLR) core processing unit is used for obtaining corresponding LLR intermediate values under different modulation modes according to ZN and a computational formula for the LLR intermediate values under the different modulation modes, and outputting the LLR intermediate values to a noise normalization unit; and the noise normalization unit is used for obtaining a final LLR value according to the LLR intermediate values. The invention also discloses a method for realizing the log likelihood radio in the digital system. The method comprises that: the LLR core processing unit obtains the corresponding LLR intermediate values under the different modulation modes according to the ZN and the computational formula for the LLR intermediate values under the different modulation modes, and outputs the LLR intermediate values to the noise normalization unit; and the noise normalization unit obtains the final LLR value according to the LLR intermediate values. By the system and the method provided by the invention, not only the bit error rate of signal reception and demodulation can be reduced, but also the problems of LLR computational complexity and demodulation performance can be combined.
Description
Technical field
The present invention is mainly used in digital communicating field, relates in particular in a kind of digital system z=Ax+N
oSignal is asked the realization system and method for log-likelihood ratio (LLR).
Background technology
Radio digital communication to broadband, high speed development, can not satisfy the demand by basic low-order-modulated mode.In order to improve spectrum efficiency, satisfy the business demand of high power system capacity and high data rate, increasing communication system adopts high-order modulating.But exponent number is high more, and high more for the receptivity requirement of receiver, the error rate is also just high more.
Because the influence of channel circumstance can make the reception constellation point with respect to the standard constellation point certain phase place rotation and expansion be arranged; The noise can make the position that receives constellation point uncertain.Suppose that received signal is y=hx+n
o, then receiving system generally all can be earlier according to following formula z=h
*Y=h
*Hx+h
*N
o=Ax+N
oEliminate the influence of the rotation of phase place, wherein, y represents the signal that receives, and h represents channel impulse response, and x represents the data that send, n
oExpression sends the noise of introducing in the data procedures, h
*The conjugate transpose of expression h, A represents h
*With the product of h, the A that occurs in the follow-up formula of this paper also is the implication here, N
oExpression h
*And n
oProduct; And then carry out the calculating of LLR value, to reduce the error rate of signal receiving demodulation.Though yet this scheme can reduce the error rate of signal receiving demodulation to a certain extent, can not take into account the problem of LLR computation complexity and demodulation performance two aspects.
Summary of the invention
In view of this, main purpose of the present invention is to provide the realization system and method for log-likelihood ratio in a kind of digital system, can not only reduce the error rate of signal receiving demodulation, and can take into account the problem of LLR computation complexity and demodulation performance two aspects.
For achieving the above object, technical scheme of the present invention is achieved in that
The realization system of log-likelihood ratio in a kind of digital system, this system comprises: LLR pretreatment unit, LLR core processing unit and noise normalized unit; Wherein,
Described LLR pretreatment unit is used for the Z signal of input is carried out obtaining Z after the preliminary treatment
N, the formula of employing is z
N=cz=c (Re{z}+Im{z}); Wherein, z=Ax+N
o, Re{z} represents the real part of plural Z, and Im{z} represents the imaginary part of plural Z, and c is the normalization coefficient of the constellation point of different modulating pattern;
Described LLR core processing unit is used for according to Z
NWith the computing formula of LLR median under the different modulating pattern, obtain LLR median corresponding under the different modulating pattern and export to noise normalization unit, described LLR median be LLR (Re, i) or LLR (Im, i);
Described noise normalization unit is used for obtaining final LLR value according to the LLR median, the computing formula of final LLR value be LLR=S * LLR (Re, i) or LLR=S * LLR (Im, i).
Wherein, described LLR pretreatment unit, be further used for adopting parallel-to-serial converter to obtain the Z median to the real part of Z signal and the imaginary part of input, for the Z median according to different modulating pattern corresponding selection square root numerical value after, adopt the displacement equivalent electric circuit that Z is exported in the square root numerical value of Z median and the corresponding selection back of multiplying each other
NGive the LLR core processing unit.
Wherein, described LLR core processing unit is further used for adopting the displacement equivalent electric circuit to realize multiply operation, adopts the addition/subtraction circuit to realize compare operation, the corresponding data of computing formula corresponding selection according to LLR median under the different modulating pattern are exported, and obtain the LLR median.
Wherein, described LLR pretreatment unit, the square root numerical value that is further used for corresponding selection is specially:
With
Wherein,
Wherein, described LLR core processing unit, the computing formula that is further used for LLR median under the different modulating pattern comprises:
Make z
N=cz=c (Re{z}+Im{z}), then:
A, for the BPSK modulating mode:
Make z '=Re{z
N, LLR (Re, 0)=Sz ' then;
B, for the QPSK modulating mode:
Make z '=Re{z
N, LLR (Re, 0)=Sz ' is then arranged;
Make z '=Im{z
N, LLR (Im, 0)=z ' is then arranged;
C, for the 16QAM modulating mode:
If make z '=Re{z
N, then have:
LLR(Re,1)=S·(2A-|z′|);
If make z ' Im{z
N, then have:
LLR(Im,1)=S·(2A-|z′|);
D, for the 64QAM modulating mode:
If make z '=Re{z
N, then have
If make z "=4A-|z ' |, then have:
LLR(Re,2)=S·(2A-|z″|);
If make z '=Im{z
N, then have
Make z "=4A-|z ' |, then have:
LLR(Im,2)=S·(2A-|z″|)。
The implementation method of log-likelihood ratio in a kind of digital system, this method comprises:
The LLR pretreatment unit carries out obtaining Z after the preliminary treatment to the Z signal of input
N, the formula of employing is z
N=cz=c (Re{z}+Im{z}) is with Z
NExport to the LLR core processing unit; Described z=Ax+N
o, described Re{z} represents the real part of plural Z, and described Im{z} represents the imaginary part of plural Z, and described c is the normalization coefficient of the constellation point of different modulating pattern;
The LLR core processing unit is according to Z
NWith the computing formula of LLR median under the different modulating pattern, obtain LLR median corresponding under the different modulating pattern and export to noise normalization unit, described LLR median be LLR (Re, i) or LLR (Im, i);
Noise normalization unit obtains final LLR value according to the LLR median, the computing formula of final LLR value be LLR=S * LLR (Re, i) or LLR=S * LLR (Im, i).
Wherein, described Z signal to input carries out obtaining Z after the preliminary treatment
NSpecifically comprise: the real part of Z signal and imaginary part to input adopt parallel-to-serial converter to obtain the Z median, for the Z median according to different modulating pattern corresponding selection square root numerical value after, adopt the displacement equivalent electric circuit that Z is exported in the square root numerical value of Z median and the corresponding selection back of multiplying each other
N
Wherein, the computing formula of LLR median comprises under the different modulating pattern:
Make z
N=cz=c (Re{z}+Im{z}), then:
A, for the BPSK modulating mode:
Make z '=Re{z
N, LLR (Re, 0)=Sz ' then;
B, for the QPSK modulating mode:
Make z '=Re{z
N, LLR (Re, 0)=Sz ' is then arranged;
Make z '=Im{z
N, LLR (Im, 0)=z ' is then arranged;
C, for the 16QAM modulating mode:
If make z '=Re{z
N, then have:
LLR(Re,1)=S·(2A-|z′|);
If make z ' Im{z
N, then have:
LLR(Im,1)=S·(2A-|z′|);
D, for the 64QAM modulating mode:
If make z '=Re{z
N, then have
If make z "=4A-|z ' |, then have:
LLR(Re,2)=S·(2A-|z″|);
If make z '=Im{z
N, then have
Make z "=4A-|z ' |, then have:
LLR(Im,2)=S·(2A-|z″|)。
LLR pretreatment unit of the present invention is used for the Z signal of input is carried out obtaining Z after the preliminary treatment
N, the formula of employing is z
N=cz=c (Re{z}+Im{z}); Wherein, z=Ax+N
o, Re{z} represents the real part of plural Z, and Im{z} represents the imaginary part of plural Z, and c is the normalization coefficient of the constellation point of different modulating pattern; The LLR core processing unit is used for according to Z
NWith the computing formula of LLR median under the different modulating pattern, obtain LLR median corresponding under the different modulating pattern and export to noise normalization unit, described LLR median be LLR (Re, i) or LLR (Im, i); Noise normalization unit is used for obtaining final LLR value according to the LLR median, the computing formula of final LLR value be LLR=S * LLR (Re, i) or LLR=S * LLR (Im, i).
Adopt of the present invention to z=Ax+N
oSignal is asked the scheme of LLR value, simplified the calculating of LLR value, and be applicable to the communication system of multiple modulating mode BPSK/QPSK/16QAM/64QAM, can not only reduce the error rate of signal receiving demodulation, and can take into account the problem of LLR computation complexity and demodulation performance two aspects, that is to say, not only reduced the error rate of Data Receiving demodulation in the digital communication, and simplifying the demodulation performance that has improved system on the LLR value complexity calculating basis.
Description of drawings
Fig. 1 realizes the system configuration schematic diagram of system for LLR of the present invention;
Fig. 2 realizes the electrical block diagram of LLR pretreatment unit one example of system for LLR of the present invention;
Fig. 3 realizes the electrical block diagram of LLR core processing unit one example of system for LLR of the present invention.
Embodiment
Basic thought of the present invention is: the LLR pretreatment unit is used for the Z signal of input is carried out obtaining Z after the preliminary treatment
N, the formula of employing is z
N=cz=c (Re{z}+Im{z}); Wherein, z=Ax+N
o, Re{z} represents the real part of plural Z, and Im{z} represents the imaginary part of plural Z, and c is the normalization coefficient of the constellation point of different modulating pattern; The LLR core processing unit is used for according to Z
NWith the computing formula of LLR median under the different modulating pattern, obtain LLR median corresponding under the different modulating pattern and export to noise normalization unit, described LLR median be LLR (Re, i) or LLR (Im, i); Noise normalization unit is used for obtaining final LLR value according to the LLR median, the computing formula of final LLR value be LLR=S * LLR (Re, i) or LLR=S * LLR (Im, i).
Be described in further detail below in conjunction with the enforcement of accompanying drawing technical scheme.
The realization system of log-likelihood ratio in a kind of digital system mainly comprises following content:
As shown in Figure 1, this system comprises: LLR pretreatment unit, LLR core processing unit and noise normalized unit.Wherein, the LLR pretreatment unit is used for the Z signal of input is carried out obtaining Z after the preliminary treatment
N, the formula of employing is z
N=cz=c (Re{z}+Im{z}); Wherein, z=Ax+N
o, Re{z} represents the real part of plural Z, and Im{z} represents the imaginary part of plural Z, and c is the normalization coefficient of the constellation point of different modulating pattern.Here, the Re in the literary composition is meant real part, and the Im in the literary composition is meant imaginary part, give an example at the relation of real part and imaginary part and plural Z, and such as plural z=a+bi, Re (z)=a, Im (z)=b.
The LLR core processing unit is used for according to Z
NWith the computing formula of LLR median under the different modulating pattern, obtain LLR median corresponding under the different modulating pattern and export to noise normalization unit, here, LLR median LLRi_temp be LLR (Re, i) or LLR (Im, i), i=0,1,2,3,4,5.
Noise normalization unit is used for obtaining final LLR value according to the LLR median, the computing formula of final LLR value be LLR=S * LLR (Re, i) or LLR=S * LLR (Im, i).
Further, the LLR pretreatment unit, be used for adopting parallel-to-serial converter to obtain the Z median to the real part of Z signal and the imaginary part of input, for the Z median according to different modulating pattern corresponding selection square root numerical value after, adopt the displacement equivalent electric circuit that Z is exported in the square root numerical value of Z median and the corresponding selection back of multiplying each other
NGive the LLR core processing unit.
Here it is to be noted: prior art is the computing of deciding coefficient to the normalization operation of input data, and the present invention all will import the shifting function that data conversion is data in order to simplify arithmetic logic.
Further, the LLR core processing unit is used for adopting earlier the displacement equivalent electric circuit to realize multiply operation, adopts the addition/subtraction circuit to realize compare operation then, exports according to the corresponding data of different modulating pattern corresponding selection at last, obtains the LLR median.
The implementation method of log-likelihood ratio in a kind of digital system, this method mainly comprises following content:
The LLR pretreatment unit carries out obtaining Z after the preliminary treatment to the Z signal of input
N, the formula of employing is z
N=cz=c (Re{z}+Im{z}); Wherein, z=Ax+N
o, Re{z} represents the real part of plural Z, and Im{z} represents the imaginary part of plural Z, and c is the normalization coefficient of the constellation point of different modulating pattern;
The LLR core processing unit is according to Z
NWith the computing formula of LLR median under the different modulating pattern, obtain LLR median corresponding under the different modulating pattern and export to noise normalization unit, here, LLR median LLR_temp be LLR (Re, i) or LLR (Im, i), i=0,1,2,3,4,5;
Noise normalization unit is used for obtaining final LLR value according to the LLR median, the computing formula of final LLR value be LLR=S * LLR (Re, i) or LLR=S * LLR (Im, i).
In sum, adopt the present invention, this to z=Ax+N
oSignal is asked the scheme of LLR value, has reduced the error rate of Data Receiving demodulation in the digital communication, has improved the demodulation performance joint; By variation, make the LLR that is applicable to multiple modulating mode BPSK/QPSK/16QAM/64QAM realize that the hardware implementation structure of system is more unified to the LLR computing formula.
Below to the present invention's elaboration of giving an example.
Fig. 2 realizes the electrical block diagram of LLR pretreatment unit one example of system for LLR of the present invention, and the LLR pretreatment unit at first adopts parallel-to-serial converter to obtain Z median z_temp value to real part and the imaginary part of z, to carry out resource multiplex; Then the z_temp value is multiplied by respectively
With
Wherein multiply operation adopts the displacement equivalent electric circuit to realize; Select wherein one the tunnel to export according to modulating mode at last, obtain z
N=cz exports to the LLR core processing unit.Wherein,
With
Quantification as shown in the following Table 1.
Table 1
Fig. 3 realizes the electrical block diagram of LLR core processing unit one example of system for LLR of the present invention, the LLR core processing unit at first adopts the displacement equivalent electric circuit to realize multiply operation, the addition/subtraction circuit is realized compare operation then, export according to the corresponding data of the different choice of modulation system at last, obtain the median LLRi_temp value under the LLR different modulating pattern.The computing formula of the median under the different modulating pattern is as follows:
Make z
N=cz=c (Re{z}+Im{z}), then:
1, for the BPSK modulating mode:
Make z '=Re{z
N, LLR (Re, 0)=Sz ' then;
2, for the QPSK modulating mode:
Make z '=Re{z
N, LLR (Re, 0)=Sz ' is then arranged;
Make z '=Im{z
N, LLR (Im, 0)=z ' is then arranged;
3, for the 16QAM modulating mode:
If make z '=Re{z
N, then have:
LLR(Re,1)=S·(2A-|z′|);
If make z '=Im{z
N, then have:
LLR(Im,1)=S·(2A-|z′|);
4, for the 64QAM modulating mode:
If make z '=Re{z
N, then have
If make z "=4A-|z ' |, then have:
LLR(Re,2)=S·(2A-|z″|);
If make z '=Im{z
N, then have
Make z "=4A-|z ' |, then have:
LLR(Im,2)=S·(2A-|z″|)。
Among Fig. 3, corresponding implication is as shown in the following Table 2 under the different modulating pattern for LLR0_temp, LLR1_temp and LLR2_temp:
Also need calculate at the LLR core processing unit:
S is a variable that defines in the computational process, and the S that adopts in the noise normalized unit refers to is exactly the S here.
If LLR pretreatment unit, LLR core processing unit adopt above-mentioned as Fig. 2, specific implementation shown in Figure 3 respectively, then Dui Ying noise normalized unit mainly adopts division circuit to realize following function:
LLR(0)=S×LLR(Re,0)
LLR(1)=S×LLR(Im,0)
LLR(2)=S×LLR(Re,1)
LLR(3)=S×LLR(Im,1)
LLR(4)=S×LLR(Re,2)
LLR(5)=S×LLR(Im,2)
Wherein
Here it is to be noted: for z=Ax+N
oSignal also obtains one of them bit b by following formula
kThe LLR value:
Wherein
Be that all k positions are the set of 0 constellation point;
Be that all k positions are the set of 1 constellation point.X (data that representative sends) is distributed on the integer lattice, can determine the expression formula of each interval LLR value according to the input of z (data that representative receives).The above-mentioned a series of formula mentioned of the present invention are equivalent result of formula here, do not do and give unnecessary details.
The above is preferred embodiment of the present invention only, is not to be used to limit protection scope of the present invention.
Claims (9)
1. the realization system of log-likelihood ratio in the digital system is characterized in that this system comprises: LLR pretreatment unit, LLR core processing unit and noise normalized unit; Wherein,
Described LLR pretreatment unit is used for the Z signal of input is carried out obtaining Z after the preliminary treatment
N, the formula of employing is z
N=cz=c (Re{z}+Im{z}); Wherein, z=Ax+N
o, Re{z} represents the real part of plural Z, and Im{z} represents the imaginary part of plural Z, and c is the normalization coefficient of the constellation point of different modulating pattern;
Described LLR core processing unit is used for according to Z
NWith the computing formula of LLR median under the different modulating pattern, obtain LLR median corresponding under the different modulating pattern and export to noise normalization unit, described LLR median be LLR (Re, i) or LLR (Im, i);
Described noise normalization unit is used for obtaining final LLR value according to the LLR median, the computing formula of final LLR value be LLR=S * LLR (Re, i) or LLR=S * LLR (Im, i).
2. system according to claim 1, it is characterized in that, described LLR pretreatment unit, be further used for adopting parallel-to-serial converter to obtain the Z median to the real part of Z signal and the imaginary part of input, for the Z median according to different modulating pattern corresponding selection square root numerical value after, adopt the displacement equivalent electric circuit that Z is exported in the square root numerical value of Z median and the corresponding selection back of multiplying each other
NGive the LLR core processing unit.
3. system according to claim 1, it is characterized in that, described LLR core processing unit, be further used for adopting the displacement equivalent electric circuit to realize multiply operation, adopt the addition/subtraction circuit to realize compare operation, the corresponding data of computing formula corresponding selection according to LLR median under the different modulating pattern are exported, and obtain the LLR median.
5. system according to claim 3 is characterized in that, described LLR core processing unit, and the computing formula that is further used for LLR median under the different modulating pattern comprises:
Make z
N=cz=c (Re{z}+Im{z}), then:
A, for the BPSK modulating mode:
Make z '=Re{z
N, LLR (Re, 0)=Sz ' then;
B, for the QPSK modulating mode:
Make z '=Re{z
N, LLR (Re, 0)=Sz ' is then arranged;
Make z '=Im{z
N, LLR (Im, 0)=z ' is then arranged;
C, for the 16QAM modulating mode:
If make z '=Re{z
N, then have:
LLR(Re,1)=S·(2A-|z′|);
If make z ' Im{z
N, then have:
LLR(Im,1)=S·(2A-|z′|);
D, for the 64QAM modulating mode:
If make z '=Re{z
N, then have
If make z "=4A-|z ' |, then have:
LLR(Re,2)=S·(2A-|z″|);
If make z '=Im{z
N, then have
Make z "=4A-|z ' |, then have:
LLR(Im,2)=S·(2A-|z″|)。
6. the implementation method of log-likelihood ratio in the digital system is characterized in that this method comprises:
The LLR pretreatment unit carries out obtaining Z after the preliminary treatment to the Z signal of input
N, the formula of employing is z
N=cz=c (Re{z}+Im{z}) is with Z
NExport to the LLR core processing unit; Described z=Ax+N
o, described Re{z} represents the real part of plural Z, and described Im{z} represents the imaginary part of plural Z, and described c is the normalization coefficient of the constellation point of different modulating pattern;
The LLR core processing unit is according to Z
NWith the computing formula of LLR median under the different modulating pattern, obtain LLR median corresponding under the different modulating pattern and export to noise normalization unit, described LLR median be LLR (Re, i) or LLR (Im, i);
Noise normalization unit obtains final LLR value according to the LLR median, the computing formula of final LLR value be LLR=S * LLR (Re, i) or LLR=S * LLR (Im, i).
7. method according to claim 6 is characterized in that, described Z signal to input carries out obtaining Z after the preliminary treatment
NSpecifically comprise: the real part of Z signal and imaginary part to input adopt parallel-to-serial converter to obtain the Z median, for the Z median according to different modulating pattern corresponding selection square root numerical value after, adopt the displacement equivalent electric circuit that Z is exported in the square root numerical value of Z median and the corresponding selection back of multiplying each other
N
9. according to each described method in the claim 6 to 8, it is characterized in that the computing formula of LLR median comprises under the different modulating pattern:
Make z
N=cz=c (Re{z}+Im{z}), then:
A, for the BPSK modulating mode:
Make z '=Re{z
N, LLR (Re, 0)=Sz ' then;
B, for the QPSK modulating mode:
Make z '=Re{z
N, LLR (Re, 0)=Sz ' is then arranged;
Make z '=Im{z
N, LLR (Im, 0)=z ' is then arranged;
C, for the 16QAM modulating mode:
If make z '=Re{z
N, then have:
LLR(Re,1)=S·(2A-|z′|);
If make z ' Im{z
N, then have:
LLR(Im,1)=S·(2A-|z′|);
D, for the 64QAM modulating mode:
If make z '=Re{z
N, then have
If make z "=4A-|z ' |, then have:
LLR(Re,2)=S·(2A-|z″|);
If make z '=Im{z
N, then have
Make z "=4A-|z ' |, then have:
LLR(Im,2)=S·(2A-|z″|)。
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107294645A (en) * | 2016-03-31 | 2017-10-24 | 展讯通信(上海)有限公司 | Obtain the method and its device, maximum likelihood detection method of equivalent received signals |
CN107809402A (en) * | 2016-09-09 | 2018-03-16 | 电信科学技术研究院 | A kind of method and apparatus being demodulated |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101305575A (en) * | 2005-11-11 | 2008-11-12 | 三星电子株式会社 | Method and apparatus for normalizing input metric to a channel decoder in a wireless communication system |
US20090231028A1 (en) * | 2008-03-12 | 2009-09-17 | Nec Laboratories America, Inc. | Two-stage low-complexity max-log bit-level llr calculator and method |
CN101540752A (en) * | 2008-03-18 | 2009-09-23 | 卓胜微电子(上海)有限公司 | Method for softly demodulating QAM |
CN101883063A (en) * | 2009-05-08 | 2010-11-10 | 中兴通讯股份有限公司 | Iterative detecting method and device |
CN101960806A (en) * | 2008-03-28 | 2011-01-26 | 高通股份有限公司 | Be used for approaching the system and method for log-likelihood ratio in communication system |
-
2011
- 2011-05-25 CN CN2011101373231A patent/CN102208964A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101305575A (en) * | 2005-11-11 | 2008-11-12 | 三星电子株式会社 | Method and apparatus for normalizing input metric to a channel decoder in a wireless communication system |
US20090231028A1 (en) * | 2008-03-12 | 2009-09-17 | Nec Laboratories America, Inc. | Two-stage low-complexity max-log bit-level llr calculator and method |
CN101540752A (en) * | 2008-03-18 | 2009-09-23 | 卓胜微电子(上海)有限公司 | Method for softly demodulating QAM |
CN101960806A (en) * | 2008-03-28 | 2011-01-26 | 高通股份有限公司 | Be used for approaching the system and method for log-likelihood ratio in communication system |
CN101883063A (en) * | 2009-05-08 | 2010-11-10 | 中兴通讯股份有限公司 | Iterative detecting method and device |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107294645A (en) * | 2016-03-31 | 2017-10-24 | 展讯通信(上海)有限公司 | Obtain the method and its device, maximum likelihood detection method of equivalent received signals |
CN107294645B (en) * | 2016-03-31 | 2019-11-01 | 展讯通信(上海)有限公司 | Obtain method and device thereof, the maximum likelihood detection method of equivalent received signals |
CN107809402A (en) * | 2016-09-09 | 2018-03-16 | 电信科学技术研究院 | A kind of method and apparatus being demodulated |
CN107809402B (en) * | 2016-09-09 | 2021-05-18 | 电信科学技术研究院 | Method and equipment for demodulating |
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