CN102180441B - Micro electromechanical device and manufacturing method thereof - Google Patents
Micro electromechanical device and manufacturing method thereof Download PDFInfo
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- CN102180441B CN102180441B CN 201110082536 CN201110082536A CN102180441B CN 102180441 B CN102180441 B CN 102180441B CN 201110082536 CN201110082536 CN 201110082536 CN 201110082536 A CN201110082536 A CN 201110082536A CN 102180441 B CN102180441 B CN 102180441B
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Abstract
The invention provides a micro electromechanical device and a manufacturing method thereof. The manufacturing method comprises the following steps of: providing a base plate and a semiconductor substrate, wherein a control circuit is formed on the semiconductor substrate; forming a base plate sacrificial layer on the base plate; forming a semiconductor material layer on the base plate sacrificiallayer; forming an interlayer dielectric layer covering the control circuit on the semiconductor substrate, wherein an interconnection structure electrically connected with the control circuit is formed on the interlayer dielectric layer; performing a bonding process to bond the interlayer dielectric layer and the semiconductor material layer together; removing the base plate sacrificial layer, and separating the base plate and the semiconductor material layer; and manufacturing the micro electromechanical device electrically connected with the interconnection structure on the semiconductor substrate by using the semiconductor material layer. The embodiment of the invention improves the integration level of the micro electromechanical device to meet the requirement on portability in application.
Description
Technical field
The embodiment of the invention relates to technical field of semiconductors, particularly microelectromechanicdevices devices and preparation method thereof.
Background technology
MEMS (Micro Electro Mechanical System, microelectromechanicdevices devices) technology is meant the technology that micrometer/nanometer (micro/nanotechnology) material is designed, processes, makes, measures and controls.MEMS is the microsystem that is integrated into an integral unit by mechanical component, optical system, driver part, electric-control system.The MEMS technology is applied in the making of micro electro mechanical device usually, and said micro electro mechanical device comprises: position transducer, whirligig or inertial sensor, said inertial sensor is acceleration transducer, gyroscope and sound transducer for example.
Prior art utilizes the MEMS technology on a Semiconductor substrate, to make micro electro mechanical device; Utilize the CMOS technology on second half conductive substrate, to make control circuit then; Utilize lead frame (Leadframe) that control circuit is electrically connected with micro electro mechanical device then, thereby form microelectromechanicdevices devices.Therefore, existing microelectromechanicdevices devices need utilize two semiconductor chip fabrication, thereby makes that the cost of existing microelectromechanicdevices devices is higher.Usually; The Semiconductor substrate that contains control circuit is to be arranged in side by side in the lead frame with the Semiconductor substrate that is formed with micro electro mechanical device, and therefore, the volume of existing microelectromechanicdevices devices is bigger; Thereby the integrated level of microelectromechanicdevices devices is not high, can't satisfy requirement portable in the application.
, publication number can also find more information in being the one Chinese patent application of CN1935630A about existing microelectromechanicdevices devices.
Summary of the invention
The problem that the embodiment of the invention solves has provided a kind of microelectromechanicdevices devices, has improved the integrated level of microelectromechanicdevices devices, has reduced the integrated level of microelectromechanicdevices devices, has satisfied the requirement of portability in using.
For addressing the above problem, the embodiment of the invention provides a kind of manufacture method of microelectromechanicdevices devices, comprising:
Substrate and Semiconductor substrate are provided, are formed with control circuit on the said Semiconductor substrate;
On said substrate, form the substrate sacrifice layer;
On said substrate sacrifice layer, form semiconductor material layer;
On said Semiconductor substrate, form the interlayer dielectric layer that covers said control circuit, be formed with interconnection structure in the said interlayer dielectric layer, said interconnection structure is electrically connected with said control circuit;
Carry out bonding technology, said interlayer dielectric layer and semiconductor material layer are bonded together;
Remove said substrate sacrifice layer, said substrate is separated with said semiconductor material layer;
Utilize said semiconductor material layer on said Semiconductor substrate, to make micro electro mechanical device, said micro electro mechanical device is electrically connected with above-mentioned control circuit through said interconnection structure.
Alternatively, said semiconductor material layer is any one in polysilicon layer, amorphous silicon layer, SiGe layer, germanium layer or its combination.
Alternatively, the material of said substrate sacrifice layer is an amorphous carbon, and the removal method of said substrate sacrifice layer is to utilize the plasma of oxonium ion to carry out cineration technics, and the temperature range of said cineration technics is 150～450 degrees centigrade.
Alternatively, said bonding technology is anode linkage or Direct Bonding.
Alternatively, said anode linkage technology comprises:
Said substrate and Semiconductor substrate are positioned in the electric field, and said semiconductor material layer and said interlayer dielectric layer are over against setting;
Said substrate and Semiconductor substrate are heated.
Alternatively, the material of said substrate sacrifice layer and substrate sacrifice layer is an amorphous carbon, and said Direct Bonding technology comprises:
Said semiconductor material layer and interlayer dielectric layer are carried out flatening process;
Semiconductor material layer behind the flatening process and interlayer dielectric layer are carried out cleaning surfaces;
Adopt the surface of hydrionic plasma-activated said semiconductor material layer and interlayer dielectric layer;
Over against placement, make said substrate and Semiconductor substrate overlap said semiconductor material layer and interlayer dielectric layer;
Said substrate and Semiconductor substrate be positioned in 150～600 degrees centigrade the hot environment heat treatment 5～30 hours.
Alternatively, the manufacture method of said interlayer dielectric layer comprises:
On said Semiconductor substrate, form first dielectric layer;
In said first dielectric layer, form interconnection structure, said interconnection structure is electrically connected with said control circuit;
On said first dielectric layer, form second dielectric layer, said second dielectric layer and first dielectric layer constitute said interlayer dielectric layer;
In said second dielectric layer, form the substrate sacrifice layer, the position of said substrate sacrifice layer is corresponding with the position of said interconnection structure.
Alternatively, the manufacture method of said micro electro mechanical device comprises:
The said semiconductor material layer of etching forms movable electrode, is formed with through hole in the said movable electrode, and said through hole exposes the substrate sacrifice layer of below;
Utilize said through hole to remove said substrate sacrifice layer, in said second dielectric layer, form cavity, said movable electrode is suspended on the said cavity.
Alternatively, before forming the substrate sacrifice layer on the said substrate, also comprise:
On said substrate, form the step of first resilient coating, said first resilient coating is used to reduce the stress between said substrate and the said substrate sacrifice layer.
Alternatively, after said substrate sacrifice layer forms, also comprise: on said substrate sacrifice layer, form the step of second resilient coating, said second resilient coating is used to reduce the stress between said substrate sacrifice layer and the said semiconductor material layer.
Alternatively, before carrying out bonding technology, also comprise:
On said interlayer dielectric layer, make the step of three buffer layer, said three buffer layer is used to reduce the stress between said semiconductor material layer and the said interlayer dielectric layer.
Alternatively, the material of said first resilient coating, second resilient coating and three buffer layer is the insulation material, and said insulation material is silica or silicon oxynitride.
Correspondingly, the present invention also provides a kind of microelectromechanicdevices devices, comprising:
Semiconductor substrate is formed with control circuit in the said Semiconductor substrate;
Interlayer dielectric layer is positioned on the said Semiconductor substrate;
Interconnection structure is positioned at said interlayer dielectric layer, and said interconnection structure is electrically connected with said control circuit;
Cavity is positioned at said interlayer dielectric layer, and the position of said cavity is corresponding with the position of said interconnection structure;
Movable electrode, an end of said movable electrode is electrically connected with said interconnection structure, and the said movable electrode other end is suspended on the cavity, and the material of said movable electrode is a semiconductor material.
Alternatively, said semiconductor material layer is any one in polysilicon layer, amorphous silicon layer, SiGe layer, germanium layer or its combination.
Compared with prior art, the embodiment of the invention has the following advantages:
The embodiment of the invention is bonded together through semiconductor material layer and the interlayer dielectric layer on the Semiconductor substrate that bonding technology will be formed on the substrate; Then through the substrate sacrifice layer between substrate and the semiconductor material layer is removed; Thereby said semiconductor material layer and interlayer dielectric layer are bonded together, said substrate is separated with said Semiconductor substrate; Then, utilize said semiconductor material layer to make micro electro mechanical device, thereby on said Semiconductor substrate, make micro electro mechanical device; The manufacture method of the microelectromechanicdevices devices of prior art is: two Semiconductor substrate are provided, utilize a Semiconductor substrate to make micro electro mechanical device, utilize another semiconductor fabrication control circuit; Said two Semiconductor substrate are listed in the same lead frame; The volume of the microelectromechanicdevices devices of prior art is bigger, and compared with prior art, the embodiment of the invention is integrated in micro electro mechanical device and control circuit with on the semi-conductive substrate; Not only reduced the cost of manufacture of microelectromechanicdevices devices; And reduced the volume of microelectromechanicdevices devices, improved the integrated level of microelectromechanicdevices devices, thus satisfied use in portable requirement.
Description of drawings
Fig. 1 is the microelectromechanicdevices devices manufacture method schematic flow sheet of the embodiment of the invention;
Fig. 2～Fig. 7 is the manufacture method cross-sectional view of the microelectromechanicdevices devices of one embodiment of the invention.
Embodiment
The microelectromechanicdevices devices of prior art adopts two Semiconductor substrate to make; One of them Semiconductor substrate is used to make control circuit, and another Semiconductor substrate is used to make micro electro mechanical device, is arranged in two Semiconductor substrate in the lead frame side by side then; Therefore; The volume of existing microelectromechanicdevices devices is bigger, thereby the integrated level of microelectromechanicdevices devices is not high, can't satisfy requirement portable in the application.And prior art utilizes two Semiconductor substrate to make a microelectromechanicdevices devices, and cost is higher.
Because the material of the movable electrode of micro electro mechanical device is generally semiconductor material layer; Said semiconductor material layer can be polysilicon layer, and said polysilicon layer utilizes chemical vapor deposition method to make usually, and the temperature of said chemical vapor deposition method is a high temperature; Said high temperature is greater than 500 degrees centigrade; Said high temperature can influence the interconnection structure on the Semiconductor substrate, therefore, can not directly be formed with deposit spathic silicon layer on the Semiconductor substrate of interconnection structure.
Therefore; The inventor consider to provide one be formed with semiconductor material layer substrate, said semiconductor material layer can be in amorphous silicon layer, polysilicon layer, SiGe layer, germanium layer or its combination any one, then with the semiconductor material layer and the Semiconductor substrate bonding that is formed with control circuit of this substrate; Then said substrate is removed (being about to said substrate separates with said semiconductor material layer) from semiconductor material layer; Make said semiconductor material layer be transferred to Semiconductor substrate, utilize said semiconductor material layer to make micro electro mechanical device then, thereby micro electro mechanical device and control circuit are integrated in on the semi-conductive substrate; Not only practiced thrift a Semiconductor substrate; Reduce the cost of manufacture of microelectromechanicdevices devices, but also can improve the integrated level of microelectromechanicdevices devices, improved the portability of microelectromechanicdevices devices.
The present invention considers to utilize silicon-on-insulator substrate (SOI substrate; Comprise silicon substrate, be positioned at the insulating barrier of silicon substrate and be positioned at the silicon layer on the said insulating barrier) as said substrate; With said silicon-on-insulator substrate and the Semiconductor substrate bonding that is formed with control circuit; Then silicon substrate is separated with said silicon layer with insulating barrier; Said silicon layer is transferred on the Semiconductor substrate, thereby can micro electro mechanical device and silicon substrate be integrated in on the semi-conductive substrate, thus the integrated level of raising microelectromechanicdevices devices.But the price of silicon-on-insulator substrate is expensive partially, makes that the cost of microelectromechanicdevices devices is higher.
In order to address the above problem, the present invention provides a kind of manufacture method of microelectromechanicdevices devices, please refer to the manufacture method schematic flow sheet of microelectromechanicdevices devices of the present invention shown in Figure 1, and said method comprises:
Step S1 provides substrate and Semiconductor substrate, is formed with control circuit on the said Semiconductor substrate;
Step S2 forms the substrate sacrifice layer on said substrate;
Step S3 forms semiconductor material layer on said substrate sacrifice layer;
Step S4 forms the interlayer dielectric layer that covers said control circuit on said Semiconductor substrate, be formed with interconnection structure in the said interlayer dielectric layer, and said interconnection structure is electrically connected with said control circuit;
Step S5 carries out bonding technology, and said interlayer dielectric layer and semiconductor material layer are bonded together;
Step S6 removes said substrate sacrifice layer, and said substrate is separated with said semiconductor material layer;
Step S7 utilizes said semiconductor material layer on said Semiconductor substrate, to make micro electro mechanical device, and said micro electro mechanical device is electrically connected with above-mentioned control circuit through said interconnection structure.
Below in conjunction with concrete embodiment technical scheme of the present invention is carried out detailed explanation.For technical scheme of the present invention is described better, please combine the manufacture method cross-sectional view of microelectromechanicdevices devices of the one embodiment of the invention of Fig. 2～shown in Figure 7.
At first, please refer to Fig. 2, substrate 200 is provided, the material of said substrate 200 can be semiconductor material, and said semiconductor material can be silicon or germanium silicon etc.Said substrate 200 is used to provide platform, in follow-up processing step, makes substrate sacrifice layer and semiconductor material layer.
Then, please continue with reference to figure 2, on said substrate 200, form first resilient coating 201, said first resilient coating 201 is used to reduce the stress between the substrate sacrifice layer of said substrate 200 and follow-up formation.The thickness range of said first resilient coating 201 is 20～5000 dusts.The material of said first resilient coating 201 is the insulation material, and for example said insulation material can be silica or silicon oxynitride.As another embodiment of the present invention, also can on said substrate 200, not form said resilient coating 201, directly carry out follow-up step, promptly directly on said substrate, form the substrate sacrifice layer.
Then, please continue, on said first resilient coating 201, form substrate sacrifice layer 202 with reference to figure 2.To in follow-up step, form semiconductor material layer on the said substrate sacrifice layer 202, in follow-up processing step, can said semiconductor material layer be separated with said substrate 200 through removing said substrate sacrifice layer 202.
The material of said substrate sacrifice layer 202 should be selected the material that is easy to remove.Damage semiconductor material layer when preventing to remove said substrate sacrifice layer 202, the material of said substrate sacrifice layer 202 should select to have with said semiconductor material layer the material of big etching selection ratio.The described said substrate sacrifice layer 202 of the embodiment of the invention has big etching selection ratio with said semiconductor material layer; Be meant when the etching technics that utilizes the embodiment of the invention is removed said substrate sacrifice layer 202; The etch rate of said substrate sacrifice layer 202 is much larger than the etch rate of said semiconductor material layer; Such as, the etch rate of said substrate sacrifice layer 202 can be more than 3 times of etch rate of said semiconductor material layer.
As an embodiment, the material of said substrate sacrifice layer 202 is an amorphous carbon, and its thickness range is 1000～10000 dusts.Said amorphous carbon can utilize the cineration technics of the plasma of oxonium ion to remove, and the temperature range of said cineration technics is preferably 150～450 degrees centigrade, so can residual said substrate sacrifice layer 202 on, can not damage semiconductor material layer yet.In another embodiment, said substrate sacrifice layer can also be photoresist layer or other sacrificial layer material.Need to prove; If the material of said substrate sacrifice layer is a photoresist layer, the temperature of the technology of the said semiconductor material layer of follow-up formation should be not too high, in the present embodiment; The temperature that forms the technology of said semiconductor material layer should not surpass 150 degrees centigrade, in order to avoid said photoresist layer is burnt.
As an embodiment, the manufacture method of said substrate sacrifice layer 202 is plasma enhanced chemical vapor deposition (PECVD) technology.The parameter of said plasma reinforced chemical vapour deposition technology is: temperature range is 250 ℃～500 ℃; Air pressure range is 1torr～20torr; The RF power bracket is 800W～2000W; Reacting gas comprises: C3H6 and HE, reaction gas flow are that the volume ratio scope of 1000sccm～5000sccm, wherein C3H6: HE is 2: 1～10: 1.
As optional embodiment of the present invention; After said substrate sacrifice layer 202 forms; On said substrate sacrifice layer 202, form second resilient coating 203, said second resilient coating 203 is used to cushion the stress between the semiconductor material layer of said substrate sacrifice layer 202 and follow-up formation.The material of said second resilient coating 203 is the insulation material, and for example said insulation material can be silica or silicon oxynitride.The thickness range of said second resilient coating 203 is 20～5000 dusts.In another embodiment, can there be this second resilient coating yet.
Then; Please continue with reference to figure 2; On said second resilient coating 203, make semiconductor material layer 204; Said semiconductor material layer 204 will combine with the Semiconductor substrate that is formed with control circuit through bonding technology, and in follow-up processing step, said semiconductor material layer 204 will be used to make the movable electrode of micro electro mechanical device.The material of said semiconductor material layer 204 should be selected semiconductor material, and for example said semiconductor material layer 204 can be in amorphous silicon layer, polysilicon layer, germanium silicon compound layer, germanium layer or its combination any one.
As an embodiment, said semiconductor material layer 204 utilizes chemical vapor deposition method to make.The temperature of said chemical vapor deposition method is not less than 500 degrees centigrade.The thickness range of said semiconductor material layer 204 is 0.5～50 micron.
Then, please refer to Fig. 3, Semiconductor substrate 100 is provided, the material of said Semiconductor substrate 100 is a semiconductor material, and the material of said Semiconductor substrate 100 can be silicon or germanium silicon.Also be formed with the control circuit (not shown) in the said Semiconductor substrate 100.Said control circuit can utilize cmos process flow to make.Said control circuit can be used for to the micro electro mechanical device of follow-up formation control signal being provided.
Then; Please continue with reference to figure 3; On said Semiconductor substrate 100, form first dielectric layer 101; Be formed with interconnection structure in said first dielectric layer 101, said interconnection structure comprises first conductive plunger 102 that is electrically connected with said control circuit and the interconnection line 103 that is electrically connected with said first conductive plunger 102.The material of said first dielectric layer 101 is silica or silicon oxynitride, and said first dielectric layer 101 can utilize oxidation technology or chemical vapor deposition method to make.
Then, please continue, on said first dielectric layer 101, form second dielectric layer 104, said second dielectric layer 104 and first dielectric layer, 101 common formation interlayer dielectric layers with reference to figure 3.The material of said second dielectric layer 104 is silica or silicon nitride, and said second dielectric layer 104 can utilize oxidation technology or chemical vapor deposition method to make.
Then, in said second dielectric layer 104, form groove, said groove exposes first dielectric layer 101 of below, and the position of said groove is corresponding with the position of said interconnection structure.The position of groove of the present invention is corresponding with the position of said interconnection structure, and said groove is on second dielectric layer between the adjacent interconnection structure.
Need to prove; As another embodiment of the present invention; One deck interlayer dielectric layer be can also only on said Semiconductor substrate 100, form, interconnection structure that is electrically connected with said control circuit and the said groove that is filled with sacrifice layer in said interlayer dielectric layer, formed then respectively.The position of said groove is corresponding with the position of said interconnection structure.
Then; In said groove, form substrate sacrifice layer 105; Said substrate sacrifice layer 105 is used in follow-up step and is positioned at semiconductor material layer 204 bondings on the said substrate 200; After said semiconductor material layer 204 was made into to movable electrode, said substrate sacrifice layer 105 finally will be removed.
Said second dielectric layer 104 is caused damage when preventing to remove said substrate sacrifice layer 105, the material of said substrate sacrifice layer 105 should select to have with said second dielectric layer 104 material of big etching selection ratio.The described said substrate sacrifice layer 10 of the embodiment of the invention has big etching selection ratio with said second dielectric layer 104; Be meant when the etching technics that utilizes the embodiment of the invention is removed said substrate sacrifice layer 105; The etch rate of said substrate sacrifice layer 105 is much larger than the etch rate of said second dielectric layer 104; Such as, the etch rate of said substrate sacrifice layer 105 can be more than 3 times of etch rate of said second dielectric layer 104.
As an embodiment, the material of said substrate sacrifice layer 105 is an amorphous carbon, and it can utilize enhancement mode plasma activated chemical vapour deposition technology to make.Concrete parameter please refer to the method that the present invention makes substrate sacrifice layer 202, does not do at this and gives unnecessary details.As another embodiment of the present invention, the material of said substrate sacrifice layer 105 can also be easy to the sacrificial layer material removed through cineration technics or wet-etching technology for photoresist or other.As an embodiment, when the material of said substrate sacrifice layer 105 was photoresist layer, the temperature of follow-up bonding technology was unsuitable too high, and the temperature of for example follow-up bonding technology is no more than 150 degrees centigrade, in order to avoid photoresist is burnt.
Because in the subsequent step; To carry out bonding technology; Thereby said second dielectric layer 104 will be bonded together with said semiconductor material layer 204 (combining Fig. 2), and the substrate sacrifice layer 105 in said second dielectric layer 104 also will be bonded together with said semiconductor material layer 204.Because the material of substrate sacrifice layer 105 is an amorphous carbon; The material of said semiconductor material layer 204 is a silicon; Have stress between the two, said stress can influence the reliability of the bonding of the said semiconductor material layer 204 and second dielectric layer 104, makes said semiconductor material layer 204 to come off from said second dielectric layer 104; Therefore, in order to improve the reliability of the bonding between said semiconductor material layer 204 and the substrate sacrifice layer 105.
As an optional embodiment of the present invention, after said substrate sacrifice layer 105 forms, also on said second dielectric layer 104, form three buffer layer 106.The material of said three buffer layer 106 can be silica or silicon oxynitride.The thickness range of said three buffer layer 106 is 20～5000 dusts, and said three buffer layer 106 can utilize chemical vapor deposition method to make.Certainly can there be this three buffer layer in other embodiments yet.
Then; Please refer to Fig. 4; Carry out bonding technology; Said three buffer layer 106 and semiconductor material layer 204 are bonded together, make said substrate 200, be positioned at first resilient coating 201 on the substrate 200, substrate sacrifice layer 202, second resilient coating 203 and said Semiconductor substrate 100, first dielectric layer 101, second dielectric layer 104 that are positioned on the said Semiconductor substrate 100 form whole.Above-mentioned bonding technology forms firm bonding face between said three buffer layer 106 said semiconductor material layers 204.
Said bonding technology can be anode linkage technology or Direct Bonding technology.
As an embodiment, said bonding technology is an anode linkage technology.The method of said anode linkage technology comprises:
At first; Flattening surface is carried out on the surface of said three buffer layer 106 surfaces and semiconductor material layer 204 to be handled; Make the having an even surface of said three buffer layer 106 and semiconductor material layer 204, to improve the reliability of the bonding between said three buffer layer 106 and the semiconductor material layer 204.Said planarization is a chemical mechanical milling tech.
Then, said substrate 200 is positioned in the electric field with Semiconductor substrate 100, said semiconductor material layer 204 and said three buffer layer 106 apply negative voltage over against setting on the wherein said substrate 200, add positive voltage on the said Semiconductor substrate 100.As an embodiment, the voltage of said electric field is higher than 500V.Under the said electric field action; The alkaline metal ions on said semiconductor material layer 204 surfaces for example sodium ion and potassium ion moves to the direction of substrate 200 under the effect of negative voltage; Thereby the surface at said semiconductor material layer 204 forms anion (this anion is a silicon ion); The direction of positive charge Semiconductor substrate 100 under the effect of the positive voltage on the said substrate 200 on said three buffer layer 106 surfaces moves; Thereby the surface at said three buffer layer 106 forms cation (this cation is an oxonium ion); The cation (being oxonium ion) on said three buffer layer 106 surfaces and negatron (the being silicon ion) charge neutrality on said semiconductor material layer 204 surfaces, and form silica, thus said three buffer layer 106 and said semiconductor material layer 204 bondings.
When being positioned in electric field with Semiconductor substrate 100 said substrate 200; Also need heat with Semiconductor substrate 100 said substrate 200; Make the temperature of said substrate 200 and Semiconductor substrate 100 between 200～400 degrees centigrade, said heating more helps improving the bond strength between three buffer layer 106 and the said semiconductor material layer 204.
Need to prove that when the material of said substrate sacrifice layer 102 and substrate sacrifice layer 202 was photoresist layer, the temperature of said anode linkage technology should be not too high, the temperature of for example said anode linkage technology should not surpass 150 degrees centigrade, in order to avoid photoresist is burnt.Certainly; Said substrate sacrifice layer 102 and substrate sacrifice layer 202 can bear the material of high temperature for amorphous carbon etc.; The temperature of said anode linkage technology can be higher than 150 degrees centigrade, and the temperature of for example said anode linkage technology can be aforesaid 200～400 degrees centigrade.
As another embodiment of the present invention, the material of said substrate sacrifice layer 202 and substrate sacrifice layer 102 is an amorphous carbon, and said Direct Bonding technology comprises:
Flatening process is carried out on surface to said semiconductor material layer 204 and three buffer layer 106; Said flatening process is a chemical mechanical milling tech, and said flatening process helps improving the bond strength between said semiconductor material layer 204 and the three buffer layer 106;
Semiconductor material layer behind the flatening process 204 and three buffer layer 106 are carried out cleaning surfaces; Said cleaning surfaces is removed the pollutant on said semiconductor material layer 204 and three buffer layer 106 surfaces, prevents the bond strength between said pollutant effect semiconductor material layer 204 and the three buffer layer 106;
Adopt the surface of hydrionic plasma-activated said semiconductor material layer 204 and three buffer layer 106, follow-up to help strengthening with the bond strength between said semiconductor material layer 204 and the three buffer layer 106;
Over against placement, make said substrate 200 and Semiconductor substrate 100 overlap the semiconductor material layer after the said activation processing 204 and three buffer layer 106;
Said substrate 200 is positioned in the hot environment with Semiconductor substrate 100, heat treatment 5～30 hours, said hot environment is 150～600 degrees centigrade, for example said hot environment can be 300～450 degrees centigrade;
In the heat treated while, apply certain pressure on said substrate 200 and the Semiconductor substrate 100, more to help improving the bond strength between said semiconductor material layer 204 and the three buffer layer 106, said pressure limit is 7600～50000 holders.
The material that above-mentioned Direct Bonding technology is applicable to substrate sacrifice layer 202 and substrate sacrifice layer 102 is situation (for example the material of substrate sacrifice layer 202 and substrate sacrifice layer 102 is an amorphous carbon) that can withstand high temperatures; If the material of said substrate sacrifice layer 202 and substrate sacrifice layer 102 is a photoresist; The temperature of then said Direct Bonding technology should not surpass 150 degrees centigrade, in order to avoid photoresist is burnt.
Then; Please refer to Fig. 5; Remove said substrate sacrifice layer 202 (being represented by dotted lines in the drawings), the said substrate 200 and first resilient coating 201 are removed from 204 layers of said semiconductor material layers and Semiconductor substrate 100, said second resilient coating 203 also is retained on the said semiconductor material layer 204.Said substrate sacrifice layer 202 utilizes the plasma of oxonium ion to carry out cineration technics and removes.As an embodiment, the parameter of said cineration technics is: said removal material is an oxygen, and the plasma of generation is an oxonium ion; The temperature range of said etching technics is 150 ℃～450 ℃; Under this temperature, violent burning can't take place in fine and close amorphous carbon, and can be oxidized to carbon dioxide; First sacrifice layer 113 can be removed up hill and dale, and the remainder of device can't be affected.
Through above-mentioned steps, semiconductor material layer 204 is transferred on the Semiconductor substrate from substrate 200, thereby said substrate 200 can reuse, and has further practiced thrift cost.
Then, need utilize said semiconductor material layer 204 on said Semiconductor substrate 200, to make micro electro mechanical device.The manufacturing process of said micro electro mechanical device need form cavity on Semiconductor substrate 200, on cavity, make movable electrode then, and said movable electrode can carry out relative motion with said cavity.
Particularly; Please refer to Fig. 6; The three buffer layer 106 of said second resilient coating 203 of etching and semiconductor material layer 204 and below; Form movable electrode 207, the present invention simultaneously forms through hole 205 in said movable electrode 207 and three buffer layer 106, and said through hole 205 exposes the substrate sacrifice layer 105 of below.Said through hole 205 is used to remove the inlet of said substrate sacrifice layer 105.
Need to prove that the part movable electrode 207 between adjacent through hole 205 is the structure of one with the movable electrode 207 of remainder.
Then, please continue with reference to figure 6, make conductive plunger 206, said conductive plunger 206 is electrically connected with the interconnection line 103 of said interconnection structure, and said conduction difference connector 206 is positioned at outside the substrate sacrifice layer 105.
Then; Please refer to Fig. 7; Utilize said through hole 205 to remove said substrate sacrifice layer, in said second dielectric layer 104, form cavity, said movable electrode 207 is suspended on the said cavity; And said movable electrode 207 can carry out relative motion with said cavity, and said movable electrode 207 constitutes micro electro mechanical device with said cavity.Said micro electro mechanical device can contain the MEMS device of movable electrode and cavity for gyroscope, acceleration transducer, microphone, optical modulator, crystal oscillator etc.The removal method of said substrate sacrifice layer please refer to the removal method of said substrate sacrifice layer, does not elaborate at this.
Through above-mentioned processing step, form microelectromechanicdevices devices of the present invention, microelectromechanicdevices devices of the present invention can be for containing gyroscope, acceleration transducer, microphone, optical modulator, crystal oscillator etc.Please refer to Fig. 7, said microelectromechanicdevices devices comprises:
First dielectric layer 101 is positioned on the said Semiconductor substrate 100;
Interconnection structure is positioned at said first dielectric layer 101, and said interconnection structure is electrically connected with said control circuit, and said interconnection structure comprises conductive plunger 102 that is electrically connected with said control circuit and the interconnection line 103 that is electrically connected with said conductive plunger 102;
Second resilient coating 203 is covered in said movable electrode 207 tops, and said second resilient coating 203 is used to protect said movable electrode 207;
To sum up; The present invention is bonded together through semiconductor material layer and the interlayer dielectric layer on the Semiconductor substrate that bonding technology will be formed on the substrate; Then through the substrate sacrifice layer between substrate and the semiconductor material layer is removed; Thereby said semiconductor material layer and interlayer dielectric layer are bonded together, said substrate is separated with said Semiconductor substrate; Then, utilize said semiconductor material layer to make micro electro mechanical device, thereby on said Semiconductor substrate, make micro electro mechanical device; The manufacture method of the microelectromechanicdevices devices of prior art is: two Semiconductor substrate are provided, utilize a Semiconductor substrate to make micro electro mechanical device, utilize another semiconductor fabrication control circuit; Said two Semiconductor substrate are listed in the same lead frame; The volume of the microelectromechanicdevices devices of prior art is bigger, and compared with prior art, the present invention is integrated in micro electro mechanical device and control circuit with on the semi-conductive substrate; Not only reduced the cost of manufacture of microelectromechanicdevices devices; And reduced the volume of microelectromechanicdevices devices, improved the integrated level of microelectromechanicdevices devices, thus satisfied use in portable requirement.
The above only is preferred embodiment of the present invention, is not the present invention is done any pro forma restriction.Any those of ordinary skill in the art; Do not breaking away under the technical scheme scope situation of the present invention; All the method for above-mentioned announcement capable of using and technology contents are made many possible changes and modification to technical scheme of the present invention, or are revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical scheme of the present invention, all still belongs in the scope of technical scheme protection of the present invention any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.
Claims (14)
1. the manufacture method of a microelectromechanicdevices devices is characterized in that, comprising:
Substrate and Semiconductor substrate are provided, are formed with control circuit on the said Semiconductor substrate;
On said substrate, form the substrate sacrifice layer;
On said substrate sacrifice layer, form semiconductor material layer;
On said Semiconductor substrate, form the interlayer dielectric layer that covers said control circuit, be formed with interconnection structure in the said interlayer dielectric layer, said interconnection structure is electrically connected with said control circuit;
Carry out bonding technology, said interlayer dielectric layer and semiconductor material layer are bonded together;
Remove said substrate sacrifice layer, said substrate is separated with said semiconductor material layer;
Utilize said semiconductor material layer on said Semiconductor substrate, to make micro electro mechanical device, said micro electro mechanical device is electrically connected with above-mentioned control circuit through said interconnection structure.
2. the manufacture method of microelectromechanicdevices devices as claimed in claim 1 is characterized in that, said semiconductor material layer is any one in polysilicon layer, amorphous silicon layer, germanium silicon compound layer, germanium layer or its combination.
3. the manufacture method of microelectromechanicdevices devices as claimed in claim 1; It is characterized in that; The material of said substrate sacrifice layer is an amorphous carbon, and the removal method of said substrate sacrifice layer is to utilize the plasma of oxonium ion to carry out cineration technics, and the temperature range of said cineration technics is 150 ~ 450 degrees centigrade.
4. the manufacture method of microelectromechanicdevices devices as claimed in claim 1 is characterized in that, said bonding technology is anode linkage or Direct Bonding.
5. the manufacture method of microelectromechanicdevices devices as claimed in claim 4 is characterized in that, said anode linkage technology comprises:
Said substrate and Semiconductor substrate are positioned in the electric field, and said semiconductor material layer and said interlayer dielectric layer are over against setting;
Said substrate and Semiconductor substrate are heated.
6. the manufacture method of microelectromechanicdevices devices as claimed in claim 4 is characterized in that, the material of said substrate sacrifice layer and substrate sacrifice layer is an amorphous carbon, and said Direct Bonding technology comprises:
Said semiconductor material layer and interlayer dielectric layer are carried out flatening process;
Semiconductor material layer behind the flatening process and interlayer dielectric layer are carried out cleaning surfaces;
Adopt the surface of hydrionic plasma-activated said semiconductor material layer and interlayer dielectric layer;
Over against placement, make said substrate and Semiconductor substrate overlap said semiconductor material layer and interlayer dielectric layer;
Said substrate and Semiconductor substrate be positioned in 150 ~ 600 degrees centigrade the hot environment heat treatment 5 ~ 30 hours.
7. the manufacture method of microelectromechanicdevices devices as claimed in claim 1 is characterized in that, the manufacture method of said interlayer dielectric layer comprises:
On said Semiconductor substrate, form first dielectric layer;
In said first dielectric layer, form interconnection structure, said interconnection structure is electrically connected with said control circuit;
On said first dielectric layer, form second dielectric layer, said second dielectric layer and first dielectric layer constitute said interlayer dielectric layer;
In said second dielectric layer, form the substrate sacrifice layer, the position of said substrate sacrifice layer is corresponding with the position of said interconnection structure.
8. the manufacture method of microelectromechanicdevices devices as claimed in claim 7 is characterized in that, the manufacture method of said micro electro mechanical device comprises:
The said semiconductor material layer of etching forms movable electrode, is formed with through hole in the said movable electrode, and said through hole exposes the substrate sacrifice layer of below;
Utilize said through hole to remove said substrate sacrifice layer, in said second dielectric layer, form cavity, said movable electrode is suspended on the said cavity.
9. the manufacture method of microelectromechanicdevices devices as claimed in claim 1 is characterized in that, before forming the substrate sacrifice layer on the said substrate, also comprises:
On said substrate, form the step of first resilient coating, said first resilient coating is used to reduce the stress between said substrate and the said substrate sacrifice layer.
10. the manufacture method of microelectromechanicdevices devices as claimed in claim 9; It is characterized in that; After said substrate sacrifice layer forms; Also comprise: on said substrate sacrifice layer, form the step of second resilient coating, said second resilient coating is used to reduce the stress between said substrate sacrifice layer and the said semiconductor material layer.
11. the manufacture method of microelectromechanicdevices devices as claimed in claim 10 is characterized in that, before carrying out bonding technology, also comprises:
On said interlayer dielectric layer, make the step of three buffer layer, said three buffer layer is used to reduce the stress between said semiconductor material layer and the said interlayer dielectric layer.
12. the manufacture method of microelectromechanicdevices devices as claimed in claim 11 is characterized in that, the material of said first resilient coating, second resilient coating and three buffer layer is the insulation material, and said insulation material is silica or silicon oxynitride.
13. a microelectromechanicdevices devices is characterized in that, comprising:
Semiconductor substrate is formed with control circuit in the said Semiconductor substrate;
First dielectric layer is positioned on the said Semiconductor substrate;
Interconnection structure is positioned at said first dielectric layer, and said interconnection structure is electrically connected with said control circuit, and said interconnection structure comprises first conductive plunger that is electrically connected with said control circuit and the interconnection line that is electrically connected with said first conductive plunger;
Second dielectric layer is positioned on said first dielectric layer, is formed with cavity in said second dielectric layer;
Movable electrode; Be suspended on the said cavity; Have three buffer layer between said movable electrode and said second dielectric layer and the cavity, said movable electrode can move in said cavity, and the shape of said movable electrode specifically is provided with the microelectromechanicdevices devices that will form; Said three buffer layer and said movable electrode are bonded together, and said three buffer layer can move with said movable electrode simultaneously, and said movable electrode utilizes semiconductor material layer to make;
Second resilient coating is covered in said movable electrode top, and said second resilient coating is used to protect said movable electrode;
Second conductive plunger runs through said second dielectric layer, three buffer layer, movable electrode, and said second conductive plunger is electrically connected said movable electrode with interconnection structure.
14. microelectromechanicdevices devices as claimed in claim 13 is characterized in that, said semiconductor material layer is any one in polysilicon layer, amorphous silicon layer, germanium silicon compound layer, germanium layer or its combination.
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| CN102328904B (en) * | 2011-09-30 | 2015-05-13 | 上海丽恒光微电子科技有限公司 | Method for forming microelectro mechanical system (MEMS) device |
| CN103964372B (en) * | 2013-01-28 | 2016-02-03 | 亚太优势微***股份有限公司 | Integrated micro-electromechanical element and manufacturing method thereof |
| CN104955765B (en) * | 2013-02-01 | 2018-02-13 | 韩国科学技术院 | MEMS manufacture method |
| CN103900740B (en) * | 2014-03-24 | 2015-12-30 | 上海丽恒光微电子科技有限公司 | Pressure transducer and manufacture method thereof |
| CN103940535B (en) * | 2014-03-24 | 2016-03-09 | 上海丽恒光微电子科技有限公司 | The manufacture method of pressure transducer |
| CN105571749B (en) * | 2014-10-15 | 2018-09-07 | 中芯国际集成电路制造(上海)有限公司 | Pressure sensor forming method |
| CN104900540B (en) * | 2015-06-17 | 2018-04-06 | 上海集成电路研发中心有限公司 | A kind of MEMS crystal oscillators of wafer-level vacuum packaged and preparation method thereof |
| CN105120417A (en) * | 2015-09-23 | 2015-12-02 | 苏州敏芯微电子技术有限公司 | Monolithic integrated chip and manufacturing method thereof |
| KR101787435B1 (en) * | 2016-02-29 | 2017-10-19 | 피에스아이 주식회사 | Method for manufacturing nanorods |
| CN112038476B (en) * | 2020-06-30 | 2023-01-06 | 中芯集成电路（宁波）有限公司上海分公司 | Method for manufacturing thermopile sensor |
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| CN101391742A (en) * | 2007-09-21 | 2009-03-25 | 株式会社东芝 | Semiconductor device |
| CN101578686A (en) * | 2005-05-18 | 2009-11-11 | 科隆科技公司 | Methods for fabricating micro-electro-mechanical devices |
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| CN101391742A (en) * | 2007-09-21 | 2009-03-25 | 株式会社东芝 | Semiconductor device |
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