CN102158336A - Multi-channel isolated high-speed intelligent transmitting-receiving device and method for power electronic system - Google Patents
Multi-channel isolated high-speed intelligent transmitting-receiving device and method for power electronic system Download PDFInfo
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Abstract
The invention discloses a multi-channel isolated high-speed intelligent transmitting-receiving device and method for a power electronic system. The device comprises transmitting units, receiving units and isolated transmission mediums. Each transmitting unit comprises a data sampling and signal conditioning module, an A/D (Analog/Digital) conversion module, a transmitting main control unit and a transmitting unit signal conversion module; each receiving unit comprises a receiving unit signal conversion module, a receiving unit signal conditioning module, a receiving main control unit and a memory output module. The device can perform digital coding on multi-channel analog sampling and switch sampling, and transmits through the isolated transmission mediums; each receiving unit can be connected with a plurality of the transmitting units for simultaneously decoding. The multi-channel isolated high-speed intelligent transmitting-receiving device has the advantages of prominent high-reliable electrical isolation performance, instantaneity and intelligent performance.
Description
Technical field
The present invention relates to a kind of multichannel that is used for power electronic system and isolate high-speed intelligent R-T unit and method, be specially adapted to the sampling design of complicated medium-and-large-sized power power electronic system.
Background technology
At present, a development trend of power electronic equipment is complex system and high powerization, the main power device of power electronic equipment produces very high electric current and voltage change ratio in switching process, they produce electromagnetic noise by electric capacity parasitic in the circuit and inductance, easily sampling circuit is produced and disturb, influence sampling precision.The control unit of conventional power converters is most directly to be docked with sampling unit through metallic cable, and electromagnetic environment very easily influences the signal transmission in the cable.Digital signal processor is made a response by sampled signal, is transferred to power cell and does corresponding actions.If mistake appears in sampling, can influence systematic function greatly, even may cause the paralysis of whole system.
Current, traditional sensors mostly is simple passive sampling and transmission signals, does not have from master-priority and judges and error correcting capability, and lower floor's control unit amount of calculation is increased, and drags slow system response time.And traditional sensors only transmits at a signal, for three-phase or heterogeneous application scenario, needs simultaneously a plurality of voltage and current signals to be monitored, and wiring complexity and cost are obviously increased.From present development, the numerically controlled mode of the general employing of complicated power electronic system main control unit, suitable traditional sensors can carry out the one-off pattern number conversion at control end, and this process is easy to generate error or introduces and disturb.
Along with the development of high voltage isolation techniques and digital processing technology, adopt digital transmission means to replace analogue transmission mode, the high medium of isolating to replace the technology of common metal cable ripe in the modern power electronic sampling system.With traditional sampling transmission means relatively, high digital transmission mode of isolating has that electrical insulation properties is good, dynamic range big, be difficult for advantages such as saturated.The replacement of metallic cable makes communication quicker more reliable.
Based on above analysis, be necessary to invent a kind of multichannel and isolate the high-speed intelligent R-T unit, make it keep sampling simple in structure to have characteristics such as high isolation, high reliability and high real-time accurately simultaneously.
Summary of the invention
Purpose of the present invention provides a kind of multichannel that is used for power electronic system to isolate high-speed intelligent R-T unit and method.
For achieving the above object, the technical solution adopted in the present invention is: this multichannel that is used for power electronic system is isolated the high-speed intelligent R-T unit and is comprised transmitting element, receiving element and isolation transmission medium; Described transmitting element comprises data sampling and signal condition module, A/D modular converter, sends main control unit and transmitting element signal conversion module, and described transmission main control unit comprises controlling of sampling module, data coding module and check code implant module; Described receiving element comprises receiving element signal conversion module, receiving element signal condition module, receives main control unit and storage output module, and described reception main control unit comprises that Clock Extraction and synchronization module, initial order judge module, data decode module conciliate the code check module; Described data sampling and signal condition module are connected with the input of A/D modular converter, the output of A/D modular converter is connected with described controlling of sampling module with control end simultaneously, described controlling of sampling module is connected with described check code implant module, described check code implant module is connected with data coding module, and data coding module is connected with described transmitting element signal conversion module; The input of described receiving element signal conversion module is connected with the transmitting element signal conversion module by described isolation transmission medium, the output of described receiving element signal conversion module is connected with the input of described receiving element signal condition module, output while and the described Clock Extraction and the synchronization module of described receiving element signal condition module, described initial order judge module connects, the output while and the described initial order judge module of described Clock Extraction and synchronization module, described decoding verification module, described data decode module connects, the output that described initial order is declared module is connected with the input of described data decode module, the output of described decoding verification module is connected with the input of described data decode module, and the output of described data decode module is connected with described storage output module.
Further, transmission main control unit of the present invention and reception main control unit are field programmable logic array.
Further, the analog quantity sampling channel quantity of the data sampling of transmitting element of the present invention and signal condition module is 1～4.
Further, the switching value sampling channel quantity of transmitting element of the present invention is 1～3.
The method that the present invention uses above-mentioned multichannel isolation high-speed intelligent R-T unit to carry out data transmit-receive comprises the steps:
(1) gathered analog signals and sent to the A/D modular converter by data sampling and signal condition module, the A/D modular converter converts described analog signals digital quantity signal to and sends to the controlling of sampling module; And/or
Gather the switching value signal by the controlling of sampling module;
(2) the controlling of sampling module is expanded described switching value signal and/or received digital quantity signal so that the signal after expanding comprises begins sign position, address bit, data bit, switching value position and finish sign; Signal after the post-sampling control module will be expanded sends to the check code implant module;
(3) the check code implant module is implanted check digit to the signal after the received expansion and is formed new Frame; Back check code implant module sends to data coding module with described new Frame;
(4) data coding module will convert the high-low level signal to from the new Frame that the check code implant module receives; Back data coding module sends to the transmitting element signal conversion module with described high-low level signal;
(5) the transmitting element signal conversion module sends in the receiving element signal conversion module by isolating transmission medium after received high-low level conversion of signals is become the signal that the isolation transmission medium can be supported accordingly;
(6) the receiving element signal conversion module sends to receiving element signal condition module after converting all received data-signals to the signal of telecommunication;
(7) described receiving element signal condition module is being carried out the received signal of telecommunication to be converted to the TTL signal after the voltage magnitude coupling, and the described receiving element signal condition module in back sends to Clock Extraction and synchronization module and initial order judge module respectively with described TTL signal;
(8) described Clock Extraction and synchronization module extract synchronizing clock signals from received TTL signal; Described Clock Extraction and synchronization module send to decoding verification module and initial order judge module simultaneously with described synchronizing clock signals and TTL signal, and described Clock Extraction and synchronization module send to described data decode module with described synchronizing clock signals, and described initial order judge module sends to described data decode module after extracting initial order according to described synchronizing clock signals from received TTL signal; Described decoding verification module is carried out verification and check results and this TTL signal is sent to described data decode module received TTL signal according to described synchronizing clock signals;
(9) described data decode module is decoded to received TTL signal according to described initial order, synchronizing clock signals and described check results and is obtained address bit and data bit information in this TTL signal, and described address bit and data bit information are sent in the register of storage output module.
Compared with prior art, the invention has the beneficial effects as follows:
(1) isolate that transmission medium can be isolated for optical fiber, rf wireless signal isolation, multicore cable and light-coupled isolation combination or multicore cable and transformer isolation make up, replace the classical signal transmission cable by the non-contact transmission mode, thoroughly solve wiring and be subject to problems such as electromagnetic interference, improved the accuracy and the reliability of system.
(2 transmitting elements can be gathered analog quantity or switching value, and with the two combination.Promptly can simplied system structure, reduce the sampling cost, can effectively utilize communication bandwidth again.
(3) improved signal transmission structure.Control device mostly is digital device in the modern power electronic system, need be through over-sampling maintenance, multicircuit switch and analog-to-digital conversion when traditional sample circuit analog output signal is transferred to described digital device.Apparatus of the present invention leave the storage output module in sampled signal in through transmission and after handling, and can directly be read use by described digital device, omit the signal transformation process, simplify hardware configuration, and reduce the signal interference channel.
(4) sending main control unit is field programmable logic array (FPGA) with receiving main control unit, realizes data processing by Programmable Design.Prior art mostly is hardware designs or single-chip microcomputer design, and apparatus of the present invention have the characteristics simple, that expandability is strong of safeguarding in contrast.
(5) line between sampling unit and the control device is more simple.In the conventional electric power electronic system, in the time of need sampling to multiple spot, need carry out complicated line.And apparatus of the present invention can realize multi-channel sampling, and by point-to-point, multi-multipoint and multiple spot the single-point communication mode are reduced a large amount of lines, simplify communication process, improve the accuracy of system.
(6) traditional isolation signals transmitting device transmitting-receiving two-end needs ad hoc clock transfer circuit, and is perhaps synchronous by GPS, so that the two ends clock phase is identical.Apparatus of the present invention directly go out clock from the transmission extracting data by further improved Clock Extraction and synchronization module, do not need ad hoc clock line and GPS synchronous, can reduce design complexities like this, can reduce cost again.
(7) the present invention and method are applicable to complicated power electronic system, and be suitable equally to electric power system, has outstanding highly reliable electrical separation, real-time.
Description of drawings
Fig. 1 is the structural representation of intelligent receive-transmit device of the present invention;
Fig. 2 is the structural representation of the transmitting element of intelligent receive-transmit device of the present invention;
Fig. 3 is the structural representation of the receiving element of intelligent receive-transmit device of the present invention;
Fig. 4 is the structure chart of the defined Frame of intelligent receive-transmit device of the present invention;
Fig. 5 is the extraction of intelligent receive-transmit device of the present invention and the work schematic diagram of synchronization module;
Fig. 6 is the working method schematic diagram of the storage output module of intelligent receive-transmit device of the present invention.
Fig. 7 is the data sampling of intelligent receive-transmit device of the present invention and the schematic diagram of signal condition module.
Fig. 8 is the schematic diagram of the receiving element signal condition module of intelligent receive-transmit device of the present invention.
Fig. 9 is the work schematic diagram that receiving element is joined a plurality of transmitting elements in the intelligent receive-transmit device of the present invention.
Embodiment
Isolate in the high-speed intelligent R-T unit at multichannel of the present invention, isolate that transmission medium 4 can be isolated for optical fiber, rf wireless signal isolation, multicore cable and light-coupled isolation combination or multicore cable and transformer isolation make up.The form that signal exists in different isolation transmission mediums is also different, for example adopts laser to transmit in the optical fiber, is the magnetic field alternating signal in the transformer isolation.The present invention solves thoroughly that the signal transmission wiring is subjected to problems such as electromagnetic interference easily in the power electronic system, has improved the accuracy and the reliability of system.
Transmission main control unit 13 of the present invention and the module that receives in the main control unit 23 exist with the programmable module form, and its definition content comprises data transaction form, data frame structure, data check, Clock management and initial synchronizing information.The module that sends main control unit 13 and receive in the main control unit 23 is cured in the field programmable logic array (FPGA).
Multichannel of the present invention is isolated the high-speed intelligent R-T unit and is had the high voltage isolation characteristic, if the sampled voltage signal can directly adopt electric resistance partial pressure or capacitance partial pressure sampling in the sampling unit; If the sample rate current signal can use high-power precision resistance series connection to insert institute's sampling circuit, power taking resistance both end voltage difference is as current sampling signal, have the expensive characteristics such as low of precision like this, sampled signal also can obtain by Hall element or current/voltage special integrated chip.Transmitting element can be imported the multi-channel sampling data, and sampled signal can be voltage signal, current signal, temperature signal, tach signal, wind flow signal or switching value signal etc.If tradition every profession and trade transducer simulation univoltage amount output port also can be connected with transmitting element to realize the high Digital Transmission of isolating by voltage magnitude coupling back.
The analog quantity sampling channel number of criteria of data sampling in the transmitting element and signal condition module 11 is designed to 4 passages; Switching value sampling channel number of criteria is designed to 3 passages, can adjust by switching value position in the adjustment Frame, consider that every increase One-position switch amount position can increase a clock cycle time-delay, so the scope that is provided with of the switching value sampling channel in the multichannel isolated intelligent R-T unit of the present invention is preferably 1～3.Require low occasion can increase analog quantity and switching value sampling channel number in sample rate, reduce analog quantity and switching value sampling channel number in the demanding occasion of sample rate.Increase the purpose that number of active lanes can play the economize on hardware cost.The order of several analog quantity sampling channels of data sampling and signal condition module 11 can be adjusted by controlling of sampling module 131.Switching value sampling reality is digital quantity signal, the corresponding digital quantity ' 1 ' of logic high, the corresponding digital quantity ' 0 ' of logic low.Unit of conventional electric power electronics sample mode signal of can only sampling is connected to key-course by complicated secondary connection then, and the passive received signal of controller is judged the running status of power electronic system, sends the subsequent action instruction again.Multichannel of the present invention is isolated the high-speed intelligent R-T unit and is controlled at sampling end, by adjusting the different signal of sampling order transmission significance level, can make timely reflection to system running state like this, can reduce the burden of controller again, and reduce the secondary line in a large number and reduce cost.
As shown in Figure 9, each receiving element 2 that multichannel of the present invention is isolated the high-speed intelligent R-T unit can connect one or more transmitting elements 1, relatively independent being independent of each other between the receiving element signal conversion module 21 of corresponding different transmitting elements 1, relatively independent being independent of each other between the receiving element signal condition module 22 of same corresponding different transmitting elements 1; The reception main control unit 23 of corresponding different transmitting element 1 then can be present in the FPGA module jointly with modular form.Obviously, can expand number by FPGA resource utilization and the decision of FPGA running status.
The special feature that multichannel of the present invention is isolated the high-speed intelligent R-T unit is that also the data that receiving element decodes are digital quantity, leave in the storage output module 24, can directly offer digital device uses, thereby omit output stage analog signal conditioner circuit, reduce error and produce approach, and can simplify circuit design.Simultaneously, the storage output module 24 of receiving element of the present invention can also provide one or more analog signal output, uses for observing to measure.
The contribution that multichannel of the present invention is isolated the high-speed intelligent R-T unit is also that the switch acquisition signal of same time point and analog sampling signal packet are contained in the same frame data and transmits, can effectively improve the passage utilization ratio.
Moreover, multichannel of the present invention is isolated the high-speed intelligent R-T unit and is carried out when synchronous at clock, and transmitting element does not need to send synchronizing clock signals specially or GPS is synchronous, but directly extracts bit synchronization signal from the digital signal that receives, can effectively reduce system complexity, reduce cost.
According to the function of above-mentioned required realization, device of the present invention is divided into 3 parts, as shown in Figure 1, comprises transmitting element 1, receiving element 2 and isolates transmission medium 4.The transmitting element structure as shown in Figure 2, comprise data sampling and signal condition module 11, A/D modular converter 12, send main control unit 13 and transmitting element signal conversion module 14, send main control unit 13 and comprise controlling of sampling module 131, data coding module 132 and check code implant module 133.The receiving element structure comprises receiving element signal conversion module 21, receiving element signal condition module 22, receives main control unit 23 and storage output module 24 as shown in Figure 3; Receive main control unit 23 and comprise that Clock Extraction and synchronization module 231, initial order judge module 232, data decode module 233 conciliate code check modules 234; Data sampling and signal condition module 11 are connected with the input of A/D modular converter 12, the output of A/D modular converter 12 is connected with controlling of sampling module 131 with control end simultaneously, controlling of sampling module 131 is connected with check code implant module 133, check code implant module 133 is connected with data coding module 132, and data coding module 132 is connected with transmitting element signal conversion module 14; The input of receiving element signal conversion module 21 is connected with transmitting element signal conversion module 14 by isolating transmission medium 4, the output of receiving element signal conversion module 21 is connected with the input of receipts cell signal conditioning module 22, output while and the Clock Extraction and the synchronization module 231 of receiving element signal condition module 22, initial order judge module 232 connects, the output while and the initial order judge module 232 of Clock Extraction and synchronization module 231, decoding verification module 234, data decode module 233 connects, the output that initial order is declared module 232 is connected with the input of data decode module 233, the output of decoding verification module 234 is connected with the input of data decode module 233, and the output of data decode module 233 is connected with storage output module 24.
As one embodiment of the present invention, the modulate circuit of data sampling and signal condition module 11 can adopt the amplifier chip LM358 of ST company to realize, as shown in Figure 7, the positive input termination bias voltage of amplifier, negative input end connect the signal input; A/D modular converter 12 can adopt the ADS7950 of American TI Company, has 4 sampling channels, and output form is serial output, and sampling precision is 12, sampling time-delay 800ns; The Cyclone Series FPGA that transmission main control unit 13 and reception main control unit 23 can adopt U.S. altera corp is as core, and input clock frequency is 20MHz, and FPGA internal work clock frequency reaches as high as 320MHz; The analog quantity sampling channel is connected with modulate circuit in sampling and the signal condition module 11 in the transmitting element, and the switching value sampling channel directly is connected with the I/O mouth of FPGA.Isolate the mode that transmission medium 4 adopts optical fiber to isolate, transmitting element signal conversion module 11 and receiving element signal conversion module 21 can adopt the optical fiber sending module HFBR-1527 and the optic fiber transceiver module HFBR-2526 of U.S. AVAGO company respectively, the optical fiber sending module is a light signal with electrical signal conversion, optic fiber transceiver module is converted to the signal of telecommunication with light signal, and the two highest communication speed of supporting is 125Mbps; Isolate transmission medium and can adopt the single mode plastic fiber, have high noise immunity, be responsible for connecting transmitting element and receiving element, transmission of digital signals.Receiving element signal condition module is made up of chip 10H116 of ON company and MC100ELT as shown in Figure 8, and the responsible PECL signal condition that will accept the output of cell signal modular converter is converted to the TTL signal; The storage output module can adopt the D/A converter chip ADS5342 of FPGA internal register by the external ADI of FPGA I/O mouth company, to reach the purpose of digital signal storage and analog signal output.In the present embodiment, the module that sends main control unit 131 and receive in the main control unit 232 is present among the FPGA with the programmable module form, connect by the FPGA internal logic unit between them, the function of realization comprises definition of data transition form, data frame structure, data check, Clock management and initial synchronizing information.
The course of work of apparatus of the present invention is as follows:
At first, analog sampled data is input to the transmission main control unit by signal condition and A/D conversion with serial mode, and the switching value sampling then directly enters the transmission main control unit.Send main control unit same time point sampled data is put into a Frame, the sampling channel geocoding is placed on before the sampled data, in the first initial order that adds of Frame, the back adds check information and stop bit then.The data frame structure that the present invention adopts comprises as shown in Figure 4: begin 1 of sign position; 4 of address bits are encoded to each sampling channel; 12 of data bit, data bit length is by the decision of A/D modular converter, and the data sampling of A/D is generally with 12 definition at present; 5 of check digit; Other 3 is the switching value position, can be the switching value data of number of different types, as the running status of protection information, fault or module; Finish 1 of sign position.
The auxiliary cyclic redundancy check (CRC) that realizes after the high-pressure side sampled data is reduced of the check information that transmitting element adds.Because electromagnetic environment is more abominable, intelligent receive-transmit device data sampling of the present invention and signal condition module are interfered easily in the data that the high-pressure side obtained, for the check code implant module in the accuracy transmitting element that guarantees data can be implanted check code in Frame.Consider the amount of calculation that need reduce FPGA and reduce taking of transmission bandwidth, the verification generator polynomial adopts common CRC-5=x5+x4+x2+1 among the present invention, and promptly Dui Ying code is 110101, and CRC generation picket code is 5 like this.The process of utilizing CRC to carry out error detection can simply be described as: the k position binary code data sequence that transmits with transmitting element is carried out the computing of computer mould double division method to the code of above-mentioned generator polynomial correspondence, be to do XOR between divisor and the dividend, the alignment of divisor and dividend highest order, step-by-step XOR from left to right successively when carrying out computing.Obtain 5 remainders at last and be the CRC picket code, be attached to original character string back, constitute the binary code sequence number of a new k+5 position.
Frame replenishes complete back and is converted to the CMI coding by data coding module, and this coding replaces in the initial data ' 0 ' with ' 01 '; With ' 00 ' and ' 11 ' replacement data in ' 1 ', if the one-period of lasting with ' 00 ' expression, following one-period will then use ' 11 ' to represent, the two hockets; ' 10 ' is unused code.Can avoid long-time high level and long-time low level situation to exist like this, make code stream be tending towards balanced, be beneficial to Error detection.Moreover the CMI coded system can be made high-low level conversion as much as possible, for the Clock Extraction of back is provided convenience, reduces the error code probability.Fiber optical transceiver adopts the difference serial I/O high speed signal of PECL standard, and antijamming capability is strong.
Data flow is transformed into light signal via the transmitting element signal conversion module after encoding through CMI, is transferred to receiving element through optical fiber as isolating transmission medium again.The receiving element signal conversion module of receiving element is reduced to the signal of telecommunication with light signal, transfers to receive the main control unit processing.
The receiving element data transaction is the inverse process of transmitting element, is responsible for receiving and restoring data, again storage is read use for follow-up secondary device.After obtaining data flow, the reception main control unit at first will produce the clock with data sync.The mentioned receiving element clock synchronization of the present invention does not need special synchronised clock line, and concrete implementing method is to utilize digital phase-locked loop DPLL to recover from the serial bit stream data by Clock Extraction and synchronization module to receive the bit synchronization clock.Designed digital phase-locked loop is a kind of control system with phase feedback, mainly is made up of along testing circuit, phase discriminator, clock multiplier circuit and frequency divider clock.Its implementation procedure is as follows, and as shown in Figure 5: at first the data with input code flow just change along extracting, and comprising rising edge and trailing edge, the variation that extracts is continued to use very short pulse of time and showed.If the frequency of transmitting element transfer of data is
f, then be 16 in FPGA internal pair production one frequency *
fClock.Along the pulse dashing with the data variation of extracting then is that beginning flag is counted the clock of 16 frequencys multiplication.Whenever count down to 8 or be input as pulse change once along the hour counter output switching activity, so just obtain one with input data same frequency and the roughly the same clock of phase place
f Out At this moment phase discriminator produces clock with institute
f Out Compare with the data hopping edge, judge
f Out Be in advance or lag behind, again counter is sent control command, if
f Out Then increase rolling counters forward in advance, delay output switching activity opportunity; If
f Out Lag behind and then reduce rolling counters forward, make its output upset in advance.By the feedback regulation that continues, dynamically adjust the count results of high-speed counter, finally make the output clock
f Out Phase place with the input data that is to say the transmitting element clock synchronization.
After extracting synchronised clock, in the receiving element CMI coded data that receives is reduced to initial data, process is as follows: at first the CMI character string of every initial data correspondence will be separated, because CMI coding two bits is represented an initial data, and only corresponding ' 00 ' ' 11 ' ' 01 ' the three kind of form of each initial data is so find some change-over time that is two initial data from high level to low level hopping edge ' 10 ' in the CMI sign indicating number.So from this hopping edge, with the CMI sign indicating number shift register that divides into groups in twos to put into, reduce according to the contrary rule of CMI coding then, just obtain the data flow identical at last with initial data.Apparatus of the present invention are also monitored shift register data in each cycle, if unused code ' 10 ' appears in the inside, then mistake appears in the explanation displacement, in time corrects.
Next the initial order judge module will be judged the job initiation state of transmitting element, then every frame data in the original data stream is separated.As long Distance Transmission device, the inconsistent system that can not influence of the electric sequence of transmitting element and receiving element moves.And system increases and reduces the normal operation that continues that transmitting element should not influence whole system midway, and promptly transmitting element is supported hot plug (Plug and Play).Whether transmitting element adds initial order among the present invention in the transmission data, insert so that receiving element is judged transmitting element at any time, thereby system can be correctly decoded.Transmitting element of the present invention as sending initial order, inserts back receiving element enabling counting device when possible initial order arrives at transmitting element, with the synchronised clock that extracts with frame data ' 1 '
f Out For standard logarithmic according in ' 1 ' count, when reaching 15 ' 1 ', the counter continuous counter both can guarantee reliably to judge the transmitting element initial order, can in follow-up, effectively extract the initial order of every frame data again, at this moment the possibility minimum of herein being disturbed starts decoding program.Send initial order and can adopt other character strings, but will guarantee to get along well operate as normal the time in the sampled data character string repeat, in order to avoid obscure, and make receiving element accurate and effective extract start bit.Transmitting element of the present invention in addition can send initial order once more behind every transmission 10 frame valid data, receiving element rejudges, to reduce the accumulation of error.
In receiving element, after every frame data separated, decoding verification module was carried out CRC check to the valid data section of every frame data.With the CRC check multinomial identical with transmitting element the valid data section is calculated, regenerated 5 CRC sign indicating numbers, 5 bit check sign indicating numbers with the transmitting element insertion compare again, if it is identical, then data are correct, if different, illustrate that mistake appears in data in transmission course.When the CRC check data were incorrect, intelligent receive-transmit device of the present invention output can be kept one group of data, and informed that mistake appears in this sampled data of secondary device.If occur mistake continuously, then judge whether to shut down maintenance by the secondary device controller.
Storing output module at last deposits in correct data in the register.Storage adopts 8 addressing modes, comprises each serial number of channels information in the serial number information of each transmitting element and the transmitting element.Because each circuit-switched data passage is separate, can divide different memory modules in the memory block and distinguish, same passage reservation point data 3 continuous times automatically replaces the oldest data when new data is come in.Make things convenient for secondary device to extract data simply accurately like this, and can effectively utilize memory space.Simultaneously, measuring observation as need needs, and receiving element can be reduced into digital signal analog signal and use.The storage way of output of data is represented that by Fig. 6 secondary device is connected with bus form with register, comprises address wire, data wire and control line; Control line sends read/write signal, then according to the address information on the address wire, carries out register by data wire and reads/write operation.
As shown in Figure 9, each receiving element 2 that multichannel of the present invention is isolated the high-speed intelligent R-T unit can connect one or more transmitting elements 1, relatively independent being independent of each other between the receiving element signal conversion module 21 of corresponding different transmitting elements 1, relatively independent being independent of each other between the receiving element signal condition module 22 of same corresponding different transmitting elements 1; The reception main control unit 23 of corresponding different transmitting element 1 then can be present in the FPGA module jointly with modular form.Obviously, can expand number by FPGA resource utilization and the decision of FPGA running status.In the present invention, when connecting a transmitting element, receiving element FPGA resource utilization is 6%, can carry out the decoding of sampling simultaneously of 6 groups of transmitting elements under the situation that operating temperature allows.
The number of active lanes of transmitting element data sampling and signal condition module 11 and sampling order are determined by the concrete model of employing A/D modular converter, the speed of institute's sampled signal and the rate request of system.With typical three-phase VSI control system is example, and the variable of required transmission has: the operating state signal of each switching tube gate electrode drive signals, each switching tube, the voltage and current signal of feedback.For gate electrode drive signals, the rise time of hypothesis driven signal is far smaller than switching frequency, and the minimal communications bandwidth that each switch needs can be approximately following formula:
In the formula (1),
f Sw Be the system switching frequency,
n d Maximal accuracy for pulse-width modulation (PWM) signal.Select in the example
n d =12,
f Sw =10kHz.The minimal communications bandwidth that then needs
BBe 41Mbps.Drive signal is a switching value, in transport process without data sampling and signal condition module and A/D modular converter, so its speed is limited by the optical fiber transmission bandwidth only.Because the optical fiber communication bandwidth that is adopted in the example is 125Mbps, institute thinks the assurance communication capacity, if transmitting switch drives the signal that each transmitting element preferably only sends a passage.Be all the operating state signal of the switching tube of switching value, each switch periods only needs transmission primaries to get final product, and, can expand in a large number under the situation of communication bandwidth at switching frequency.In addition, each switch periods also needs to feed back primary voltage and current sampling data at least to controller, and the two speed is slower, required channel capacity
CCan be represented by the formula:
In the formula (2):
CBe channel capacity;
n b Figure place for every frame data;
f Sw It is the system switching frequency;
N Node Port number for sampling unit.The length of every frame data is 25 among the design, and each transmitting element has 4 passages, promptly
n b =4.The switching frequency of supposing the VSI system is 10kHz, and then can calculate the minimum data channel capacity that needs is 1Mbps/s.Adopt the 125Mbps bandwidth for transmission in the experiment porch design, satisfy the requirement that 4 passages are sampled simultaneously far away.Owing to be the analog signal sampling, system speed also is limited by A/D conversion and transfer of data time-delay.If system's output waveform does not produce distortion, the transfer of data time-delay must be satisfied following formula:
Wherein
t d Be A/D conversion and transfer of data time-delay,
T Sw The system switching cycle.When frequency is 10kHz, switch periods
T Sw =100us, as adopt 4 channel sample, transmission delay
t d Should be much smaller than 25us.Intelligent transmitting device time-delay of the present invention is 1.8us, the demand of adaptive system.Based on above analysis, the present invention has relatively high expectations for switching frequency and has suitable equally than the occasion of high dynamic response demand.
The multichannel that is used for power electronic system that the present invention proposes a kind of novelty is isolated the high-speed intelligent R-T unit, and great advantage of the present invention is the high voltage isolation, and has parallel multitasking ability and characteristics such as high reliability, real-time.Be applicable to complicated power electronic equipment, other occasion of having relatively high expectations for switching frequency and isolation Level is suitable for too.
Above content be in conjunction with instantiation to further describing that the present invention did, can not assert that concrete enforcement of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (5)
1. a multichannel that is used for power electronic system is isolated the high-speed intelligent R-T unit, it is characterized in that: comprise transmitting element (1), receiving element (2) and isolate transmission medium (4); Described transmitting element (1) comprises data sampling and signal condition module (11), A/D modular converter (12), sends main control unit (13) and transmitting element signal conversion module (14), and described transmission main control unit (13) comprises controlling of sampling module (131), data coding module (132) and check code implant module (133); Described receiving element (2) comprises receiving element signal conversion module (21), receiving element signal condition module (22), receives main control unit (23) and storage output module (24), and described reception main control unit (23) comprises Clock Extraction and synchronization module (231), initial order judge module (232), data decode module (233) reconciliation code check module (234); Described data sampling and signal condition module (11) are connected with the input of A/D modular converter (12), the output of A/D modular converter (12) is connected with described controlling of sampling module (131) with control end simultaneously, described controlling of sampling module (131) is connected with described check code implant module (133), described check code implant module (133) is connected with data coding module (132), and data coding module (132) is connected with described transmitting element signal conversion module (14); The input of described receiving element signal conversion module (21) is connected with transmitting element signal conversion module (14) by described isolation transmission medium (4), the output of described receiving element signal conversion module (21) is connected with the input of described receiving element signal condition module (22), output while and the described Clock Extraction and the synchronization module (231) of described receiving element signal condition module (22), described initial order judge module (232) connects, the output while and the described initial order judge module (232) of described Clock Extraction and synchronization module (231), described decoding verification module (234), described data decode module (233) connects, the output that described initial order is declared module (232) is connected with the input of described data decode module (233), the output of described decoding verification module (234) is connected with the input of described data decode module (233), and the output of described data decode module (233) is connected with described storage output module (24).
2. multichannel according to claim 1 is isolated the high-speed intelligent R-T unit, it is characterized in that: described transmission main control unit (13) and reception main control unit (23) are field programmable logic array.
3. multichannel according to claim 1 and 2 is isolated the high-speed intelligent R-T unit, and it is characterized in that: the analog quantity sampling channel quantity of the data sampling of described transmitting element and signal condition module (11) is 1～4.
4. multichannel according to claim 1 and 2 is isolated the high-speed intelligent R-T unit, and it is characterized in that: the switching value sampling channel quantity of described transmitting element is 1～3.
5. one kind is used the multichannel of claim 1 to isolate the method that the high-speed intelligent R-T unit carries out data transmit-receive, it is characterized in that comprising the steps:
(1) gathered analog signals and sent to A/D modular converter (12) by data sampling and signal condition module (11), A/D modular converter (12) converts described analog signals to digital quantity signal and sends to controlling of sampling module (131); And/or
Gather the switching value signal by controlling of sampling module (131);
(2) controlling of sampling module (131) is expanded described switching value signal and/or received digital quantity signal so that the signal after expanding comprises begins sign position, address bit, data bit, switching value position and finish sign; Signal after post-sampling control module (131) will be expanded sends to check code implant module (133);
(3) check code implant module (133) is implanted check digit to the signal after the received expansion and is formed new Frame; Back check code implant module (133) sends to data coding module (132) with described new Frame;
(4) data coding module (132) will convert the high-low level signal to from the new Frame that check code implant module (133) receive; Back data coding module (132) sends to transmitting element signal conversion module (14) with described high-low level signal;
(5) transmitting element signal conversion module (14) sends in the receiving element signal conversion module (21) by isolating transmission medium (4) after received high-low level conversion of signals is become the signal that isolation transmission medium (4) can be supported accordingly;
(6) receiving element signal conversion module (21) sends to receiving element signal condition module (22) after converting all received data-signals to the signal of telecommunication;
(7) described receiving element signal condition module (22) is being carried out the received signal of telecommunication to be converted to the TTL signal after the voltage magnitude coupling, and the described receiving element signal condition module in back (22) sends to Clock Extraction and synchronization module (231) and initial order judge module (232) respectively with described TTL signal;
(8) described Clock Extraction and synchronization module (231) extract synchronizing clock signals from received TTL signal; Described Clock Extraction and synchronization module (231) send to decoding verification module (234) and initial order judge module (232) simultaneously with described synchronizing clock signals and TTL signal, and described Clock Extraction and synchronization module (231) send to described data decode module (233) with described synchronizing clock signals, and described initial order judge module (232) sends to described data decode module (233) after extracting initial order according to described synchronizing clock signals from received TTL signal; Described decoding verification module (234) is carried out verification and check results and this TTL signal is sent to described data decode module (233) received TTL signal according to described synchronizing clock signals;
(9) described data decode module (233) is decoded to received TTL signal according to described initial order, synchronizing clock signals and described check results and is obtained address bit and data bit information in this TTL signal, and described address bit and data bit information are sent in the register of storage output module (24).
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