CN102045133A - Chip for wireless sensor network node and on-chip digital baseband system - Google Patents

Chip for wireless sensor network node and on-chip digital baseband system Download PDF

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CN102045133A
CN102045133A CN 200910236528 CN200910236528A CN102045133A CN 102045133 A CN102045133 A CN 102045133A CN 200910236528 CN200910236528 CN 200910236528 CN 200910236528 A CN200910236528 A CN 200910236528A CN 102045133 A CN102045133 A CN 102045133A
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CN102045133B (en
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王�义
陆世龙
赵泽
崔莉
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Institute of Computing Technology of CAS
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Institute of Computing Technology of CAS
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Abstract

The invention provides a digital baseband system used for a wireless sensor network node chip. The digital baseband system comprises a baseband modulation unit, a baseband demodulation unit, an automatic gain control unit and a cyclic code checker, wherein the cyclic code checker transmits checked data to be sent to the baseband modulation unit; the baseband modulation unit performs modulation processing such as direct sequence spread spectrum, delay, digital signal shaping modulation and analog-to-digital conversion on the data and then sends the processed data out; the baseband demodulation unit performs demodulation processing such as analog-to-digital conversion, spectrum despreading, optimal coherent demodulation, bit synchronization sampling determination on the received data and then transmits the processed data to the cyclic code checker for data check; and the automatic gain control unit adjusts a gain determination threshold according to received signal strength indication (RSSI) and link quality indication (LQI) in the process of sending or receiving the data so as to control the transmitting gain and receiving gain.

Description

Be used for the chip of wireless sensor network node and the digital baseband system on the chip
Technical field
The present invention relates to field of wireless transmission, particularly be used for the chip of wireless sensor network node and the digital baseband system on the chip.
Background technology
(Wireless Sensor Network WSN) is a kind of self-organizing network application system that is made of a large amount of intensive autonomous nodes that are deployed in guarded region to wireless sensor network.Its application prospect is very wide, can be widely used in fields such as military affairs, environmental monitoring, medical treatment ﹠ health, traffic administration and commercial application.Though wireless sensor network node has various application, but these application have some identical requirements to wireless sensor network node, and the wherein challenging requirement of tool is exactly how to make that the computing capability of wireless sensor network node is stronger, applied environment is wider, power consumption is lower, volume is littler, cost is lower, communication quality is better.
Present wireless sensor network node adopts general embedded platform to realize mostly.Because the device of this type of sensor network nodes is not specially for wireless sensor network designs, so indexs such as disposal ability, power consumption and volume often are difficult to reach requirement of actual application.And along with the development of FPGA/ASIC technology and the appearance of SOC (system on a chip) (System on chip) technology, adopt the method for SOC (system on a chip) on FPGA, to realize the wireless sensor network node platform, and when large-scale application is arranged, it is transferred to the key technology means that method for designing that ASIC produces in batches will become problems such as solution node processing ability, power consumption and volume.
Signals collecting, signal processing and group-net communication are three big functions of wireless sensor network node.According to above-mentioned functions, wireless sensor network node is usually by sensing module, processing module, four parts of wireless communication module and energy module are formed, wireless communication module wherein accounts for the overwhelming majority of whole wireless sensor network node power consumption, digital baseband in the wireless communication module has played the gain of control radio-frequency receiving-transmitting in wireless communication module, channel coding/decoding, radio frequency carrier leak is suppressed control, digital signal is shaped and modulates, best coherent demodulation, effects such as bit synchronization and sampling judgement, these have all had influence on the power consumption of wireless sensor network node, performance, the hardware cost and the error rate, therefore, design low-power consumption, high-performance, the digital baseband system of low error rate is for the power consumption and the hardware cost that reduce wireless sensor network node, raising node communication quality and enhancing node have important effect to the adaptability of environment.
In order to satisfy wireless sensor network node low-power consumption, low-cost design target, ZigBee alliance has released the ZigBee agreement at WSN, makes this agreement become an emerging communication standard of wireless sensor network.Physical layer of this agreement (PHY) and medium Access Layer (MAC) are formulated by IEEE802.15.4 working group, two frequency ranges of 900MHz and 2.4GHz have been defined in the IEEE802.15.4 standard that this working group formulated, 16 channels in the scope of 2.405GHz-2.480GHz, have been defined altogether, channel spacing is 5MHz, modulation system is O-QPSK, its message transmission rate is 250Kb/s, has adopted direct sequence spread spectrum (DSSS) technology based on pseudo noise (PN) sign indicating number, and spreading gain is 8.The application of above-mentioned communication protocol helps the intercommunication mutually between wireless sensor network node that different manufacturers generates, helps reducing the power consumption and the cost of wireless sensor network node, helps the popularization and the application of wireless sensor network.
The wireless senser that adopts the system-on-chip designs method to realize adopts the communication standard of formulating separately mostly, seldom according to the digital baseband system in the IEEE802.15.4 standard design transducer but in the prior art.For example, the wireless sensor network node WiseNet of Switzerland CMES exploitation, though adopted the technology of SOC (system on a chip) and aimed at the wireless sensor network design, but the digital baseband in this node adopts the 2FSK modulation, the maximum data rate is 100kb/s, all do not meet the standard of IEEE802.15.4, make chip not have compatible other and meet the versatility of the sensor network nodes chip of IEEE802.15.4 standard.
Also there is the digital baseband system that meets the IEEE802.15.4 standard in the prior art, as the digital baseband system in the JN5121 family chip of the CC2431 of Chipcon company and CC2510 and JENNIC company, but still there is certain limitation in the chip that comprises these digital baseband systems, comprising:
1, the digital baseband system of these chips can be done automatic gain control, and gain ranging can pass through software arrangements, but related decision threshold adopts the fixed gate limit value in the automatic gain control process, does not have the characteristic of self adaptation adjustment.And generally adopt signal strength signal intensity RSSI to control as value of feedback, and signal is amplified to saturated, receive link-quality LQI and seldom take all factors into consideration.Narrow band interference in the channel can increase RSSI, but can reduce link-quality LQI, and therefore adopting single RSSI is inaccurate as the feedback adjusting gain acceptance in.Consider wireless sensor network node applied environment actual conditions widely, can face in actual application that channel situation is complicated and changeable, transmitting power is uncertain and the problems such as real-time change of communication distance, these all can influence node packet loss and energy consumption, and existing digital baseband system adopts the judgement mode of fixed gate limit value can cause the environmental suitability of node to descend.
2, the digital baseband system of these chips does not adopt the Schmidt trigger mode of adaptive threshold when carrying out the signal phase judgement, but adopting traditional zero trigger mode to carry out signal phase judgement, the demodulation bit error rate that therefore can not avoid the frequent saltus step because of input phase to cause raises.
3, the digital baseband system of these chips has adopted fixedly generator polynomial but not software is configurable when doing cyclic redundancy checks, causes the flexibility of base band and versatility not strong.
4, the digital baseband system of these chips does not have the function that suppressed carrier leaks, and is therefore very high to the requirement of radio frequency chip quality, improved the node cost.
Summary of the invention
An object of the present invention is to provide a kind of digital baseband system that can do the self adaptation adjustment to the judging threshold of automatic gain control.
Another object of the present invention is to overcome the defective that demodulation bit error rate that signal phase when judgement cause because of the frequent saltus step of input phase raises, thereby a kind of digital baseband system that can reduce demodulation bit error rate is provided.
Another purpose of the present invention provides the digital baseband system of the configurable cyclic redundancy checks device of a kind of user of comprising, and strengthens the flexibility and the versatility of digital baseband.
A further object of the present invention provides a kind of digital baseband system that automatic inhibition radio-frequency carrier leaks that comprises, and reduces the quality requirement to radio frequency chip, reduces the node cost.
To achieve these goals, the invention provides a kind of digital baseband system that is used for the wireless sensor network node chip, comprise baseband modulation unit, base band demodulating unit, automatic gain control unit and cyclic redundancy checks device; Wherein,
Described cyclic redundancy checks device will arrive described baseband modulation unit through the transfer of data to be sent of verification, finish the modulation treatment that comprises direct sequence spread spectrum, delay, digital signal shaping modulation, analog-to-digital conversion by described baseband modulation unit, the data after will handling then send;
Described base band demodulating unit the data that receive are done comprise analog-to-digital conversion, separate spread spectrum, the demodulation process of best coherent demodulation, bit synchronization sampling judgement, the transfer of data after will handling is then done data check to described cyclic redundancy checks device;
Described automatic gain control unit is adjusted the gain decision threshold according to signal strength signal intensity RSSI in the DRP data reception process and link-quality LQI, cooperates the working method of software-hardware synergism, thereby realizes the control to transmitting gain and receiving gain.
In the technique scheme, also comprise being used for monitoring automatically carrier wave leakage power the suppressed carrier leakage unit of compensation and inhibition transmitting terminal carrier leak; This unit is connected with the transmitting terminal of outside.
In the technique scheme, described baseband modulation unit comprises direct sequence spread spectrum module, Postponement module, O-QPSK digital modulation module and first D/A converter module, second D/A converter module; Wherein,
Described direct sequence spread spectrum module is done spread spectrum coding according to the direct sequence spread spectrum coding schedule to the data that will send, and the data transaction behind the spread spectrum coding is become I, Q two-way serial data; Described Postponement module postpones the Q circuit-switched data; Described I, Q two-way serial data are all done the modulation that is shaped in described O-QPSK digital modulation module, do analog-to-digital conversion respectively in described first D/A converter module and second D/A converter module then.
In the technique scheme, described O-QPSK digital modulation module adopts two ROM memories of preserving the waveform code table of sinusoidal and cosine respectively to realize.
In the technique scheme, described base band demodulating unit comprises first analog-to-digital conversion module, second analog-to-digital conversion module, first matched filter module, second matched filter module, the 3rd matched filter module, the 4th matched filter module, the first bit synchronization module, the second bit synchronization module and spread spectrum demodulation module; Wherein,
Described first analog-to-digital conversion module, second analog-to-digital conversion module become the wave level digital signal with the I road signal of the analog waveform signal that receives with Q road conversion of signals respectively; Described first matched filter module, second matched filter module, the 3rd matched filter module, the 4th matched filter module are done filtering operation to signal respectively, eliminate the intersymbol interference of received signal and it is carried out best coherent demodulation; Filtered signal obtains adjudicating output signal constantly through integration, after relatively, extract the sampling judgement pulse judgement of sampling by the described first bit synchronization module, the second bit synchronization module then, and the output demodulation result arrives the spread spectrum demodulation module; The sheet sign indicating number of the process band spectrum modulation that described spread spectrum demodulation module will receive is decoded as data code flow, obtains link-quality LQI value simultaneously; Intensity RSSI and link-quality LQI value through aforementioned filtered signal are transferred to described automatic gain control module.
In the technique scheme, described first matched filter module, second matched filter module, the 3rd matched filter module, the 4th matched filter module adopt circuit multiplexer to realize, drive by high frequency clock, the amount of calculation that a clock cycle is finished is divided into several clock cycle to be finished, and parallel a large amount of combinational logic circuits are divided into a small amount of sequential logical circuit.
In the technique scheme, the described first bit synchronization module, the second bit synchronization module have adopted the Schmidt trigger of adaptive threshold to carry out the signal phase judgement; Wherein,
When this phase place judgement output 1, only in described matched filter output signal during greater than described thresholding, output just is 0 next time, otherwise exports 1; When this phase place judgement output 0, only in described matched filter output signal during less than thresholding, output just is 1 next time, otherwise exports 0.
In the technique scheme, the threshold value in the Schmidt trigger of described adaptive threshold is adjusted according to signal strength signal intensity RSSI self adaptation, and the user dynamically disposes the judgement coefficient according to channel circumstance simultaneously.
In the technique scheme, the gain decision threshold of automatic gain control unit is peaked (k-1)/k of LQI and RSSI, and k wherein represents to adjudicate coefficient;
There are four kinds of states in described automatic gain control unit in the process that realizes gain controlling: initial condition, lock-out state, increase gain-state, the gain-state that reduces; Wherein, under any state, as LQI less than its peaked (k-1)/k and RSSI less than its peaked (k-1)/k, enter the increase gain-state from current state; Under any state, as LQI less than its peaked (k-1)/k and RSSI greater than its peaked (k-1)/k, enter the reduction gain-state from current state; Under any state, when LQI enters lock-out state during greater than its peaked (k-1)/k; When the value of LQI and RSSI all greater than they historical record values separately, will from lock-out state, jump out, analog value is deposited in maximum value register, enter initial condition then, the adjustment that gains again is up to lock-out state.
In the technique scheme, the thresholding initial value of automatic gain control unit, gain initial value and judgement coefficient k all have the user to set.
In the technique scheme, the generator polynomial coefficient of described cyclic redundancy checks device is configured according to user's needs.
In the technique scheme, described suppressed carrier leaks module and comprises AD sampling unit, low-pass filter unit, sliding window integral unit and DC compensation algorithm unit; After baseband signal is done AD sampling, low-pass filter unit and is done low-pass filtering and sliding window integral unit and do integration via described AD sampling unit successively, the direct current intensity that obtains transmitting is generated according to this direct current intensity that transmits by the DC compensation algorithm unit and to be used for the offset that suppressed carrier leaks.
The present invention also provides a kind of chip that is used for wireless sensor network node, comprises described digital baseband system.
The invention has the advantages that:
1, digital baseband system of the present invention adopts the automatic gain control mechanism based on the adaptive threshold of signal strength signal intensity RSSI and the comprehensive feedback of link-quality LQI in gain controlling, reach the purpose that under the prerequisite that guarantees certain communication quality, reduces the node error rate and save power consumption, thereby adapt to applied environment complicated and changeable.
2, digital baseband system of the present invention can be supported the IEEE802.15.4 communication protocol standard, the feasible electronic device compatibility that adopts chip and other support IEEE802.15.4 communication protocol standard of this digital baseband system.
Description of drawings
Fig. 1 is the structural representation of an embodiment that includes the sensor network nodes chip of digital baseband system;
Fig. 2 is the structural representation of the baseband modulation unit in the digital baseband system;
Fig. 3 is the base band demodulating unit in the digital baseband system and the structural representation of automatic gain control unit;
Fig. 4 is the structural representation of the matched filter in the digital baseband system;
Fig. 5 is the schematic diagram that the bit synchronization module in the digital baseband system realizes the phase place judgement;
Fig. 6 is the state transition graph of the automatic gain control unit in the digital baseband system;
Fig. 7 is the structure chart of the cyclic redundancy checks device in the digital baseband system;
Fig. 8 is the structural representation of another embodiment that includes the sensor network nodes chip of digital baseband system;
Fig. 9 leaks the structure chart of module for suppressed carrier.
Embodiment
Below in conjunction with the drawings and specific embodiments the present invention is illustrated.
Fig. 1 has provided an embodiment who is used for the chip of wireless sensor network node of the present invention, below in conjunction with Fig. 1 the structure of this chip is illustrated.As can be seen from the figure, chip of the present invention includes processor 1, program storage 2, data storage 3, MAC protocol module 4, digital baseband block 5, wireless radio frequency modules 6 and other modules 7.Wherein, be connected by bus between processor 1 and data storage 3, MAC protocol module 4, digital baseband block 5, wireless radio frequency modules 6 and other modules 7, and processor 1 is connected on the program storage 2 by the program read line; Be connected by bidirectional data line between MAC protocol module 4 and the digital baseband block 5, and also establish the data transmit-receive path between digital baseband block 5 and the wireless radio frequency modules 6 by data wire.Concrete function and realization to each parts in the chip is illustrated below.
Processor 1 is a logical device of finishing corresponding operating according to the program code in the program storage 2, can select existing IP module or open source code to realize, as the MC8051 processor source code of Oregano Systems, the processor module of ARM series etc.Processor 1 can comprise the initialization setting to the miscellaneous part in the chip under the control of program code, the multiple operation in being controlled at, below in the explanation to miscellaneous part, when relating to processor 1, can elaborate with regard to the concrete effect of processor 1.
Program storage 2 is used for the program that storage of processor 1 will be moved.Program storage 2 generally can adopt ripe process design method such as FLASH or EEPROM to realize.
Data storage 3 is used for the data that storage of processor 1 will be used, and generally can adopt technologies such as ripe DRAM or SRAM to realize.
MAC protocol module 4 is set operating frequency, sleep mode, collision avoidance mechanism, transmitted power and the channel of described wireless radio frequency modules 6 and is selected under the control of described processor 1, and it will transmit and receive data by described processor 1 preparation object and the distribution of work and sleep time, finish parsing, to the judgement of channel occupancy and the random back etc. of conflicting to packet.The realization of MAC protocol module 4 can be adopted any IEEE802.15.4 of meeting communication standard or other MAC protocol of I P module in the prior art.
Described wireless radio frequency modules 6 is used for the simulation part modulate emission of wireless transmission data and the simulation part of wireless receiving data decomposes the transfer receipts.This module comprises transmitter unit 61, receiving element 62.Can select the IP module of the existing IEEE802.15.4 of meeting communication standard to realize.
Other modules 7 are used to realize comprising the multiple function of power supply control, transducer control, input and output, and this module also can be passed through existing techniques in realizing.
Digital baseband block 5 have control radio-frequency receiving-transmitting gain, direct sequence spread spectrum, digital signal be shaped modulation, digital-to-analogue/analog-to-digital conversion, separate spread spectrum, the bit synchronization sampling is adjudicated and cyclic redundancy checks etc. is all multi-functional.Above-mentioned functions according to digital baseband block 5, can do further division to this module, provided a kind of implementation of digital baseband block 5 in Fig. 1, this module comprises baseband modulation unit 51, base band demodulating unit 52, automatic gain control unit 53 and cyclic redundancy checks device 54.Wherein, after the cyclic redundancy checks device 54 that is connected with MAC protocol module 4 by data wire receives data from MAC protocol module 4, to send to baseband modulation unit 51 through the data of verification, data after baseband modulation unit 51 will be modulated send in the wireless radio frequency modules 6, launch by wireless radio frequency modules 6.Wireless radio frequency modules 6 is after receiving data, the data that receive can be sent to base band demodulating unit 52 and do data demodulates, data after the demodulation are sent to cyclic redundancy checks device 54 and do data check, data after the verification are sent to MAC protocol module 4, in the process of data demodulates, also can realize the adjustment of automatic gain by automatic gain control unit 53.Digital baseband block 5 of the present invention satisfies the IEEE802.15.4 standard when realizing, will be illustrated respectively with regard to the concrete structure and the operation principle of each related in this module unit in the following description.
Fig. 2 has provided the structural representation of baseband modulation unit 51, according to the relevant regulations of IEEE802.15.4 standard, the multiple operation that comprises direct sequence spread spectrum, delay, digital signal shaping modulation, analog-to-digital conversion should be finished in described baseband modulation unit 51.According to above-mentioned functions, this unit comprises direct sequence spread spectrum module 511, Postponement module 512, O-QPSK digital modulation module 513 and digital-to-analogue conversion (DAC) module 514,515.
Direct sequence spread spectrum module 511 has realized sending the code table conversion of data, specifically, be according to the direct sequence spread spectrum coding schedule that the IEEE802.15.4 communication standard provides 42 system data to be done the spread spectrum coding of mapping one by one, resulting coding is a Pseudo-Random Noise Code and mutually orthogonal.Direct sequence spread spectrum module 511 can adopt a ROM to realize, after the serial data that receives from MAC protocol module 4, this serial datum is done string-and conversion, from the direct sequence spread spectrum coding schedule that ROM preserved, read the correspondence code type then, through 8 times of spreading gains, make data flow convert 2 system chip code sequences to, convert I, Q two-way serial data to a FIFO at last.
Than I road signal delay T/2 (T represents symbol period), the Q road serial data after the delay is transferred to O-QPSK modulation module 513 to Postponement module 512 with Q road signal, and I road signal then directly is transferred to O-QPSK modulation module 513 without Postponement module 512.
O-QPSK digital modulation module 513 is used for digital signal is done the modulation that is shaped.O-QPSK digital modulation module 513 can adopt formed filter to realize the moulding of digital signal is modulated, but in the present embodiment, as a kind of preferred implementation, O-QPSK digital modulation module 513 can adopt two ROM memories of preserving the waveform code table of sinusoidal and cosine respectively, when doing the shaping modulation, from the waveform code table, directly export filtered level according to modulation format.Compare with the implementation of aforesaid employing formed filter, this implementation can have been saved formed filter, can reduce unnecessary energy consumption and hardware spending, the demand of the low-cost low-power consumption of coincidence senser network node as far as possible.
DAC module 514,515 is done analog-to-digital conversion to I road signal and Q road signal respectively, will be analog waveform signal through modulated waveform level digital conversion of signals.The DA module can adopt independent IP unit or universal DA chip to realize that as a kind of preferred implementation, in the present embodiment, the DA module has adopted independently IP unit.
Fig. 3 has provided the structural representation of base band demodulating unit 52 and automatic gain control unit 53.Base band demodulating unit 52 should finish comprise analog-to-digital conversion, separate spread spectrum, the multiple operation of best coherent demodulation, bit synchronization sampling judgement, according to above-mentioned functions, base band demodulating unit 52 comprises analog-to-digital conversion (ADC) module 521,522, matched filter module 523,524,525,526, bit synchronization module 527,528, spread spectrum demodulation module 529.
ADC module 521,522 will convert the wave level digital signal respectively to from the I road signal and the Q road signal of the resulting analog waveform signal of wireless radio frequency modules 6 demodulation.Similar with DA module noted earlier, the AD module can adopt independently IP unit or the realization of general AD chip equally, as a kind of preferred implementation, in the present embodiment, has adopted independently IP unit.
Matched filter 523,524,525,526 is done filtering operation to signal respectively, eliminates the intersymbol interference of received signal and it is carried out best coherent demodulation.Filtered result is via integrator, comparator, thereby obtains adjudicating output signal s_diff=y1-y0 constantly, extracts the sampling judgement pulses judgement of sampling by bit synchronization module 527,528 then, and the output demodulation result arrives spread spectrum demodulation module 529.In this process, also can obtain the intensity of signal after simultaneously by aforementioned matched filter, this intensity RSSI=y1+y0, this intensity level will be output to automatic gain control module 53 as feedback and realize gain controlling.When signal calculated intensity, do matched filtering earlier and help shielding background noise, thereby obtain more accurate received signal intensity.
From top explanation as can be seen, the effect of matched filter is to realize the filtering operation to signal, and therefore correlation filter of the prior art all can be used for the present invention theoretically.But consider wireless sensor network node requirement low cost, low in power consumption, Fig. 4 has provided a kind of preferred implementation of matched filter on hardware.As can be seen from the figure, in this implementation, thought according to circuit multiplexer, by adopting high frequency clock to drive, the amount of calculation that a clock cycle is finished is divided into several clock cycle and finishes, parallel a large amount of combinational logic circuits are divided into a small amount of sequential logical circuit, to multiplexing several cycles of these sequential logical circuits, realize identical computing function, realize element number to reduce hardware, as reduce multiplier and adder, in the performance that guarantees linear filter, reached the purpose that reduces the hardware resource expense.As in an example, suppose to have the AD sample rate of 24MHz, spreading rate is 2MHz, thus each sampling period to finish multiply-add operation 12 times, need 12 adders and multiplier if do parallel computation.And pass through reuse plan, adopt 6 times of clocks to drive matched filter module to sample frequency, a sampling period is calculated 6 clock cycle, each cycle is only used two adders and multiplier, utilize minimum multiplier and adder to realize filter, compare traditional parallelism wave filter and saved 5/6 hardware resource, realized reducing the purpose of hardware cost, the requirement cheaply of coincidence senser network node.
The bit synchronization module is used to adjust the phase place of the local Synchronous Sampling Pulse of receiving terminal, makes it consistent with the restituted signal phase place that receives, and restituted signal is sampled accurately.In the prior art, the bit synchronization module has adopted the method for directly output of matched filter being carried out zero passage detection when achieving a butt joint the phase place judgement of receiving restituted signal, determine the restituted signal phase place of output.Because requiring fully when the design matched filter, deterministic signal shape (comprising frequency, phase place, amplitude, the time of advent etc.) just can reach desirable optimum reception condition, but in actual applications, any one problem such as frequency error, random phase, random magnitude, bad timing all can cause satisfying matched filter " optimum reception " condition, thereby make the output of matched filter repeatedly zero cross fired take place at the zero passage place, cause bit synchronization input meeting 0, frequent saltus step between 1 state, influence the bit synchronization effect, cause demodulation bit error rate to raise.
At prior art existing above-mentioned deficiency when realizing the bit synchronization module, Fig. 5 has provided a kind of mode of Schmidt trigger of adaptive threshold and has carried out the signal phase judgement, thereby avoids the frequent saltus step of input phase.In this implementation, when this phase place judgement output 1, only at filter output signal during greater than thresholding, output just is 0 next time, otherwise exports 1, when this phase place judgement exports 0, only at filter output signal during less than thresholding, output just is 1 next time, otherwise exports 0.Because wireless sensor network node need adapt to various complex communication environment, and under abominable communication environment, often can't satisfy " optimum reception " condition, matched filter amplitude output signal calibration reason condition is less than normal, threshold value when therefore phase place is adjudicated should be that self adaptation is adjustable, to avoid the phase place decision error.Specifically, utilize signal strength values RSSI noted earlier to do value of feedback and regulate decision threshold adaptively, can dynamically dispose the judgement coefficient k according to channel circumstance simultaneously, to reach higher controllability and flexibility.As can be seen from the figure, when this phase place judgement exports 1, only at filter output signal s_diff during greater than k times of RSSI, output just is 0 next time, otherwise export 1, when this phase place judgement output 0, only filter output signal s_diff less than RSSI-during k times, output just is 1 next time, otherwise exports 0.Above-mentioned decision method can make decision threshold according to the signal strength signal intensity real-time change, guarantees the accuracy of court verdict, and error rate of system can significantly not reduced because of environment is abominable, has reached the requirement that adapts to multiple communication environment.After obtaining the restituted signal phase place, the present invention adopts digital phase locking technique to carry out bit synchronization.Be not directly used in the sampling judgement, but with matched filter output signal s_diff relative error from comparator obtained, additional or deduct one or several pulse in the pulse train of signal bell output by a controller, reach the synchronous purpose of output sampling decision signal and received signal.The bit synchronization pulse that the bit synchronization module finally obtains, 2 system chip code sequences are transfused to and carry out correlation demodulation in the spread spectrum demodulation module 529.
The sheet sign indicating number that spread spectrum demodulation module 529 is used for the process band spectrum modulation that will receive is decoded as data code flow.According to the regulation of IEEE 802.15.4 agreement, direct sequence spread spectrum is per 4 bit data will be mapped as a symbol to select 16 quasi-orthogonal pseudo random sequences, and each pseudo random sequence is made up of 32 bit slice sign indicating numbers.Each 32 bit code is divided into I, Q two-way 16 seat sign indicating numbers.Because the orthogonality of 16 pseudo random sequences, cross-correlation coefficient is very little, auto-correlation coefficient is very big, so related operation is made with the I road of each symbol in spread spectrum demodulation module 529 I road at first to the received signal, take out maximum according to maximum-likelihood criterion, make related operation with Q road signal then, correlated results is carried out symbol decision, obtain corresponding decoding 4 bit data.The sheet sign indicating number of each data that also will add up reception in the process of above-mentioned decoding simultaneously is in the coefficient correlation of when decoding and former sign indicating number, and the link quality performance of the high more explanation channel of coefficient correlation is good more, and the mean value of coefficient correlation is mapped as link-quality LQI value.Resulting data code flow is admitted to cyclic redundancy checks device 54 behind the spread spectrum demodulation, and the LQI value that calculates is admitted to automatic gain control unit 53.
Automatic gain control unit 53 comprises transmitting gain control and receiving gain control.In transmitting gain control, the user is according to link-quality LQI, by software transmitting gain is adjusted, by 1 pair of configuration register value of paying of processor, MAC protocol module 4 reads constantly in the transmission preliminary treatment, this way of hardware and software combination ride gain has not only reduced the complexity that the user uses to a certain extent, and has increased the flexibility of system greatly, satisfies the needs of various communication environments and low-power consumption.In receiving gain control, the gain decision threshold is adjusted based on the signal strength signal intensity RSSI of received signal and the comprehensive feedback result of link-quality LQI.Below in conjunction with Fig. 6 the implementation procedure of this method is illustrated.
Illustrated in the explanation in front how signal strength signal intensity RSSI and link-quality LQI obtain, in this no longer repeat specification.Respectively as the gain decision threshold, k wherein represents to adjudicate coefficient, can be set by the user with peaked (k-1)/k of LQI and RSSI.As can be seen from Figure 6, there are four kinds of states in the gain control process: initial condition, lock-out state, increase gain-state, the gain-state that reduces.Under any state, as LQI less than its peaked (k-1)/k and RSSI less than its peaked (k-1)/k, enter the increase gain-state from current state; Under any state, as LQI less than its peaked (k-1)/k and RSSI greater than its peaked (k-1)/k, enter the reduction gain-state from current state; Under any state, when LQI enters lock-out state during greater than its peaked (k-1)/k; When the value of LQI and RSSI all greater than they historical record values separately, will from lock-out state, jump out, analog value is deposited in maximum value register, enter initial condition then, the adjustment that gains again is up to lock-out state.In addition, before the gain decision threshold was done the self adaptation adjustment, thresholding initial value, gain initial value all can be set up on their own by the user, and the system that makes can be applicable under the multiple communication environment according to demand.
Compare with existing auto gain control method, in the method shown in Figure 6, the thresholding of automatic gain control is with adaptive by received signal intensity RSSI and link-quality LQI after the matched filter, therefore, with the variation of channel environment, transmitting power and communication distance, determine that the decision threshold of gain optimal value also can change thereupon.Better at channel circumstance, transmitting power reaches communication distance more greatly when nearer, and RSSI and LQI increase, and gain descends, and decision threshold improves, and it is saturated that signal can be amplified to, and saves certain reception power consumption.Relatively poor at channel circumstance, when the less and communication distance of transmitting power was far away, RSSI and LQI descended, and gain raises, and decision threshold decline obtains better received signal quality, reduces the packet loss of node.In addition, can know according to actual measured results, signal strength signal intensity RSSI 10m with interior zone in, its decline trend and link-quality LQI with distance is roughly the same, but when distance strengthened, the attenuation curve of RSSI was milder, apparently higher than the attenuation curve of LQI, and the fading curve of LQI can increase vibration along with the increase of distance, also has bigger irregular decline simultaneously.This phenomenon illustrates multipath interference, diffraction, barrier will be apparently higher than the influence to signal strength signal intensity when distance increases to the influence of signal quality, and arrive received signal greatly when saturated at receiving gain, RSSI may not have significant change, but because saturation signal can exceed the AD range of linearity, can cause the demodulation code check to raise and LQI decline, therefore adopting single RSSI is inaccurate as the feedback adjusting gain acceptance in.On the other hand, because LQI changes greatly with the concussion of distance, adopt single LQI can cause the stability of a system relatively poor again as the feedback adjusting gain acceptance in, therefore adopt automatic gaining controling algorithm can obtain ride gain more accurately, when saving power consumption, obtain desirable link-quality and more stable received signal based on signal strength signal intensity RSSI and the comprehensive feedback of link-quality LQI
Cyclic redundancy checks device 54 is used to realize the error-detection error-correction of cyclic check code.Cyclic redundancy checks device 54 can adopt the fixedly cyclic redundancy checks device of generator polynomial coefficient of traditional employing, but this cyclic redundancy checks device can only be supported a kind of cyclic check code, and flexibility and versatility are not strong.Fig. 7 has provided a kind of preferred implementation of cyclic redundancy checks device 54, and as can be seen from the figure, the generator polynomial coefficient of cyclic redundancy checks device 54 can need be configured according to the user by processor 1 by bus.When the data in the dateout bag are done cyclic check, as 8 of most-significant byte input data and 80 parallel input buffers (being equivalent to the input information sign indicating number is risen 8 rank) as least-significant byte, enter shift-register sequence then, carry out XOR (being equivalent to) by turn with the generator polynomial coefficient divided by the generator polynomial complementation, resulting residue is supervise code element, supervise code element is exported with the input information sign indicating number addition on 8 rank that raise, obtain the systematic code after cyclic code is encoded, datacycle to input is calculated, and obtains the check code of whole packet at last.When the data in the reception packet are done cyclic check, repeat the aforementioned calculation process, the check code of the reception packet that obtains calculating compares with the last several byte check codes that receive, and whether the check data bag is wrong.Because the generator polynomial coefficient of cyclic redundancy checks device 54 can pass through bus configuration, therefore can satisfy the needs of various cyclic redundancy checks, can satisfy the verification of multiple cyclic check codes such as CRC-16, CRC-CCITT, CRC-12, the communication standard that digital baseband is suitable for is more extensive, and flexibility is stronger.
It more than is explanation to an embodiment of wireless sensor network node chip of the present invention, in another preferred embodiment, as shown in Figure 8, the digital baseband block 5 of this chip also includes the suppressed carrier leakage unit 55 that is connected with wireless radio frequency modules 6, this unit is used for monitoring automatically carrier wave leakage power, and compensation also suppresses transmitting terminal carrier leak.Carrier leak is generally because device or technology itself is undesirable causes, the local oscillator high-frequency signal leaks by antenna, mix with useful signal and to cause carrier leak, carrier leak does not belong to useful signal, after leaking into transmitter port, it can cause interference, influence receiving terminal demodulation effect, cause the error rate and packet loss to improve.When digital baseband block 5 has suppressed carrier leakage unit 55, wireless radio frequency modules 6 also includes radio-frequency (RF) switch 63, and wireless radio frequency modules 6 has two kinds of mode of operations, be that normal mode of operation and suppressed carrier leak preparing mode, the switching between two kinds of mode of operations is by described radio-frequency (RF) switch 63 realizations.
Fig. 9 shows the structure chart of suppressed carrier leakage unit 55, is operated in suppressed carrier in wireless radio frequency modules 6 and leaks preparing mode following time, opens the data channel of receiving element 62 and transmitter unit 61 simultaneously by radio-frequency (RF) switch 63.Because can equivalence there be DC component in carrier leak for transmitting terminal IQ road, after the receiving terminal down-conversion, can produce corresponding DC component, disturb base band demodulating, therefore, suppressed carrier leakage unit 55 carries out AD sampling 551, low-pass filtering 552 by the baseband signal that radio frequency is demodulated, sliding window integration 553 obtains receiving the direct current intensity that transmits of monitoring, DC compensation algorithm unit 554 links to each other with processor bus, dispose its initial control signal value by software program, make it have controllability flexibly.AD sampling unit 551 wherein can adopt independently IP unit or general AD chip to realize, as adopts independently IP unit; Low-pass filter unit 552 and sliding window integral unit 553 can adopt general digital lattice filter and circulation accumulator to realize; DC compensation algorithm unit 554 can adopt a ROM to realize, transmit suppressed carrier that 8 bit data of direct current intensity are mapped as the control radio frequency of the IQ road that obtains behind the sampling filter integration is leaked the offset of register, feed back to radiofrequency emitting module and carry out IQ road DC compensation, reach the purpose of Adaptive Suppression carrier leak, reduced the radio-frequency module performance demands, improve the radio frequency chip rate of finished products, reduced the node cost.
From the explanation of the foregoing description as can be seen, digital baseband system of the present invention adopts the automatic gain control mechanism based on the adaptive threshold of signal strength signal intensity RSSI and the comprehensive feedback of link-quality LQI in gain controlling, reach the purpose that under the prerequisite that guarantees certain communication quality, reduces the node error rate and save power consumption, thereby adapt to applied environment complicated and changeable.
Digital baseband system of the present invention adopts the mode of the Schmidt trigger of adaptive threshold to carry out signal phase judgement in bit synchronization, reaches the purpose that the demodulation bit error rate avoiding causing because of the frequent saltus step of input phase raises, and has reduced the error rate of node.
Matched filter in the digital baseband system of the present invention has adopted the adder of filter and multiplier has been carried out multiplexing method for designing, has reached minimizing hardware resource expense, the purpose that reduces cost in the performance that guarantees linear filter.
The compatible IEEE802.15.4 communication standard of digital baseband system of the present invention, but and have a cyclic redundancy checks device of software arrangements generator polynomial coefficient, make the chip at digital baseband system place in communication, have the versatility of compatible other sensor network nodes chip, and very high flexibility is arranged.
Wireless sensor network node digital baseband of the present invention has the control module of Adaptive Suppression carrier leak, can dispose the suppressed carrier leakage register of radio frequency chip according to adaptive algorithm, thereby realize DC compensation to IQ road signal, reach the purpose of Adaptive Suppression carrier leak, reduced the radio-frequency module performance demands, improve the radio frequency chip rate of finished products, reduced the node cost.
It should be noted last that above embodiment is only unrestricted in order to technical scheme of the present invention to be described.Although the present invention is had been described in detail with reference to embodiment, those of ordinary skill in the art is to be understood that, technical scheme of the present invention is made amendment or is equal to replacement, do not break away from the spirit and scope of technical solution of the present invention, it all should be encompassed in the middle of the claim scope of the present invention.

Claims (13)

1. a digital baseband system that is used for the wireless sensor network node chip is characterized in that, comprises baseband modulation unit (51), base band demodulating unit (52), automatic gain control unit (53) and cyclic redundancy checks device (54); Wherein,
Described cyclic redundancy checks device (54) will arrive described baseband modulation unit (51) through the transfer of data to be sent of verification, finish the modulation treatment that comprises direct sequence spread spectrum, delay, digital signal shaping modulation, analog-to-digital conversion by described baseband modulation unit (51), the data after will handling then send;
Described base band demodulating unit (52) data that receive are done comprise analog-to-digital conversion, separate spread spectrum, the demodulation process of best coherent demodulation, bit synchronization sampling judgement, the transfer of data after will handling is then done data check to described cyclic redundancy checks device (54);
Described automatic gain control unit (53) is adjusted the gain decision threshold according to signal strength signal intensity RSSI in the DRP data reception process and link-quality LQI, thereby realizes the control to transmitting gain and receiving gain.
2. the digital baseband system that is used for the wireless sensor network node chip according to claim 1 is characterized in that, also comprises being used for monitoring automatically carrier wave leakage power the suppressed carrier leakage unit (55) of compensation and inhibition transmitting terminal carrier leak; This unit is connected with the transmitting terminal of outside.
3. the digital baseband system that is used for the wireless sensor network node chip according to claim 1 and 2, it is characterized in that described baseband modulation unit (51) comprises direct sequence spread spectrum module (511), Postponement module (512), O-QPSK digital modulation module (513) and first D/A converter module (514), second D/A converter module (515); Wherein,
Described direct sequence spread spectrum module (511) is done spread spectrum coding according to the direct sequence spread spectrum coding schedule to the data that will send, and the data transaction behind the spread spectrum coding is become I, Q two-way serial data; Described Postponement module (512) postpones the Q circuit-switched data; Described I, Q two-way serial data are all done the modulation that is shaped in described O-QPSK digital modulation module (513), do analog-to-digital conversion respectively in described first D/A converter module (514) and second D/A converter module (515) then.
4. the digital baseband system that is used for the wireless sensor network node chip according to claim 3 is characterized in that, described O-QPSK digital modulation module (513) adopts two ROM memories of preserving the waveform code table of sinusoidal and cosine respectively to realize.
5. the digital baseband system that is used for the wireless sensor network node chip according to claim 1 and 2, it is characterized in that described base band demodulating unit (52) comprises first analog-to-digital conversion module (521), second analog-to-digital conversion module (522), first matched filter module (523), second matched filter module (524), the 3rd matched filter module (525), the 4th matched filter module (526), the first bit synchronization module (527), the second bit synchronization module (528) and spread spectrum demodulation module (529); Wherein,
Described first analog-to-digital conversion module (521), second analog-to-digital conversion module (522) become the wave level digital signal with the I road signal of the analog waveform signal that receives with Q road conversion of signals respectively; Described first matched filter module (523), second matched filter module (524), the 3rd matched filter module (525), the 4th matched filter module (526) are done filtering operation to signal respectively, eliminate the intersymbol interference of received signal and it is carried out best coherent demodulation; Filtered signal obtains adjudicating output signal constantly through integration, after relatively, extract the sampling judgement pulse judgement of sampling by the described first bit synchronization module (527), the second bit synchronization module (528) then, the output demodulation result arrives spread spectrum demodulation module (529); The sheet sign indicating number of the process band spectrum modulation that described spread spectrum demodulation module (529) will receive is decoded as data code flow, obtains link-quality LQI value simultaneously; Intensity RSSI and link-quality LQI value through aforementioned filtered signal are transferred to described automatic gain control module (53).
6. the digital baseband system that is used for the wireless sensor network node chip according to claim 5, it is characterized in that, described first matched filter module (523), second matched filter module (524), the 3rd matched filter module (525), the 4th matched filter module (526) adopt circuit multiplexer to realize, drive by high frequency clock, the amount of calculation that a clock cycle is finished is divided into several clock cycle to be finished, and parallel a large amount of combinational logic circuits are divided into a small amount of sequential logical circuit.
7. the digital baseband system that is used for the wireless sensor network node chip according to claim 5, it is characterized in that the described first bit synchronization module (527), the second bit synchronization module (528) have adopted the Schmidt trigger of adaptive threshold to carry out the signal phase judgement; Wherein,
When this phase place judgement output 1, only in described matched filter output signal during greater than described thresholding, output just is 0 next time, otherwise exports 1; When this phase place judgement output 0, only in described matched filter output signal during less than thresholding, output just is 1 next time, otherwise exports 0.
8. the digital baseband system that is used for the wireless sensor network node chip according to claim 7, it is characterized in that, threshold value in the Schmidt trigger of described adaptive threshold is adjusted according to signal strength signal intensity RSSI self adaptation, dynamically disposes the judgement coefficient according to channel circumstance simultaneously.
9. the digital baseband system that is used for the wireless sensor network node chip according to claim 1 and 2, it is characterized in that, the gain decision threshold of automatic gain control unit (53) is peaked (k-1)/k of LQI and RSSI, and k wherein represents to adjudicate coefficient;
There are four kinds of states in described automatic gain control unit (53) in the process that realizes gain controlling: initial condition, lock-out state, increase gain-state, the gain-state that reduces; Wherein, under any state, as LQI less than its peaked (k-1)/k and RSSI less than its peaked (k-1)/k, enter the increase gain-state from current state; Under any state, as LQI less than its peaked (k-1)/k and RSSI greater than its peaked (k-1)/k, enter the reduction gain-state from current state; Under any state, when LQI enters lock-out state during greater than its peaked (k-1)/k; When the value of LQI and RSSI all greater than they historical record values separately, will from lock-out state, jump out, analog value is deposited in maximum value register, enter initial condition then, the adjustment that gains again is up to lock-out state.
10. the digital baseband system that is used for the wireless sensor network node chip according to claim 9 is characterized in that, the thresholding initial value of automatic gain control unit (53), gain initial value and judgement coefficient k all have the user to set.
11. the digital baseband system that is used for the wireless sensor network node chip according to claim 1 and 2 is characterized in that, the generator polynomial coefficient of described cyclic redundancy checks device (54) is configured according to user's needs.
12. the digital baseband system that is used for the wireless sensor network node chip according to claim 2, it is characterized in that described suppressed carrier leaks module (55) and comprises AD sampling unit (551), low-pass filter unit (552), sliding window integral unit (553) and DC compensation algorithm unit (554); After baseband signal is done AD sampling, low-pass filter unit (552) and is done low-pass filtering and sliding window integral unit (553) and do integration via described AD sampling unit (551) successively, the direct current intensity that obtains transmitting is generated according to this direct current intensity that transmits by DC compensation algorithm unit (554) and to be used for the offset that suppressed carrier leaks.
13. a chip that is used for wireless sensor network node is characterized in that, comprises the described digital baseband system of one of claim 1-11.
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