CN101978470A - 氮化镓或氮化铝镓层的制造方法 - Google Patents
氮化镓或氮化铝镓层的制造方法 Download PDFInfo
- Publication number
- CN101978470A CN101978470A CN200980109974.0A CN200980109974A CN101978470A CN 101978470 A CN101978470 A CN 101978470A CN 200980109974 A CN200980109974 A CN 200980109974A CN 101978470 A CN101978470 A CN 101978470A
- Authority
- CN
- China
- Prior art keywords
- layer
- thickness
- nitride
- seed layer
- intermediate layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02378—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02513—Microstructure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02598—Microstructure monocrystalline
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02376—Carbon, e.g. diamond-like carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Junction Field-Effect Transistors (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
Claims (17)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR08/51891 | 2008-03-25 | ||
FR0851891A FR2929445B1 (fr) | 2008-03-25 | 2008-03-25 | Procede de fabrication d'une couche de nitrure de gallium ou de nitrure de gallium et d'aluminium |
PCT/EP2009/052881 WO2009118244A1 (en) | 2008-03-25 | 2009-03-11 | Method for manufacturing a layer of gallium nitride or gallium and aluminum nitride |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101978470A true CN101978470A (zh) | 2011-02-16 |
CN101978470B CN101978470B (zh) | 2013-03-20 |
Family
ID=40298702
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200980109974.0A Active CN101978470B (zh) | 2008-03-25 | 2009-03-11 | 氮化镓或氮化铝镓层的制造方法 |
Country Status (7)
Country | Link |
---|---|
US (2) | US8093077B2 (zh) |
EP (1) | EP2269212A1 (zh) |
JP (1) | JP2011515861A (zh) |
KR (1) | KR101186032B1 (zh) |
CN (1) | CN101978470B (zh) |
FR (1) | FR2929445B1 (zh) |
WO (1) | WO2009118244A1 (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110791805A (zh) * | 2019-10-31 | 2020-02-14 | 中国电子科技集团公司第十三研究所 | 一种衬底、外延片及其生长方法 |
CN111334781A (zh) * | 2020-04-20 | 2020-06-26 | 哈尔滨科友半导体产业装备与技术研究院有限公司 | 一种氮化铝晶体生长所用的大尺寸复合籽晶及其制备方法 |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102010027411A1 (de) * | 2010-07-15 | 2012-01-19 | Osram Opto Semiconductors Gmbh | Halbleiterbauelement, Substrat und Verfahren zur Herstellung einer Halbleiterschichtenfolge |
WO2012176411A1 (ja) * | 2011-06-24 | 2012-12-27 | 住友化学株式会社 | トランジスタ用半導体基板、トランジスタ及びトランジスタ用半導体基板の製造方法 |
FR2977260B1 (fr) * | 2011-06-30 | 2013-07-19 | Soitec Silicon On Insulator | Procede de fabrication d'une couche epitaxiale epaisse de nitrure de gallium sur un substrat de silicium ou analogue et couche obtenue par ledit procede |
JP2013149732A (ja) * | 2012-01-18 | 2013-08-01 | Mitsubishi Electric Corp | へテロ接合電界効果型トランジスタおよびその製造方法 |
WO2014159954A1 (en) * | 2013-03-14 | 2014-10-02 | Hexatech, Inc. | Power semiconductor devices incorporating single crystalline aluminum nitride substrate |
EP3182460A1 (en) * | 2015-12-18 | 2017-06-21 | IMEC vzw | Method of fabricating an enhancement mode group iii-nitride hemt device and a group iii-nitride structure fabricated thereof |
US10043903B2 (en) | 2015-12-21 | 2018-08-07 | Samsung Electronics Co., Ltd. | Semiconductor devices with source/drain stress liner |
US10283597B2 (en) * | 2016-11-10 | 2019-05-07 | The United States Of America, As Represented By The Secretary Of The Navy | Scandium-containing III-N etch-stop layers for selective etching of III-nitrides and related materials |
US10128107B1 (en) * | 2017-08-31 | 2018-11-13 | Rfhic Corporation | Wafers having III-Nitride and diamond layers |
WO2019077420A1 (en) * | 2017-10-19 | 2019-04-25 | King Abdullah University Of Science And Technology | HIGH-ELECTRON MOBILITY TRANSISTOR HAVING AN INTERMEDIATE BORON NITRIDE ALLOY LAYER AND METHOD FOR PRODUCING THE SAME |
JP7439536B2 (ja) * | 2020-01-28 | 2024-02-28 | 富士通株式会社 | 半導体装置 |
CN111477536A (zh) * | 2020-03-31 | 2020-07-31 | 华为技术有限公司 | 一种半导体外延结构及半导体器件 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3505405B2 (ja) * | 1998-10-22 | 2004-03-08 | 三洋電機株式会社 | 半導体素子及びその製造方法 |
GB2343294A (en) * | 1998-10-31 | 2000-05-03 | Sharp Kk | Lattice-matched semiconductor devices |
GB2350721A (en) * | 1999-08-24 | 2000-12-06 | Arima Optoelectronics Corp | Growing semiconductor layers |
FR2810159B1 (fr) * | 2000-06-09 | 2005-04-08 | Centre Nat Rech Scient | Couche epaisse de nitrure de gallium ou de nitrure mixte de gallium et d'un autre metal, procede de preparation, et dispositif electronique ou optoelectronique comprenant une telle couche |
TWI230978B (en) * | 2003-01-17 | 2005-04-11 | Sanken Electric Co Ltd | Semiconductor device and the manufacturing method thereof |
JP4332720B2 (ja) * | 2003-11-28 | 2009-09-16 | サンケン電気株式会社 | 半導体素子形成用板状基体の製造方法 |
US8362503B2 (en) | 2007-03-09 | 2013-01-29 | Cree, Inc. | Thick nitride semiconductor structures with interlayer structures |
-
2008
- 2008-03-25 FR FR0851891A patent/FR2929445B1/fr active Active
-
2009
- 2009-03-11 EP EP09725028A patent/EP2269212A1/en not_active Withdrawn
- 2009-03-11 KR KR1020107023128A patent/KR101186032B1/ko active IP Right Grant
- 2009-03-11 CN CN200980109974.0A patent/CN101978470B/zh active Active
- 2009-03-11 JP JP2011501165A patent/JP2011515861A/ja active Pending
- 2009-03-11 WO PCT/EP2009/052881 patent/WO2009118244A1/en active Application Filing
- 2009-03-11 US US12/934,359 patent/US8093077B2/en active Active
-
2011
- 2011-12-07 US US13/313,522 patent/US8283673B2/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110791805A (zh) * | 2019-10-31 | 2020-02-14 | 中国电子科技集团公司第十三研究所 | 一种衬底、外延片及其生长方法 |
CN111334781A (zh) * | 2020-04-20 | 2020-06-26 | 哈尔滨科友半导体产业装备与技术研究院有限公司 | 一种氮化铝晶体生长所用的大尺寸复合籽晶及其制备方法 |
Also Published As
Publication number | Publication date |
---|---|
US8283673B2 (en) | 2012-10-09 |
US20120074427A1 (en) | 2012-03-29 |
WO2009118244A1 (en) | 2009-10-01 |
US20110012128A1 (en) | 2011-01-20 |
FR2929445A1 (fr) | 2009-10-02 |
KR101186032B1 (ko) | 2012-09-25 |
KR20100124334A (ko) | 2010-11-26 |
JP2011515861A (ja) | 2011-05-19 |
FR2929445B1 (fr) | 2010-05-21 |
US8093077B2 (en) | 2012-01-10 |
EP2269212A1 (en) | 2011-01-05 |
CN101978470B (zh) | 2013-03-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101978470B (zh) | 氮化镓或氮化铝镓层的制造方法 | |
US7767307B2 (en) | Preparation method of a coating of gallium nitride | |
US8475588B2 (en) | Wafer structure and epitaxial growth method for growing the same | |
TWI686498B (zh) | 半導體元件用磊晶基板、半導體元件以及半導體元件用磊晶基板之製造方法 | |
JP4493646B2 (ja) | 後続のターゲット材堆積のためのシリコン基板を改質するバッファ構造および該バッファ構造を形成する方法 | |
KR100744933B1 (ko) | 실리콘 기판 상에 형성된 질화물 반도체 및 그 제조 방법 | |
EP2615628B1 (en) | Method of growing nitride semiconductor layer | |
GB2485418A (en) | GaN on Si device substrate with GaN layer including sub-10nm SiNx interlayers that promote crystal growth with reduced threading dislocations | |
US9252012B2 (en) | Method of fabricating a nitride substrate | |
KR100691159B1 (ko) | 질화갈륨계 반도체의 제조 방법 | |
CN106206258B (zh) | 在硅衬底上形成GaN层的方法以及GaN衬底 | |
US8969178B2 (en) | Method of manufacturing large area gallium nitride substrate | |
KR101672213B1 (ko) | 반도체장치의 제조방법 | |
US9685589B2 (en) | Optoelectronic component with a layer structure | |
CN111477534A (zh) | 氮化铝模板及其制备方法 | |
JP2004296701A (ja) | エピタキシャル基板ならびに半導体装置および窒化物系半導体の結晶成長方法 | |
KR101681279B1 (ko) | 질화물 박막 및 그 제조방법 | |
KR100969159B1 (ko) | 질화물 반도체 기판의 제조 방법 | |
KR20160063360A (ko) | 반도체 웨이퍼 및 반도체 웨이퍼의 제조 방법 | |
Sun et al. | Stress evolution influenced by oxide charges on GaN metal–organic chemical vapor deposition on silicon-on-insulator substrate |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: SUTAIKE INC. Free format text: FORMER OWNER: SOITEC SPECIALTY ELECTRONICS S. A. S Effective date: 20150618 |
|
C41 | Transfer of patent application or patent right or utility model | ||
C56 | Change in the name or address of the patentee |
Owner name: SOITEC SPECIALTY ELECTRONICS S. A. S Free format text: FORMER NAME: PICOGIGA INTERNATIONAL SAS |
|
CP01 | Change in the name or title of a patent holder |
Address after: French Benin Patentee after: Tektronix Electronics Co. Address before: French Benin Patentee before: PICOGIGA INTERNATIONAL |
|
TR01 | Transfer of patent right |
Effective date of registration: 20150618 Address after: French Bernini Patentee after: SOITEC Address before: French Benin Patentee before: Tektronix Electronics Co. |