CN101950268A - Real-time monitoring scheme for clock frequency of controller - Google Patents
Real-time monitoring scheme for clock frequency of controller Download PDFInfo
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- CN101950268A CN101950268A CN 201010296554 CN201010296554A CN101950268A CN 101950268 A CN101950268 A CN 101950268A CN 201010296554 CN201010296554 CN 201010296554 CN 201010296554 A CN201010296554 A CN 201010296554A CN 101950268 A CN101950268 A CN 101950268A
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Abstract
The invention discloses a real-time monitoring scheme for clock frequency of a controller. An 89C51 singlechip system and an independent clock watchdog chip MAX705 are used as hardware platforms, and higher layer protocol monitoring and reliable data transmission ensuring measures are mainly designed in a monitoring protocol stack. The real-time monitoring scheme controls the monitoring of the controller frequency by a specific passing protocol; tested result data and a state of a singlechip controller can be timely transmitted to a mobile phone of a tester in the communication mode; the tester can remotely monitor a tested controller by using the communication mode; and wireless transmission of the tested data is implemented through an integrated GPRS module. The real-time monitoring scheme for the clock frequency of the controller has the advantages of low cost and capacity of monitoring the clock frequency of the controller in real time.
Description
Technical field
The present invention relates to a kind of monitoring method of controller, a kind of specifically real-time monitoring scheme of controller clock frequency.
Background technology
Key in technical field herein and describe paragraph.Along with the develop rapidly of IT industry, under the great demand pulling of intellectuality equipment, Chinese Embedded system industry development is swift and violent, is becoming to drive IT industry development new growth point.Built-in system software is widely used in fields such as consumer electronics, communication, Industry Control, automotive electronics, information household appliances, safety monitoring, medical electronics, network, intelligent transportation, Aero-Space, intelligent building, finance, military project, in the IT application process of entire society, playing the part of very important role, and these fields are very high to security requirement, and the person and property safety are the important quality characteristic of these systems.Under this background, country and fully paying attention to for the security of embedded system in the world, and issued a plurality of securities pressure standards.For example, GB4706.1-2005 " the general requirement of safety first part of family expenses and similar applications electrical equipment " and GB14536.1-2008 " family expenses and similar applications electricity self-actuated controller part 1: general requirement ".The GB14536.1-2008 standard is with adopting the IEC60730.1-2003 of International Electrotechnical Commission " family expenses and similar applications electricity self-actuated controller part 1: general requirement ", in standard, will use the embedded software controller to be divided into category-B and C quasi-controller, and stipulate the security measures that the controller of these two classifications must be taked according to its potential security hidden danger.Wherein, the controller clock frequency monitoring is the safety practice that category-B and C quasi-controller all must be taked.
Preceding detection to the controller clock frequency depends on instrument and equipment mostly, and for example oscillograph, frequency meter etc. use the clock frequency of instrument and equipment controller to detect the cost costliness, do not have the shortcoming that real-time is monitored characteristic.
Summary of the invention
The object of the present invention is to provide the requirement of a kind of GB14536.1-2008 of meeting mark, with low cost, the technical scheme that can monitor in real time the clock frequency of controller.
Frequency monitoring Zhao clock frequency, the most original notion are the frequency that clock frequency generator produces, for example quartz crystal oscillator, quartz crystal.For MCU, refer to the running frequency of CPU more, i.e. the pulse of the inner generation of CPU p.s. how many times, this also weighs the performance of CPU to a great extent.Frequency monitoring just needs the clock frequency of monitoring CPU the drift of mistake or frequency whether to occur in operational process.
For the clock frequency of test controller, need to use a secondary clock source that is independent of the work clock source of CPU.When test, sprocket pulse according to the single-chip microcomputer timer is to be obtained by the time clock frequency division, and linear between the two rule principle, timing cycle T with secondary clock source is a benchmark, in the period T of secondary clock source, relatively whether whether single-chip microcomputer timer timing time T1 coincide within the specific limits with the period T of secondary clock source, and the skew of the clock frequency of single-chip microcomputer can be calculated by following formula and be obtained:
If
In certain error allowed band, illustrate that then the controller clock frequency is correct, otherwise be considered as occurring the clock frequency fault.
For test clock accurately whether, need a secondary clock source, use hardware watchdog to be one and well select with independent clock source.MCU that develops in recent years or DSP have become the WatchDog Timer functional module at chip integration, but early stage 8031 or 89C51 series, just do not possess watchdog circuit, when therefore carrying out clock rate testing for this class single-chip microcomputer, then can external independently house dog special chip, for example, MAX705, MAX813 etc.
The clock frequency monitoring scheme of the present invention design is to be hardware platform with 89C51 Single Chip Microcomputer (SCM) system and independent clock watchdog chip MAX705.
The present invention has adopted specific communication protocols to control to the monitoring of controller frequency, the state of test result data and singlechip controller can in time be sent on the mobile phone of tester's use by this kind communication mode, and the tester can use the tested controller of this kind communication mode remote monitoring.
The present invention has mainly designed monitoring upper-layer protocol and reliable data transmission safeguard measure in the monitoring protocol stack.The wireless transmission of test data is to realize by integrated GPRS module, and therefore, the data transmission layer protocol is to realize by integrated existing ICP/IP protocol stack.
The present invention uses the strategy of software detection replacement hardware detection, has reduced the cost of controller clock frequency detecting; Can monitor in real time the clock frequency of controller, when drift phenomenon appearred in the clock frequency of controller, monitoring device can in time be reported to the police and be notified the user, and takes protective measure; The integrated wireless communication mode possesses the monitoring protocol stack, can carry out remote monitoring to the clock frequency of tested controller.The user can carry out the remote testing operation to controller at any time and any place, and the test result data of obtaining.
Description of drawings
Fig. 1 is the frequency test hardware structure diagram.
Fig. 2 is the frequency monitoring program flow diagram.
Fig. 3 is the framework map of monitoring protocol stack.
Fig. 4～Figure 10 is for guaranteeing the different communication handshake measure of reliability of data transmission.
Embodiment
The clock frequency monitoring scheme of this paper design is to be hardware platform with 89C51 Single Chip Microcomputer (SCM) system and independent clock watchdog chip MAX705, as shown in Figure 1.The time of overflowing in cycle of MAX705 is 1.6 seconds, and the cycle is when overflowing, its WDO pin output low level, and the external interrupt 0 that triggers the 89C51 single-chip microcomputer is interrupted, and internal counter resets, from newly picking up counting.The INT0 pin of the WDI pin input high level of house dog (more than be the TTL standard) 89C51 single-chip microcomputer is set to low level and triggers, when entering external interrupt 0 interrupt service routine, stop the timing of timer 0, CPU reads the timing time data, and calculate according to formula 1, if the clock crystal oscillator of single-chip microcomputer is 12MHz, then the drift of controller frequency is
(timing time of single-chip microcomputer timer 0 is defined as
), if (the acceptable frequency deviation of definition is among the present invention within the acceptable range in the drift of frequency
), then the video crystal oscillator is working properly, otherwise carries out clock frequency fault handling operation.When single-chip microcomputer withdrawed from interrupt service routine, the chronometric data of first zero clearing timer 0 restarted the timing of timer 0 and house dog afterwards, repeats above identical operations after next 1.6 seconds, and the monitoring facilities process flow diagram is seen accompanying drawing 2.
The technical program has adopted specific communication protocols to control to the monitoring of controller frequency, the state of test result data and singlechip controller can in time be sent on the mobile phone of tester's use by this kind communication mode, and the tester can use the tested controller of this kind communication mode remote monitoring.The framework such as the accompanying drawing 3 of monitoring protocol stack, the main effect of wherein monitoring the upper-layer protocol layer is the test instruction of organizing and resolve test data and tester flexibly, the Data Transport Protocol layer then is a reliable transmission of being responsible for Monitoring Data and instruction, the GPRS radio communication mode that is based on 2.5G that this paper adopts.The tester can not be subjected to the restriction of region, and equipment under test is carried out remote monitoring.
The present invention has mainly designed monitoring upper-layer protocol and reliable data transmission safeguard measure in the monitoring protocol stack.
1), the formation of observing and controlling upper-layer protocol
Being constructed as follows shown in the table 1 of observing and controlling upper-layer protocol:
Table 1 monitoring upper-layer protocol constitutes
| First symbol | The address | CID | STEP | INFOLEN | DATA | CHECK | End mark |
| 1 byte | 1 byte | 1 byte | 1 byte | 4 bytes | The X byte | 4 bytes | 1 byte |
First symbol: second character among the ASCII;
End mark: the 3rd character among the ASCII;
The address: the testing apparatus address, with the character representation of one 8 16 systems, this address is used to be identified at different equipment in the same wireless communication.In same passage, can articulate 255 testing apparatuss at most;
CID: expression test function point, as register, internal memory etc.;
STEP: the segmentation of presentation function point, as functional test, cycle self check etc.;
INFOLEN: four hexadecimal character representations, span are that 0000～FFFF has determined the length of imformosome to be 65535 characters to the maximum;
XXXX: expression is made up of the character of INFOLEN length, is the True Data content of communication;
CHECK: the value that obtains with FFFF after the ASCII value addition of all characters of expression except that beginning and end mark.Use hexadecimal representation.It is the check code of whole information.
2) reliable data transmission safeguard measure
At the various communication abnormality situations that may occur in the data transmission engineering, the present invention has designed following communication handshake measure and has guaranteed reliability of data transmission:
The application layer normal communication is seen accompanying drawing 4.
When transmit leg is received the wrong responses hardwood, carry out three repeating transmission, abandon after wrong responses is all received in three repeating transmission, see accompanying drawing 5.
Send no response three times, transmit leg is abandoned, and sees accompanying drawing 6.
The take over party sends the response message hardwood, and the wrong responses hardwood is all received in three transmissions, and the take over party abandons sending the response message hardwood, sees accompanying drawing 7.
The take over party sends the response message hardwood, and three times all overtime not the receiving of transmission replied hardwood, abandons sending, and sees accompanying drawing 8.
Comprise and reply the hardwood receive time-out, the application layer communication process is seen accompanying drawing 9.
Comprise the wrong responses hardwood, the application layer communication process is seen accompanying drawing 10.
Claims (5)
1. the real-time monitoring scheme of a controller clock frequency, whether the clock frequency of main monitoring CPU the drift of mistake or frequency occurs in operational process, it is characterized in that, when test, sprocket pulse according to the single-chip microcomputer timer is to be obtained by the time clock frequency division, and linear between the two rule principle, timing cycle T with secondary clock source is a benchmark, in the period T of secondary clock source, relatively whether whether single-chip microcomputer timer timing time T1 coincide within the specific limits with the period T of secondary clock source, and the skew of the clock frequency of single-chip microcomputer can be calculated by following formula and be obtained:
If
In certain error allowed band, illustrate that then the controller clock frequency is correct, otherwise be considered as occurring the clock frequency fault.
2. the real-time monitoring scheme of a kind of controller clock frequency as claimed in claim 1 is characterized in that, is hardware platform with 89C51 Single Chip Microcomputer (SCM) system and independent clock watchdog chip MAX705.
3. the real-time monitoring scheme of a kind of controller clock frequency as claimed in claim 1 is characterized in that, the technical program has mainly designed monitoring upper-layer protocol and reliable data transmission safeguard measure in the monitoring protocol stack.
4. as the real-time monitoring scheme of claim 1 or 3 described a kind of controller clock frequencies, it is characterized in that being constructed as follows of observing and controlling upper-layer protocol:
First symbol: second character among the ASCII;
End mark: the 3rd character among the ASCII;
The address: the testing apparatus address, with the character representation of one 8 16 systems, this address is used to be identified at different equipment in the same wireless communication;
In same passage, can articulate 255 testing apparatuss at most;
CID: expression test function point, as register, internal memory etc.;
STEP: the segmentation of presentation function point, as functional test, cycle self check etc.;
INFOLEN: four hexadecimal character representations, span are that 0000～FFFF has determined the length of imformosome to be 65535 characters to the maximum;
XXXX: expression is made up of the character of INFOLEN length, is the True Data content of communication;
CHECK: the value that obtains with FFFF after the ASCII value addition of all characters of expression except that beginning and end mark, use hexadecimal representation, be the check code of whole information.
5. as the real-time monitoring scheme of claim 1 or 3 described a kind of controller clock frequencies, it is characterized in that the reliable data transmission safeguard measure has taked different communication handshake measures to guarantee.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103226507A (en) * | 2013-04-28 | 2013-07-31 | 惠州市德赛西威汽车电子有限公司 | Method for preventing system crash in embedded system |
| CN103777072A (en) * | 2012-10-24 | 2014-05-07 | 上海华虹集成电路有限责任公司 | Method for monitoring clock frequencies of multiple clock sources |
| CN105468554A (en) * | 2015-11-27 | 2016-04-06 | 宁波三星医疗电气股份有限公司 | Method for realizing polarity-adaptive UART simulation |
| CN105630066A (en) * | 2015-12-30 | 2016-06-01 | 工业和信息化部电子第五研究所 | Clock drift monitoring method and system for relay protection device controller |
| CN106452647A (en) * | 2016-11-07 | 2017-02-22 | 北京必创科技股份有限公司 | Radio frequency device and wireless sensor network system |
| CN107145419A (en) * | 2017-05-31 | 2017-09-08 | 河南思维轨道交通技术研究院有限公司 | A kind of external crystal oscillator frequency measuring methods of CPU |
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| CN101154212A (en) * | 2006-09-29 | 2008-04-02 | 上海海尔集成电路有限公司 | Eight-digit compatible C51 instruction set microcontroller |
| CN101252281A (en) * | 2008-02-28 | 2008-08-27 | 国电南瑞科技股份有限公司 | Method and system for testing electric voltage reactive-load integrated control functions |
| CN101556466A (en) * | 2009-05-08 | 2009-10-14 | 湖北省自动化研究所 | Method for automatically searching and fixing natural frequency of electric horn of motor vehicle |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101154212A (en) * | 2006-09-29 | 2008-04-02 | 上海海尔集成电路有限公司 | Eight-digit compatible C51 instruction set microcontroller |
| CN101252281A (en) * | 2008-02-28 | 2008-08-27 | 国电南瑞科技股份有限公司 | Method and system for testing electric voltage reactive-load integrated control functions |
| CN101556466A (en) * | 2009-05-08 | 2009-10-14 | 湖北省自动化研究所 | Method for automatically searching and fixing natural frequency of electric horn of motor vehicle |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103777072A (en) * | 2012-10-24 | 2014-05-07 | 上海华虹集成电路有限责任公司 | Method for monitoring clock frequencies of multiple clock sources |
| CN103226507A (en) * | 2013-04-28 | 2013-07-31 | 惠州市德赛西威汽车电子有限公司 | Method for preventing system crash in embedded system |
| CN105468554A (en) * | 2015-11-27 | 2016-04-06 | 宁波三星医疗电气股份有限公司 | Method for realizing polarity-adaptive UART simulation |
| CN105630066A (en) * | 2015-12-30 | 2016-06-01 | 工业和信息化部电子第五研究所 | Clock drift monitoring method and system for relay protection device controller |
| CN106452647A (en) * | 2016-11-07 | 2017-02-22 | 北京必创科技股份有限公司 | Radio frequency device and wireless sensor network system |
| CN107145419A (en) * | 2017-05-31 | 2017-09-08 | 河南思维轨道交通技术研究院有限公司 | A kind of external crystal oscillator frequency measuring methods of CPU |
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Application publication date: 20110119 |