CN101917317A - Data transmitting and receiving devices and high-speed bus terminal interface component - Google Patents
Data transmitting and receiving devices and high-speed bus terminal interface component Download PDFInfo
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Abstract
The invention is suitable for the field of data transmission and provides data transmitting and receiving devices and a high-speed bus terminal interface component. The data transmitting device comprises a protocol unit, a digital-to-analog conversion unit and a line driver transmitting circuit, wherein the protocol unit is used for performing GJB289A protocol conversion and modulation on data or a command stored in a storage so as to obtain a digital modulating signal; the digital-to-analog conversion unit is used for converting the digital modulating signal obtained by the protocol unit into an analog signal; and the line driver transmitting circuit is used for performing line driving and coupling transformation on the analog signal obtained by the digital-to-analog conversion and transmitting the analog signal through a GJB289A bus. In the embodiment of the invention, the digital modulating signal is obtained by performing the GJB289A protocol conversion and modulation on the data or the command stored in the storage through the protocol unit so that carrier transmission is realized, transmission rate and broadband utilization ratio are high and real-time transmission of a large amount of data in a GJB289A bus network is realized.
Description
Technical field
The invention belongs to field of data transmission, relate in particular to a kind of data transmission, receiving system and high-speed bus terminal interface component.
Background technology
At present, China's 1553 buses use standard to be GJB289A, the regulation electric signal characteristic is based on asynchronous serial, the command/response formula data/address bus of 1Mbps speed, transmission of messages adopts time division multiplexing mode, have integrality, repeatability and plan content in advance and periodicity, have characteristics such as certainty behavior (low postpone) and low error rate, transmission medium is a twisted-pair cable, has been widely used in the interactive internal subsystems of space industry, military hardware and road vehicle.
The GJB289A bus communication system comprises main bus and redundant bus (perhaps less important bus), and terminal has the same time to be monitored and the command decode ability on the two-way bus, and only needs one tunnel bus when sending signal.Certainly, redundant bus can expand to more than 2 the tunnel.
But existing GJB289A bus communication system only can be with the speed rates of 1Mbps, and bandwidth availability ratio is low, transmission rate is low, has been not suitable for following data/address bus transmission requirement.
Summary of the invention
The purpose of the embodiment of the invention is intended to solve the problem that prior art exists, and provides a kind of data sending device, transmission rate height, broadband utilance height.
The embodiment of the invention is achieved in that a kind of data sending device, and described device comprises:
Protocol element is used for reading data or the order that memory is stored, and carries out obtaining digital modulation signals after GJB289A protocol conversion, the modulation;
D/A conversion unit is used for the digital modulation signals that described protocol element obtains is converted to analog signal; And
Line drive transtation mission circuit, the analog signal that is used for that described D/A conversion unit is obtained carry out sending by the GJB289A bus after line drives processing and coupling transformation.
Another purpose of inventive embodiments is to provide a kind of high-speed bus terminal interface component that comprises above-mentioned data sending device.
Another purpose of the embodiment of the invention is to provide a kind of data sink, and described device comprises:
Be coupled transformation and line of line drive receiving circuit, the analog signal that is used for receiving by the GJB289A bus interface drives and handles back output;
AD conversion unit, the analog signal conversion that is used for described line drive receiving circuit output is a digital modulation signals; And
Protocol element, the digital modulation signals that is used for that described AD conversion unit is obtained carry out exporting after demodulation, the GJB289A protocol conversion.
Another purpose of the embodiment of the invention is to provide a kind of high-speed bus terminal interface component that comprises above-mentioned data sink.
In embodiments of the present invention, read the data or the order of storing in the memory by protocol element, carry out obtaining digital modulation signals after GJB289A protocol conversion, the modulation, realize carrier transmission, a kind of data sending device is provided, transmission rate height, broadband utilance height have been realized the real-time Transmission of GJB289A bus network mass data satisfying following data/address bus transmission demand.
Description of drawings
Fig. 1 is the structural representation of the data sending device that provides of the embodiment of the invention;
Fig. 2 is the structural representation of the modulating unit that provides of the embodiment of the invention;
Fig. 3 is the structural representation of the data sink that provides of the embodiment of the invention;
Fig. 4 is the structural representation of the demodulating unit that provides of the embodiment of the invention;
Fig. 5 is the structural representation of the high-speed bus terminal interface component that provides of the embodiment of the invention;
Fig. 6 is the port annexation schematic diagram between modulating unit, demodulating unit and protocol element, D/A conversion unit and the AD conversion unit of the high-speed bus terminal interface component that provides of the embodiment of the invention;
Fig. 7 is the framework schematic diagram of the high-speed communication system that provides of the embodiment of the invention;
Fig. 8 is the realization flow figure of the bus communication system data transmission method for uplink that provides of the embodiment of the invention;
Fig. 9 is the realization flow figure of the bus communication system data receive method that provides of the embodiment of the invention.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
In embodiments of the present invention, read the data or the order of storing in the memory, carry out obtaining digital modulation signals after GJB289A protocol conversion, the modulation, realize carrier transmission, a kind of data sending device is provided by protocol element.
Fig. 1 shows the structure of the data sending device that the embodiment of the invention provides, and for convenience of explanation, only shows the part relevant with the embodiment of the invention.
This data sending device can be used for high-speed bus terminal interface component, and this high-speed bus terminal interface component can be used for the bus termination of high-speed communication system, wherein:
D/A conversion unit 102, the digital modulation signals that protocol element 101 is obtained is converted to analog signal;
Line drive transtation mission circuit 103 carries out the analog signal that D/A conversion unit 102 obtains to send by the GJB289A bus after line drives processing and coupling transformation.
When specific implementation, bus termination can write program micro-control unit, and (Micro ControllerUnit MCU), finishes configuration to the register configuration and the storage space of protocol element 101 by MCU, and to the control of protocol element 101, comprise reset, startup etc.; Protocol element 101 reads the order and/or the data that will send from memory.
As shown in Figure 1, protocol element 101 specifically comprises:
Wherein, modulation system can for quadrature amplitude modulation (Quadrature amplitude modulation, QAM) etc.
Particularly, as shown in Figure 2, modulation module 1012 comprises Read-Solomon (Reed-Solomon, RS) coding submodule 10121, planisphere mapping submodule 10122, forming filter 10123, interpolation filter 10124 and QAM modulation submodule 10125.Wherein, RS coding submodule 10121 receives the digital baseband signal that protocol conversion module 1011 obtains, and is used for eliminating the unexpected error in the communication process, increases the reliability of system, can greatly reduce the error rate of system; The effect of planisphere mapping can improvement communication; Forming filter 10123, interpolation filter 10124 can allow baseband signal be more suitable in Channel Transmission, reduce intersymbol interference, reduce digital-to-analogue conversion (Digital to Analog Converter, error DAC) by interpolation; QAM modulates submodule 10125, and the digital baseband signal that obtains after with carrier signal protocol conversion module 1011 being handled is modulated.Here, adopt two forming filters 10123 and two interpolation filters 10124, to handle homophase and quadrature two paths of signals.The pin Mod[X:0 of QAM modulation submodule 10125] dateout handles to DAC, and pin DAC CLK output is as DAC control clock, and pin DAC EN exports as the DAC enable signal.
Further, for the signal phase that reduces high-speed bus terminal interface component blurs, as a preferred embodiment of the present invention, modulation module 1012 also comprises differential coding submodule 10126 between RS coding submodule 10121 and planisphere mapping submodule 10122, can increase the theorem in Euclid space of planisphere, and the antijamming capability of high-speed bus terminal interface component.
In order to realize the mass data real-time Transmission, as another preferred embodiment of the present invention, encode and carry out RS coding and QAM modulation after every bit representative data volume improves again in the graceful Chester that modulation module 1012 obtains protocol conversion module 1011.
In order to reduce power consumption, error rates of data, reduce the processing time, improve Real time Efficiency, as another preferred embodiment of the present invention, modulation module 1012 directly carries out RS coding and QAM modulation according to default transport format information with the data that protocol conversion module 1011 obtains.Wherein, transport format information definition transformat.Like this, mainly be by redefining transformat to realize the mass data real-time Transmission, compare above-mentioned modulator approach, the graceful Chester that protocol conversion module 1011 the is obtained mode that every bit representative data volume improves of encoding, help power consumption control, can reduce error rates of data again, reduce the processing time, Real time Efficiency is higher.
The embodiment of the invention also provides a kind of high-speed bus terminal interface component, comprises above-mentioned data sending device.This high-speed bus terminal interface component comprises two groups of passages, is linked into the main bus and the redundant bus of GJB289A bus network respectively.
Corresponding above-mentioned data sending device, as shown in Figure 3, the embodiment of the invention also provides a kind of structure of data sink, for convenience of explanation, only shows the part relevant with the embodiment of the invention.
This data sink can be used for high-speed bus terminal interface component, and this high-speed bus terminal interface component can be used for the bus termination of high-speed communication system, wherein:
Line drive receiving circuit 301, will be coupled by the analog signal that the GJB289A bus interface is received transformation and line drive handles back output;
AD conversion unit 302, the analog signal conversion that line drive receiving circuit 301 is exported is a digital modulation signals;
Protocol element 303, the number modulation word signal that AD conversion unit 302 is obtained carries out exporting after demodulation, the GJB289A protocol conversion process.
Similarly, when specific implementation, bus termination can write program micro-control unit (MicroController Unit, MCU), finish configuration by MCU, and to the control of protocol element 303 to the register configuration and the storage space of protocol element 303, comprise reset, startup etc.; After receiving digital modulation signals, protocol element is carried out demodulation, GJB289A protocol conversion process with the digital modulation signals that receives, and the data that obtain after will handling deposit the predetermined space of memory in, notifies terminal its operating state simultaneously.
As shown in Figure 3, protocol element 303 specifically comprises:
Demodulation module 3031, the digital modulation signals that is used for AD conversion unit 302 is obtained carries out demodulation, obtains digital baseband signal;
Protocol conversion module 3032, the digital baseband signal that is used for that demodulation module 3031 is obtained carries out exporting after the GJB289A protocol conversion.
Wherein, demodulation module 3031 adopts the QAM demodulation mode that digital modulation signals is carried out demodulation.Modulation module 1012 in the corresponding above-mentioned data sending device, as shown in Figure 4, demodulation module 1012 comprises that QAM demodulation submodule 30311, planisphere reflection penetrate submodule 30312 and RS decoding submodule 30313.The inverse process that submodule 30312 and RS decoding submodule 30313 are carried out modulation module 1012 shown in Figure 2 is penetrated in the reflection of QAM demodulation submodule 30311, planisphere; Wherein, QAM demodulation submodule 30311 has comprised decimation filter, matched filter, carrier synchronization, sign synchronization, equalizer; The pin Demod[X:0 of QAM demodulation submodule 30311] connect the adc data output; The pin parallel data of RS decoding submodule 30313 outputs to protocol conversion module.
Further, demodulation module 1012 is penetrated between module and the RS decoding submodule 30313 in the planisphere reflection and is also comprised differential decoding submodule 30314.
The embodiment of the invention also provides a kind of high-speed bus terminal interface component, comprises above-mentioned data sink.This high-speed bus terminal interface component comprises two groups of passages, is linked into the main bus and the redundant bus of GJB289A bus network respectively.
When specific implementation, bus termination can write program micro-control unit, and (Micro ControllerUnit MCU), finishes the configuration of high-speed bus terminal interface component pattern and storage space by MCU; Line driver element 502 connects the GJB289A bus, and conversion unit of protocol 501 meets memory and MCU.After starting high-speed bus terminal interface component, conversion unit of protocol 501 reads the data that will send from memory, carry out exporting to modulating unit 503 after the GJB289A protocol conversion, perhaps the digital baseband signal after demodulating unit 505 demodulation is carried out the data that the GJB289A protocol conversion obtains and deposit the predetermined space of memory in, notify bus termination its operating state simultaneously.
Fig. 6 shows the port annexation of 506 of modulating unit 503, demodulating unit 505 and conversion unit of protocol 501, D/A conversion unit 504 and AD conversion unit.When sending, data carry out the GJB289A protocol conversion by conversion unit of protocol 501 reading of data, obtain digital modulation signals by modulating unit 503, be converted to analog signal by D/A conversion unit 504 then, carry out line through line driver element 502 and drive and handle, obtain high speed GJB289A signal after the coupling transformation and enter Network Transmission; Receive high speed GJB289A signal from network during Data Receiving, drive and handle by be coupled transformation, line of line driver element 502, be converted to digital modulation signals by AD conversion unit 506 again, finish the signal demodulation by demodulating unit 505 then and obtain sending into conversion unit of protocol 501 behind the digital baseband signal and carry out the GJB289A protocol conversion.Therefore, modulating unit 503, demodulating unit 505 are connected with the port of conversion unit of protocol 501, D/A conversion unit 504 and AD conversion unit 506 and mainly are serial data I/O end and modulation signal output/restituted signal input.
The framework that the high-speed bus terminal interface component that the embodiment of the invention provides is applied to high-speed communication system as shown in Figure 7.The high-speed communication system network has used 1 road redundant bus, comprises a series of high-speed bus terminal interface components; Each high-speed bus terminal interface component satisfies the GJB289A bus protocol, has two groups of passages, is linked into main bus and redundant bus respectively.Communication process, i.e. data transmission, receiving course can be according to the bus of customer requirements by the selection initialization system Serial Data Transfer Mode of serial-port.When bus reporting terminal error condition, can select the bus selection whether retransmit and retransmit according to GJB289A bus protocol regulation.Certainly, in the concrete use, can determine the quantity of redundant bus according to demand.
Fig. 8 shows the realization flow of the bus communication system data transmission method for uplink that the embodiment of the invention provides, and details are as follows:
In step S801, the data or the order of storing in the memory are carried out obtaining digital modulation signals after GJB289A protocol conversion, the modulation;
In step S802, the digital modulation signals that obtains is converted to analog signal;
In step S803, the analog signal that obtains is carried out sending by the GJB289A bus after line drives processing and coupling transformation.
Particularly, step S802 is included as:
In step S8021, the GJB289A protocol conversion is carried out in the data or the order of storing in the memory, obtain digital baseband signal;
In step S8022, the baseband signal that obtains is modulated, realize carrier transmission, modulation system can for quadrature amplitude modulation (Quadrature amplitude modulation, QAM) etc.
Further, step S8022 comprises:
The digital baseband signal that obtains is carried out RS coding, planisphere mapping, shaping filter, interpolation filtering and QAM modulation treatment.
Wherein, the specific implementation of each step repeats no more as mentioned above.
In order to realize the mass data real-time Transmission,, before the digital baseband signal that will obtain carries out the RS coding, earlier the digital baseband signal that obtains is increased the data volume of 1 bit representative as another preferred embodiment of the present invention.
In order to reduce power consumption, error rates of data, reduce the processing time, improve Real time Efficiency, as another preferred embodiment of the present invention, redefine transformat, above-mentioned steps S8022 is specially:
According to default transport format information, the digital baseband signal that obtains is carried out RS coding and QAM modulation.
Fig. 9 shows the realization flow of the bus communication system data receive method that the embodiment of the invention provides, and details are as follows:
In step S901, will be coupled by the analog signal that the GJB289A bus interface is received transformation and line drive to be handled;
In step S902, with after handling analog signal conversion be digital modulation signals;
In step S903, the digital modulation signals that obtains is carried out exporting after demodulation, the GJB289A protocol conversion.
Wherein, demodulation mode can be QAM demodulation etc.
Its specific implementation repeats no more as mentioned above.
One of ordinary skill in the art will appreciate that, realize that all or part of step in the foregoing description method is to instruct relevant hardware to finish by program, described program can be in being stored in a computer read/write memory medium, described storage medium is as ROM/RAM, disk, CD etc.
In embodiments of the present invention, by protocol element the data or the order of storing in the memory are carried out obtaining digital modulation signals after GJB289A protocol conversion, the modulation, realize carrier transmission, a kind of data sending device is provided, transmission rate height, broadband utilance height, realize the real-time Transmission of GJB289A bus network mass data, satisfied following data/address bus transmission demand.
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (14)
1. a data sending device is characterized in that, described device comprises:
Protocol element is used for reading data or the order that memory stores and carries out obtaining digital modulation signals after GJB289A protocol conversion, the modulation;
D/A conversion unit is used for the digital modulation signals that described protocol element obtains is converted to analog signal; And
Line drive transtation mission circuit, the analog signal that is used for that described D/A conversion unit is obtained carry out sending by the GJB289A bus after line drives processing and coupling transformation.
2. device as claimed in claim 1 is characterized in that, described protocol element comprises:
Protocol conversion module is used for reading data or the order that memory is stored, and carries out the GJB289A protocol conversion, obtains digital baseband signal; And
Modulation module is used for the digital baseband signal that described protocol conversion module obtains is modulated, and realizes carrier transmission, obtains digital modulation signals.
3. device as claimed in claim 2 is characterized in that, described modulation module adopts the quadrature amplitude modulation mode that digital baseband signal is modulated.
4. device as claimed in claim 3 is characterized in that, described modulation module comprises Reed Solomon Coding submodule, planisphere mapping submodule, forming filter, interpolation filter and the quadrature amplitude modulation submodule that connects successively.
5. device as claimed in claim 4 is characterized in that described modulation module also comprises the differential coding submodule, and described differential coding submodule is connected between described Reed Solomon Coding submodule and the planisphere mapping submodule.
6. device as claimed in claim 3 is characterized in that, encodes and carry out graceful Chester coding, Reed Solomon Coding and quadrature amplitude modulation again after every bit representative data volume improves in the graceful Chester that described modulation module obtains protocol conversion module.
7. device as claimed in claim 3 is characterized in that, described modulation module is according to default transport format information, and the digital baseband signal that described protocol conversion module is obtained carries out Reed Solomon Coding and quadrature amplitude modulation.
8. high-speed bus terminal interface component that comprises each described data sending device of claim 1 to 7.
9. a data sink is characterized in that, described device comprises:
Be coupled transformation and line of line drive receiving circuit, the analog signal that is used for receiving by the GJB289A bus interface drives and handles back output;
AD conversion unit, the analog signal conversion that is used for described line drive receiving circuit output is a digital modulation signals; And
Protocol element, the digital modulation signals that is used for that described AD conversion unit is obtained carry out exporting after demodulation, the GJB289A protocol conversion.
10. device as claimed in claim 9 is characterized in that, described protocol element comprises:
Demodulation module, the digital modulation signals that is used for described AD conversion unit is obtained carries out demodulation, obtains digital baseband signal; And
Protocol conversion module, the digital baseband signal that is used for that described demodulation module is obtained carries out exporting after the GJB289A protocol conversion.
11. device as claimed in claim 10 is characterized in that, described demodulation module adopts the quadrature amplitude demodulation mode that digital modulation signals is carried out demodulation.
12. device as claimed in claim 11 is characterized in that, described demodulation module comprises that successively the quadrature amplitude demodulation submodule, the planisphere reflection that connect penetrate submodule and Read-Solomon decoding submodule.
13. device as claimed in claim 12 is characterized in that, described demodulation module also comprises the differential decoding submodule, and described differential decoding submodule is connected between described Read-Solomon decoding submodule and the planisphere mapping submodule.
14. high-speed bus terminal interface component that comprises each described data sink of claim 9 to 13.
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| CN2010101140006A CN101917317B (en) | 2010-02-11 | 2010-02-11 | Data transmitting and receiving devices and high-speed bus terminal interface component |
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| CN2010101140006A CN101917317B (en) | 2010-02-11 | 2010-02-11 | Data transmitting and receiving devices and high-speed bus terminal interface component |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102325069A (en) * | 2011-07-12 | 2012-01-18 | 北京航空航天大学 | A kind of device and method of bus interconnection |
| CN103546356A (en) * | 2013-10-10 | 2014-01-29 | 上海发电设备成套设计研究院 | Method for controlling communication compensation |
| CN104518934A (en) * | 2013-09-26 | 2015-04-15 | 西门子公司 | Bus interconnection method, apparatus and system |
| CN104683198A (en) * | 2013-11-29 | 2015-06-03 | 深圳市国微电子有限公司 | Signal optimization system and optimization method of avionic bus assembly |
| CN111385524A (en) * | 2018-12-27 | 2020-07-07 | 上海富瀚微电子股份有限公司 | Method and system for realizing high-speed long-distance data transmission of analog high-definition camera |
| CN114759942A (en) * | 2020-12-25 | 2022-07-15 | 杭州旗捷科技有限公司 | Chip and data conversion method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1708520A1 (en) * | 2005-03-28 | 2006-10-04 | NEC Corporation | Baseband signal processing module with interfaces to other baseband signal processing modules and to a radio frequency signal processing module |
| CN101382968A (en) * | 2008-10-17 | 2009-03-11 | 北京航空航天大学 | Advanced synthesis type aviation electronic simulation system and simulation method thereof |
-
2010
- 2010-02-11 CN CN2010101140006A patent/CN101917317B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1708520A1 (en) * | 2005-03-28 | 2006-10-04 | NEC Corporation | Baseband signal processing module with interfaces to other baseband signal processing modules and to a radio frequency signal processing module |
| CN101382968A (en) * | 2008-10-17 | 2009-03-11 | 北京航空航天大学 | Advanced synthesis type aviation electronic simulation system and simulation method thereof |
Non-Patent Citations (1)
| Title |
|---|
| 《航空电子技术》 20091231 郑凤等 基于GJB289A标准的通用总线数据分析 第27－30页 1－14 第40卷, 第4期 * |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102325069A (en) * | 2011-07-12 | 2012-01-18 | 北京航空航天大学 | A kind of device and method of bus interconnection |
| CN102325069B (en) * | 2011-07-12 | 2014-07-30 | 北京航空航天大学 | Bus interconnect device and method |
| CN104518934A (en) * | 2013-09-26 | 2015-04-15 | 西门子公司 | Bus interconnection method, apparatus and system |
| CN103546356A (en) * | 2013-10-10 | 2014-01-29 | 上海发电设备成套设计研究院 | Method for controlling communication compensation |
| CN104683198A (en) * | 2013-11-29 | 2015-06-03 | 深圳市国微电子有限公司 | Signal optimization system and optimization method of avionic bus assembly |
| CN104683198B (en) * | 2013-11-29 | 2018-11-27 | 深圳市国微电子有限公司 | A kind of the signal optimization system and its optimization method of Avionics data bus component |
| CN111385524A (en) * | 2018-12-27 | 2020-07-07 | 上海富瀚微电子股份有限公司 | Method and system for realizing high-speed long-distance data transmission of analog high-definition camera |
| CN114759942A (en) * | 2020-12-25 | 2022-07-15 | 杭州旗捷科技有限公司 | Chip and data conversion method |
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| CN101917317B (en) | 2012-09-19 |
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