CN101834207A - Double-diffusion metal oxide semiconductor field effect tube structure and manufacturing method thereof - Google Patents

Abstract

The invention discloses a double-diffusion metal oxide semiconductor (DMOS) structure and a manufacturing method thereof, which are used for improving a breakdown voltage. The DMOS structure comprises a drift region and a trap positioned in the drift region, wherein the polarity of the trap is opposite to that of the drift region; and all or part of the contour line of a particle injection surface of the trap is a curve. The method comprises a step of injecting particles into the drift region to form the trap, wherein the injected particles make the polarity of the trap opposite to that of the drift region; and all and part of the counter line of the particle injection surface adopted in the step is the curve.

Description

Double-diffusion metal oxide semiconductor field effect tube structure and manufacture method thereof

Technical field

The present invention relates to the power device field, relate in particular to double-diffusion metal oxide semiconductor field effect tube structure and manufacture method thereof.

Background technology

Double-diffusion metal-oxide-semiconductor field effect transistor (DMOS, Double-diffused MOSFET) device is the power device of using always, comprise vertical double-diffusion metal-oxide-semiconductor field effect transistor (VDMOS, Vertical Double-diffused MOSFET) and lateral double diffusion metal oxide semiconductor field effect transistor (LDMOS, Lateral Double-diffused MOSFET).Puncture voltage is to weigh the important parameter of VDMOS device performance, and the meaning of its ordinary representation is to guarantee under the not breakdown situation maximum voltage that can apply between the VDMOS drain and gate.

Along with technological progress, the puncture voltage of DMOS device needs to improve, and industry is added one or more traps usually in the DMOS device drift region, and wherein the polar form of trap is opposite with the drift region polar form, and for example if the drift region is the N type, then trap is the P type.

Be that example is set forth existing DMOS structure with N type LDMOS device architecture below.

Fig. 1 is the structural representation of N type LDMOS device in the prior art, and Fig. 2 is the schematic top plan view of N type LDMOS device architecture in the prior art.3 P traps 11 are arranged in N type drift region 12 among the figure, and the plan view shape of P trap 11 is a square, as shown in Figure 2.After adding above-mentioned 3 P traps 11, the surface field of LDMOS device can weaken, the Electric Field Distribution of this surface field is that sharp-pointed Electric Field Distribution is converted into the Electric Field Distribution that a plurality of peak values are relatively flat from single peak value, thereby can bear bigger voltage, has improved puncture voltage.But with respect to application request, the puncture voltage of this LDMOS device architecture still needs further raising.

Summary of the invention

The invention provides DMOS structure and manufacture method thereof, to improve the puncture voltage of DMOS structure.

The invention provides the DMOS structure, comprise the drift region and be arranged in the trap of drift region, this trap is opposite with the polar form of drift region, and the particle injection face outline line of this trap is all or part of to be curve.

Optionally, described outline line is circular or oval.

Optionally, described outline line is for to change into the shape that obtains behind the arc with polygonal all or part of wedge angle.

Optionally, described DMOS structure is the LDMOS structure.

Optionally, the junction depth of this trap is greater than spaced furthest distance between two points on the described outline line.

Optionally, described DMOS structure is the VDMOS structure.

The embodiment of the invention also provides the DMOS structure making process, this DMOS structure comprises the drift region, be included in and inject the step that particle forms trap in this drift region, wherein the particle of Zhu Ruing need make that the polar form of this trap is opposite with the drift region polar form, and the particle injection face outline line that adopts in this step is all or part of to be curve.

Optionally, described particle injection face is circular, oval or polygonal all or part of wedge angle is changed into the shape that obtains behind the arc.

Optionally, described VDMOS is LDMOS, and the dosage that injects this particle needs to make that the junction depth of this trap injects spaced surface 2 spacing farthest greater than particle.

It is the shape of curve that the embodiment of the invention is designed to all or part of by the particle injection face outline line with trap in the drift region in the DMOS device, thereby make under the situation of identical implantation dosage, increased the depletion region area of trap, thereby improved puncture voltage, the embodiment of the invention also is designed to darker by the junction depth with trap in the LDMOS device drift region in addition, usually greater than 2 distances farthest on the trap injection face outline line, thereby make in the LDMOS device drift region trap and drift region contact area bigger, help improving puncture voltage.

Description of drawings

Fig. 1 is the structural representation of N type LDMOS device in the prior art;

Fig. 2 is the schematic top plan view of N type LDMOS device architecture in the prior art;

Fig. 3 is N type LDMOS plan structure signal in the first embodiment of the invention;

Fig. 4 is the vertical view of LDMOS device P trap injection face and depletion region in the prior art;

Fig. 5 is the vertical view of LDMOS device P trap injection face and depletion region in the first embodiment of the invention;

Fig. 6 is the structural representation of N type LDMOS in the second embodiment of the invention.

Embodiment

Fig. 3 is a N type LDMOS plan structure schematic diagram in the first embodiment of the invention, a plurality of P traps 32 have been added in this structure N drift region 31, these P trap 32 particle injection face outline lines are circular, for identical injection area, circular injection face can increase the depletion region area, promptly for identical injection area, the depletion region of LDMOS correspondence is greater than the depletion region of LDMOS in the prior art in the present embodiment, thereby increases puncture voltage.

Fig. 4 is the vertical view of LDMOS device P trap injection face and depletion region in the prior art, in conjunction with this figure, suppose that injecting area is S, as area that square solid line encloses among the figure, supposing under the poised state, is the boundary with particle injection face outline line, and depletion region is Xp to the profile intraline distance, depletion region distance outside outline line is Xn, and then depletion region is two zones between the dashed square.Because injecting area is S, therefore the length of side of square injection face is

Square depletion region area is: S1=(L+Xn) ²-(L-Xp) ²=(2L+Xn-Xp) (Xn+Xp)=Xd (2L+Xn-Xp);

Fig. 5 is the vertical view of LDMOS device P trap injection face and depletion region in the first embodiment of the invention, in conjunction with this figure, suppose that injecting area is that implantation dosage is identical for S also, as solid line institute region area among the figure, under poised state, be the boundary with particle injection face outline line then, depletion region also is Xp to the profile intraline distance, depletion region distance open country outside outline line is Xn, and depletion region is two zones between the dashed circle.Because injecting area is S, therefore the injection radius of circular injection face is:

Circular depletion region area is: S2=π (R+Xn) ²-π (R-Xp) ²=π (2R+Xn-Xp) (Xn+Xp)=π Xd (2R+Xn-Xp);

In order to keep charge balance, the alms giver equates with acceptor doping concentration, so Xn=Xp;

So: $\mathrm{<figure-callout\; id="1"\; label="S"\; filenames="HSA00000102818000022.png,HSA00000102818000031.png"\; state="\{\{state\}\}">S</figure-callout>}1=\mathrm{Xd}\&CenterDot;2L=2\mathrm{Xd}\sqrt{S};$ $S2=\mathrm{\&pi;}\&CenterDot;\mathrm{Xd}\&CenterDot;2R=2\mathrm{Xd}\sqrt{\mathrm{\&pi;S}}$

So S2＞S1, and increase

About 1.77 times.

The foregoing description is that circle illustrates the present invention with P trap particle injection face outline line only, in fact, as long as P trap particle injection face outline line is all or part of to be curve, for example can but be not limited to be oval or polygonal all or part of wedge angle changed into the shape that obtains behind the arc, then the depletion region area of P trap than at this outline line be under for example foursquare situation of changeable shape greatly.

Be example in addition with Fig. 1, the junction depth of P trap 11 is more shallow in the prior art, usually be less than on the P trap 11 injection face outline lines 2 distances farthest, because P trap 11 junction depths are more shallow, contact area between P trap 11 and the N type drift region 12 is few, be unfavorable for improving puncture voltage, Fig. 6 is the structural representation of N type LDMOS in the second embodiment of the invention, the junction depth of the P trap 61 in this N type LDMOS structure is darker, greater than or much larger than P trap 61 outline line outline line distance of 2 farthest on N type drift region 62, thereby make that P trap 61 and N type drift region 62 contact-making surfaces are wider, improved puncture voltage.The injection face outline line of the P trap that this class junction depth is darker can all or part ofly be a curve also, to increase the depletion region area, further improves puncture voltage.

The foregoing description is an example explanation such scheme with N type LDMOS device, and in fact for P type LDMOS device, N type and P type VDMOS device all can be suitable for, and are easy device, and the application's book repeats no more.

The embodiment of the invention has also proposed the DMOS structure making process, this DMOS structure comprises the drift region, be included in and inject the step that particle forms trap in this drift region, wherein the particle of Zhu Ruing need make that the polar form of this trap is opposite with the drift region polar form, and it is curve that the particle that adopts in this step injects the surface profile line all or part of.Optionally, to inject surface be circular, ellipse or polygonal all or part of wedge angle changed into the shape that obtains behind the arc for described particle.Optionally, the dosage that injects this particle needs to make that the junction depth of this trap injects spaced surface 2 spacing farthest greater than particle.

Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.

Claims (10)

1. double-diffusion metal oxide semiconductor field effect tube structure comprises the drift region and is arranged in the trap of drift region that this trap is opposite with the polar form of drift region, it is characterized in that, the particle injection face outline line of this trap is all or part of to be curve.

2. double-diffusion metal oxide semiconductor field effect tube structure as claimed in claim 1 is characterized in that, described outline line is circular or oval.

3. double-diffusion metal oxide semiconductor field effect tube structure as claimed in claim 1 is characterized in that described outline line is for to change into the shape that obtains behind the arc with polygonal all or part of wedge angle.

4. double-diffusion metal oxide semiconductor field effect tube structure as claimed in claim 1 is characterized in that, described double-diffusion metal oxide semiconductor field effect tube structure is the L double-diffusion metal oxide semiconductor field effect tube structure.

5. double-diffusion metal oxide semiconductor field effect tube structure as claimed in claim 4 is characterized in that, the junction depth of this trap is greater than spaced furthest distance between two points on the described outline line.

6. double-diffusion metal oxide semiconductor field effect tube structure as claimed in claim 1 is characterized in that, described double-diffusion metal oxide semiconductor field effect tube structure is the V double-diffusion metal oxide semiconductor field effect tube structure.

7. double-diffusion metal oxide semiconductor field effect tube structure manufacture method, this double-diffusion metal oxide semiconductor field effect tube structure comprises the drift region, be included in and inject the step that particle forms trap in this drift region, wherein the particle of Zhu Ruing need make that the polar form of this trap is opposite with the drift region polar form, it is characterized in that it is curve that the particle that adopts injects the surface profile line all or part of in this step.

8. method as claimed in claim 7 is characterized in that, described particle injects surface to be circular, ellipse or polygonal all or part of wedge angle changed into the shape that obtains behind the arc.

9. method as claimed in claim 7 is characterized in that, described double-diffusion metal oxide semiconductor field effect tube structure is the L double-diffusion metal-oxide-semiconductor field effect transistor.

10. method as claimed in claim 9 is characterized in that, the dosage that injects this particle needs to make that the junction depth of this trap injects spaced surface 2 spacing farthest greater than particle.

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