CN101819427B - On-chip control system of digital articulation based on FPGA (Field Programmable Gate Array) - Google Patents
On-chip control system of digital articulation based on FPGA (Field Programmable Gate Array) Download PDFInfo
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- CN101819427B CN101819427B CN2010101343744A CN201010134374A CN101819427B CN 101819427 B CN101819427 B CN 101819427B CN 2010101343744 A CN2010101343744 A CN 2010101343744A CN 201010134374 A CN201010134374 A CN 201010134374A CN 101819427 B CN101819427 B CN 101819427B
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Abstract
The present invention relates to an on-chip control system of a digital articulation based on an FPGA (Field Programmable Gate Array), relating to the field of robots and solving the problem that the traditional robot articulation control system has low integrated level. The on-chip control system comprises an NIOSII soft-core processor, an Avalon bus module, a CAN bus soft-core controller, an articulation motor driving circuit, an articulation motor current vector control circuit and an articulation sensor information acquisition SPI (Single Program Initiation) interface circuit, wherein the communication end of the NIOSII soft-core processor is respectively connected to the communication ends of the CAN bus soft-core controller, the articulation motor driving circuit, the articulation motor current vector control circuit and the articulation sensor information acquisition SPI interface circuit through the Avalon bus module. The invention is suitable for the controllers of the mechanical arm articulations.
Description
Technical field
The present invention relates to the robot field, be specifically related to a kind of based on control system on the digital articulation sheet of FPGA.
Background technology
The development of robot extends to service robot and robot for space field from the industrial robot field in past, the design object of robot of a new generation be light weight, output torque big, have multiple perception and a self-learning capability, such characteristics have strengthened the complicacy of control task inevitably, and the design of joint servo control system has been proposed harsh more requirement.Motor is the execution unit of joint servo control system, along with the fast development of microelectric technique and Electric Machine Control, the control of motor experienced the simulation control stage, based on control stage of microprocessor, based on control stage of DSP+FPGA and based on the four-stage of FPGA control.
Although the simulation controlling schemes adopts the digital control strategy based on microprocessor, yet the generation of pulse-width modulation PWM signal, the adjusting of electric current loop, still realize by mimic channel, the advantage of this scheme is that response is fast, and antijamming capability is low, occupation space is big, shortcomings such as circuit is complicated, function singleness but exist; Based on the controlling schemes of DSP have that circuit is simple, software control, the high advantage of dirigibility, can adapt to various occasions, yet the realization of the generation of pulse-width modulation PWM signal, electric current loop needs higher sampling rate obtain bigger bandwidth; Based on the mixed-control mode of DSP and FPGA, have higher, the with better function advantage of dirigibility, however the total system complexity, exploitation is slowly; The FPGA controlling schemes of embedded microprocessor has realized real SOC (system on a chip), provides that reliability is higher, performance is stronger, develop controlling schemes efficiently.
The general employing based on the mixed-control mode of DSP and FPGA of joint of robot realized joint information acquisition and control at present, but its system complex, integrated level is low, and the construction cycle is long.
Summary of the invention
In order to solve the low problem of existing robots joint control system integrated level, the invention provides a kind of based on control system on the digital articulation sheet of FPGA.
Of the present invention based on control system on the digital articulation sheet of FPGA, it comprises NIOS II soft-core processor, the Avalon bus module, the soft nuclear control device of CAN bus, the joint motor driving circuit, joint motor Current Vector Control circuit and joint sensors information acquisition SPI interface circuit, the soft nuclear control device of CAN bus comprises the soft nuclear control device of a CAN bus, the joint motor driving circuit comprises sinusoidal wave SPWM generative circuit, and joint motor Current Vector Control circuit comprises the code-disc interface circuit, the motor position coordinate conversion circuit, electric machine phase current acquisition interface circuit and motor current ring regulating circuit; The communication terminal of NIOS II soft-core processor is connected respectively to the communication terminal of the soft nuclear control device of a CAN bus, the communication terminal of joint motor driving circuit, the communication terminal of joint motor Current Vector Control circuit and the communication terminal of joint sensors information acquisition SPI interface circuit by the Avalon bus module, and the signal output part of code-disc interface circuit connects the signal input part of motor position changes in coordinates circuit; NIOS II soft-core processor, be used for resolving of joint action order that host computer sends, realize CAN bus communication agreement with host computer, also be used to carry out the order of resolving, adjust controlled variable, realize trajectory planning, the management of joint space controlled variable and position, moment and the impedance Control of joint space of joint space; The soft nuclear control device of CAN bus is used for sending joint space information to host computer by the CAN bus interface circuit, also is used for the control command and the data message of host computer are sent to NIOS II soft-core processor by the Avalon bus module; The joint motor driving circuit is used to export sine wave signal or the square-wave signal that drives joint motor work; The code-disc interface circuit is used to transmit measured motor position information and rotary speed information; Motor position changes in coordinates circuit is used for carrying out coordinate transform to measuring the motor position information that obtains; Electric machine phase current acquisition interface circuit is used to transmit the electric machine phase current of being gathered; Joint sensors information acquisition SPI interface circuit is used to transmit the joint space information that comprises position and moment.
Beneficial effect of the present invention: it is high and the construction cycle lacks based on control system on the digital articulation sheet of FPGA to the invention provides a kind of integrated level; The present invention adopts a slice fpga chip to realize contents such as the collection of joint space information, joint motor driving, joint control and CAN bus communication; The present invention has embedded NIOS II soft-core processor in FPGA, described NIOS II soft-core processor has been realized visit to each interface circuit by the Avalon bus module, has realized the operation processing function such as trajectory planning, position control, Torque Control of joint space simultaneously in described NIOS II soft-core processor; Each interface circuit of the present invention has been realized functions such as the vector controlled, sensor acquisition of motor, has realized the digital articulation SOC (system on a chip) based on FPGA.
Description of drawings
Fig. 1 uses the joint servo control system architecture synoptic diagram based on control system on the digital articulation sheet of FPGA of the present invention, wherein, 8 is the joint, 8-1 is a motor, 8-2 is a speed reduction unit, 8-3 is a connecting rod, 9 is the H bridge, 10 is the code-disc signal circuit, 11 is the electric machine phase current Acquisition Circuit, 12 is the sensor acquisition circuit, 13 is watchdog circuit, 14 is that CAN bus interface circuit and 15 is the hall signal circuit, Fig. 2 is the principle schematic of the motor position coordinate conversion circuit 5-2 in the embodiment four, Fig. 3 is the principle schematic of the motor current ring regulating circuit 5-4 in the embodiment four, and Fig. 4 is the sinusoidal wave SPWM generative circuit principle schematic in the embodiment four.
Embodiment
Embodiment one: specify present embodiment according to Figure of description 1, present embodiment is described based on control system on the digital articulation sheet of FPGA, it comprises NIOS II soft-core processor 1, Avalon bus module 2, the soft nuclear control device 3 of CAN bus, joint motor driving circuit 4, joint motor Current Vector Control circuit 5 and joint sensors information acquisition SPI interface circuit 6, the soft nuclear control device 3 of CAN bus comprises the soft nuclear control device of CAN bus 3-1, joint motor driving circuit 4 comprises sinusoidal wave SPWM generative circuit 4-1, and joint motor Current Vector Control circuit 5 comprises code-disc interface circuit 5-1, motor position coordinate conversion circuit 5-2, electric machine phase current acquisition interface circuit 5-3 and motor current ring regulating circuit 5-4; The communication terminal of NIOS II soft-core processor 1 is connected respectively to the communication terminal of the soft nuclear control device of CAN bus 3-1, the communication terminal of joint motor driving circuit 4, the communication terminal of joint motor Current Vector Control circuit 5 and the communication terminal of joint sensors information acquisition SPI interface circuit 6 by Avalon bus module 2, and the signal output part of code-disc interface circuit 5-1 connects the signal input part of motor position changes in coordinates circuit 5-2; NIOS II soft-core processor 1, be used for resolving of joint action order that host computer U sends, realize CAN bus communication with host computer U, also be used to carry out the order of resolving, adjust controlled variable, realize trajectory planning, the management of joint space controlled variable and position, moment and the impedance Control of joint space of joint space; The soft nuclear control device 3 of CAN bus is used for sending joint space information to host computer U by CAN bus interface circuit 14, also is used for control command and the data message of host computer U are sent to NIOS II soft-core processor 1 by Avalon bus module 2; Joint motor driving circuit 4 is used to export sine wave signal or the square-wave signal that drives joint motor work; Code-disc interface circuit 5-1 is used to transmit measured motor position information and rotary speed information; Motor position changes in coordinates circuit 5-2 is used for carrying out coordinate transform to measuring the motor position information that obtains; Electric machine phase current acquisition interface circuit 5-3 is used to transmit the electric machine phase current of being gathered; Joint sensors information acquisition SPI interface circuit 6 is used to transmit the joint space information that comprises position and moment.
In this embodiment, joint internal sensor information acquisition, motor vector control algorithm, M/T test the speed trajectory planning, position control and the Torque Control of the sinusoidal wave SPWM drive controlling of algorithm, motor, joint space on a slice FPGA, have been realized, and embedded the soft nuclear control device 3 of CAN bus in FPGA inside, realized and the CAN bus communication interface of main control computer (host computer U), the joint control parameter can onlinely be adjusted.The control system integrated level height of present embodiment, 32 NIOS II soft-core processor 1 and the soft nuclear control device 3 of CAN bus have been embedded in FPGA inside, effectively reduced the area of circuit board, and the module that the control system that can customize this embodiment needs, reduce unnecessary module, improved the integrated level of system.
Embodiment two: this embodiment is with the difference of embodiment one, the soft nuclear control device 3 of CAN bus also comprises the soft nuclear control device of the 2nd CAN bus 3-2, and the communication terminal of the soft nuclear control device of described the 2nd CAN bus 3-2 is connected to the communication terminal of NIOS II soft-core processor 1 by Avalon bus module 2.
In this embodiment, in FPGA, increased the soft nuclear control device of the 2nd CAN bus 3-2,, realized redundant CAN bus communication, improved the reliability of communication system.
Embodiment three: this embodiment is that with embodiment one or two difference the described digital articulation SOC (system on a chip) based on FPGA of this concrete enforcement also comprises house dog interface circuit 7, the communication terminal of described house dog interface circuit 7 is by the communication terminal of Avalon bus module 2 connection NIOS II soft-core processors 1, and described house dog interface circuit 7 is used to transmit feeding-dog signal or dog stings signal.
This embodiment has increased house dog interface circuit 7 in FPGA, cooperate external watchdog circuit 13 can monitor the operation of NIOS II soft-core processor 1 in the FPGA, prevents program fleet, has improved the reliability of system.
Embodiment four: this embodiment and embodiment one, two or three difference is that joint motor driving circuit 4 also comprises Hall interface circuit 4-2, square wave RPWM generative circuit 4-3 and multidiameter option switch circuit 4-4, the signal output part of sinusoidal wave SPWM generative circuit 4-1 connects the signal input part of multidiameter option switch circuit 4-4, the signal output part of Hall interface circuit 4-2 connects the signal input part of square wave RPWM generative circuit 4-3, and the signal output part of described square wave RPWM generative circuit 4-3 connects another signal input part of multidiameter option switch circuit 4-4.
In this embodiment, sinusoidal wave SPWM generative circuit 4-1 utilizes the magnitude of voltage of electric current loop calculating among the motor current ring regulating circuit 5-4 and the triangular wave counter of 20KHz to compare the realization motor-driven, output high level when magnitude of voltage is bigger than count value, and than count value hour output low level;
The signal output part that square wave RPWM generative circuit 4-3 directly receives Hall interface circuit 4-2 carries out logic commutation realization motor-driven, wherein through calculating, the signal input part of Hall interface circuit 4-2 is connected with hall signal circuit 15 by NIOS II soft-core processor 1 in the input of pulse-width modulation PWM signal; The two kinds of direct output pulse width modulation (PWM) of type of drive signals are to multidiameter option switch circuit 4-4, and described multidiameter option switch circuit 4-4 is subjected to the control of NIOS II soft-core processor 1, and implied terms is the sine wave signal output with sinusoidal wave generation circuit 4-1 down; When sinusoidal drive broke down, NIOS II soft-core processor 1 is revised as multidiameter option switch circuit 4-4 exported the square-wave signal of square wave RPWM generative circuit 4-3.
This embodiment adopts the square wave drive circuit to back up in FPGA, has improved the reliability of system.
In this embodiment, the soft nuclear control device 3 of CAN bus is IP kernels independently, be embedded among the FPGA, realized the bus protocol of CAN bus 2.0B, the soft nuclear control device 3 of described CAN bus sends the information of joint sensors to host computer U by the CAN bus, and control command and the data message of described host computer U sent to NIOS II soft-core processor 1, for improving the reliability of system, the soft nuclear control device 3 of CAN bus adopts two, i.e. a CAN bus soft nuclear control device 3-1 and the soft nuclear control device of the 2nd CAN bus 3-2.
In the present embodiment, electric machine phase current acquisition interface circuit 5-3 is the IR2175 current acquisition chip of IR company, the expectation current information is provided by NIOS II soft-core processor 1, described NIOS II soft-core processor 1 is 32 a fixed-point processor, and motor current ring regulating circuit 5-4 adopts pi regulator to regulate electric current loop.
At present embodiment, carry out instance analysis:
Sinusoidal wave SPWM signal frequency is 20KHz in the control system of reality, IR2175 current acquisition chip frequency of carrier signal is 130KHz, producing sine wave signal or square-wave signal constantly at every turn, generate the collection of a synchronizing signal Control current, after synchronizing signal, when the rising edge of second and the 3rd pulse of IR2175 current acquisition chip output comes, carry out the current signal collection, with the result of twice collection on average as actual current value, sinusoidal wave SPWM control signal adopts rule sampling II method to generate, and sinusoidal wave SPWM generative circuit 4-1 as shown in Figure 4.
Motor position coordinate conversion circuit 5-2 in the present embodiment as shown in Figure 2, coordinate transform comprises by the three phase static coordinate system
To rotating coordinate system
Direct transform and
Arrive
Inverse transformation, wherein direct transform is as shown in the formula shown in (1):
Relation of plane in the presence of in formula (1):
Therefore the realization of coordinate conversion circuit, the computing radical sign under adopt multiplication, addition and shifting function to realize, and just, the cosine angle calculation, need utilization to be stored in the storer of FPGA
The information of sine table realizes.
Motor current ring regulating circuit 5-4 as shown in Figure 3, electric current loop adopts pi regulator, and is saturated for preventing integration, adopts to meet limit and weaken integration method.
In the present embodiment, code-disc interface circuit 5-1 mainly is made up of signal filter circuit, 4 frequency multiplier circuits and the M/T method unit that tests the speed.Code-disc adopts increment type traying, for overcoming the interference on the signal wire, need carry out digital filtering; Then filtered signal is sent into quadruplicated frequency circuit and carry out process of frequency multiplication, and obtain motor position information, be used for coordinate transform and motor position and measure; Utilize the signal and the M/T method of quadruple to record motor speed information simultaneously.
In the present embodiment, control system and host computer U adopt the CAN bus communication on the articular sclerite, and communication cycle is 250ms, and the control cycle in joint is 2ms.Therefore the joint desired locations information that control system need provide host computer U on the articular sclerite is segmented, and for guaranteeing the continuity of acceleration, adopts the Paul planning of quadravalence to realize; For realizing position control, Torque Control and the impedance Control of joint space, by joint sensors information acquisition SPI interface circuit 6, can obtain the sensor information such as position, moment of joint space, because motor adopts current loop control, make the motor equivalence be the moment source, therefore joint space has designed the quadravalence state feedback controller, shown in (2) formula:
In the formula (2)
,
Be respectively positioner and regulate parameter;
,
Be respectively moment and moment differential information.
By the adjusting of each controller parameter, can obtain different control performances, when realizing the position control of joint space, with the Torque Control parameter
,
Be adjusted to zero; When realizing Torque Control, then need the position control parameter
,
Be adjusted to zero; And when realizing impedance Control, then need comprehensive adjustment position and Torque Control parameter.
Claims (4)
1. based on control system on the digital articulation sheet of FPGA, it is characterized in that it comprises NIOS II soft-core processor (1), Avalon bus module (2), the soft nuclear control device of CAN bus (3), joint motor driving circuit (4), joint motor Current Vector Control circuit (5) and joint sensors information acquisition SPI interface circuit (6), the soft nuclear control device of CAN bus (3) comprises the soft nuclear control device of a CAN bus (3-1), joint motor driving circuit (4) comprises sinusoidal wave SPWM generative circuit (4-1), and joint motor Current Vector Control circuit (5) comprises code-disc interface circuit (5-1), motor position coordinate conversion circuit (5-2), electric machine phase current acquisition interface circuit (5-3) and motor current ring regulating circuit (5-4);
The communication terminal of NIOS II soft-core processor (1) is connected respectively to the communication terminal of the soft nuclear control device of a CAN bus (3-1), the communication terminal of joint motor driving circuit (4), the communication terminal of joint motor Current Vector Control circuit (5) and the communication terminal of joint sensors information acquisition SPI interface circuit (6) by Avalon bus module (2), and the signal output part of code-disc interface circuit (5-1) connects the signal input part of motor position coordinate conversion circuit (5-2);
NIOS II soft-core processor (1), be used for resolving of joint action order that host computer (U) sends, realize CAN bus communication agreement with host computer (U), also be used to carry out the order of resolving, adjust controlled variable, realize trajectory planning, the management of joint space controlled variable and position, moment and the impedance Control of joint space of joint space;
The soft nuclear control device of CAN bus (3), be used for sending joint space information to host computer (U) by CAN bus interface circuit (14), also be used for the control command and the data message of host computer (U) are sent to NIOS II soft-core processor (1) by Avalon bus module (2);
Joint motor driving circuit (4) is used to export sine wave signal or the square-wave signal that drives joint motor work;
Code-disc interface circuit (5-1) is used to transmit measured motor position information and rotary speed information;
Motor position coordinate conversion circuit (5-2) is used for carrying out coordinate transform to measuring the motor position information that obtains;
Electric machine phase current acquisition interface circuit (5-3) is used to transmit the electric machine phase current of being gathered;
Joint sensors information acquisition SPI interface circuit (6) is used to transmit the joint space information that comprises position and moment.
2. according to claim 1 based on control system on the digital articulation sheet of FPGA, it is characterized in that the soft nuclear control device of CAN bus (3) also comprises the soft nuclear control device of the 2nd CAN bus (3-2), the communication terminal of the described soft nuclear control device of the 2nd CAN bus (3-2) is connected to the communication terminal of NIOS II soft-core processor (1) by Avalon bus module (2).
3. according to claim 1 and 2 based on control system on the digital articulation sheet of FPGA, it is characterized in that it also comprises house dog interface circuit (7), the communication terminal of described house dog interface circuit (7) is by the communication terminal of Avalon bus module (2) connection NIOS II soft-core processor (1), and described house dog interface circuit (7) is used to transmit feeding-dog signal or dog stings signal.
4. according to claim 3 based on control system on the digital articulation sheet of FPGA, it is characterized in that joint motor driving circuit (4) also comprises Hall interface circuit (4-2), square wave RPWM generative circuit (4-3) and multidiameter option switch circuit (4-4), the signal output part of sinusoidal wave SPWM generative circuit (4-1) connects a signal input part of multidiameter option switch circuit (4-4), the signal output part of Hall interface circuit (4-2) connects the signal input part of square wave RPWM generative circuit (4-3), and the signal output part of described square wave RPWM generative circuit (4-3) connects another signal input part of multidiameter option switch circuit (4-4).
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| CN102291062A (en) * | 2011-08-23 | 2011-12-21 | 浙江大学 | High-accuracy multi-motor control method based on FPGA (Field Programmable Gate Array) |
| CN102354134A (en) * | 2011-09-02 | 2012-02-15 | 北京邮电大学 | FPGA-based modularization double-joint servo control system |
| CN102393656A (en) * | 2011-11-29 | 2012-03-28 | 北京邮电大学 | Embedded multinuclear main controller of modular robot based on FPGA (Field Programmable Gata Array) |
| CN102819256B (en) * | 2012-09-07 | 2015-02-11 | 中南大学 | Foot type robot state sensing system |
| CN104518720A (en) * | 2013-09-28 | 2015-04-15 | 沈阳新松机器人自动化股份有限公司 | FPGA based servo drive controller |
| CN104579031A (en) * | 2013-10-29 | 2015-04-29 | 北京精密机电控制设备研究所 | Multi-path permanent magnet synchronous motor control circuit based on FPGA chip |
| CN103901804A (en) * | 2014-04-23 | 2014-07-02 | 哈尔滨工业大学 | Servo system real-time motion controller based on DSP and FPGA and control method |
| CN104032422B (en) * | 2014-05-30 | 2016-08-17 | 杭州电子科技大学 | Frame list ingot control system based on FPGA and method |
| CN110861096B (en) * | 2019-12-21 | 2021-02-05 | 江苏开璇智能科技有限公司 | Robot joint interaction force sensing and controlling method and device |
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| US7194321B2 (en) * | 2004-10-29 | 2007-03-20 | Dynacity Technology (Hk) Limited | Modular multi-axis motion control and driving system and method thereof |
| CN101131586B (en) * | 2007-09-30 | 2010-06-02 | 哈尔滨工业大学 | M-LVDS high-speed serial communication control method in mechanica arm system |
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