CN103901804A - Servo system real-time motion controller based on DSP and FPGA and control method - Google Patents

Servo system real-time motion controller based on DSP and FPGA and control method Download PDF

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CN103901804A
CN103901804A CN201410166049.4A CN201410166049A CN103901804A CN 103901804 A CN103901804 A CN 103901804A CN 201410166049 A CN201410166049 A CN 201410166049A CN 103901804 A CN103901804 A CN 103901804A
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model
pins
chip
power supply
fpga
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薛红琳
吴钊君
王强
张之万
罗晶
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Harbin Institute of Technology
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Harbin Institute of Technology
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Abstract

The invention relates to a servo system real-time motion controller based on a DSP and an FPGA and a control method, relates to the field of servo system motion control and aims at solving the problem that an existing motion controller cannot achieve high real-time communication. According to the method, an RS422 is communicated with the FPGA, the output end of a clock circuit is connected with the input end of the FPGA and the input end of the DSP at the same time, the DSP is communicated with a memory space configuration module, the memory space configuration module is communicated with the FPGA, data interaction is conducted between a DA conversion module, the DSP and the FPGA through EMIF data buses, the output end of the FPGA is connected with the input end of the DA conversion module, the output end of the DA conversion module is connected with the input end of a motor, the output end of a coded disk signal access circuit is connected with the input end of the FPGA, and the input or output end of the FPGA is connected with the output or input end of a drive interface of a motor control terminal. The real-time controller and the control method can be used in a motor control system.

Description

Servo-drive system real time kinematics controller and control method based on DSP and FPGA
Technical field
The present invention relates to a kind of servo-drive system real time kinematics controller and control method based on DSP and FPGA.Belong to servo-drive system motion control field.
Background technology
Along with the continuous progress of movement control technology and perfect, motion controller, as an industrial automatic control series products independently, has been widely used in increasing industrial field, especially occupies especially leading position in automation control area.As a kind of control device, motion controller is take central logic control module as core, take sensor as signal sensitive element, take motor or propulsion system and performance element as control object.Its main task is to carry out necessary logic, mathematical operation according to the signal of the requirement of motion control and senser element, for motor or other power and actuating unit provide correct control signal.
Servo-drive system claims again servomechanism, is the feedback control system for accurately following or reappear certain process.Along with the constant growth of productivity, require servo-drive system to high precision, high-speed, high-power future development, this has just proposed requirement to its controller.In some servo-drive system, motion controller needs the real-time servocontrol of carrying out, and this need to be using DSP and FPGA as core processor, make full use of DSP at a high speed accurately and FPGA flexibly advantage controller is optimized.
Summary of the invention
The present invention is the problem that can not reach higher real-time Communication for Power in order to solve existing motion controller.Servo-drive system real time kinematics controller and control method based on DSP and FPGA are now provided.
Servo-drive system real time kinematics controller based on DSP and FPGA, it comprises that FPGA, DSP, motor, clock circuit, DA modular converter, code-disc signal place in circuit, memory headroom configuration module, RS422 communication interface and Electric Machine Control terminal drive interface,
The data-signal of described RS422 communication interface inputs or outputs data-signal output or the input end that end connects FPGA, the clock signal output terminal of clock circuit connects the clock signal input terminal of FPGA and the clock signal input terminal of DSP simultaneously, DSP carries out data interaction by EMIF data bus and memory headroom configuration module, the memory headroom configuration signal of memory headroom configuration module inputs or outputs the output of memory headroom configuration signal or the input end that end connects FPGA, DA modular converter, DSP and FPGA carry out data interaction by EMIF data bus, the digital signal output end of FPGA connects the digital signal input end of DA modular converter, the analog signal output of DA modular converter connects the input end of analog signal of motor, the motor code-disc signal output part of code-disc signal place in circuit connects the motor code-disc signal input part of FPGA, the driving signal of FPGA inputs or outputs the output of driving signal or the input end that end connects Electric Machine Control terminal driving interface.
The control method that servo-drive system real time kinematics controller based on DSP and FPGA is realized, the method comprises the following steps:
Step 1, host computer send instruction to FPGA7 by RS422 communication interface, and meanwhile, FPGA7 receives the collection signal of Electric Machine Control terminal driving interface; And select execution step two or a step 3;
Step 2, FPGA are transferred to DSP by the instruction receiving by the external memory interface EMIF data bus of DSP, carry out processing instruction and result is delivered to memory headroom configuration module by EMIF data bus by DSP, meanwhile, FFPGA7 and memory headroom configuration module 4 communicate; DA modular converter carries out digital-to-analog conversion by the digital signal of EMIF data bus reception DSP and obtains voltage analog signal, controls motor, execution step four with this;
Step 3, DA modular converter receive Electric Machine Control terminal by FPGA and drive the driving signal of interface to carry out after digital-to-analog conversion, motor being controlled, execution step four;
After the signal of step 4, employing code-disc signal place in circuit reception motor code-disc, being converted to Transistor-Transistor Logic level signal is linked in FPGA, DSP is read the code-disc information of buffer memory in FPGA and data is processed by EMIF bus according to the clock signal timing in clock circuit, DSP data after treatment are passed to FPGA, and the signal that FPGA receives returns to host computer by RS422 communication interface.
The present invention utilizes DSP and serial ports to enrich FPGA and outside communicates, between the two, communicate by the EMIF bus of DSP and the core processor of common component movement controller, RS422 communication interface by host computer command routing to core processor, the command signal of core processor obtains analog voltage after DA modular converter, with it control motor; The code-disc information of motor is passed to processor by motor code-disc signal place in circuit, processes and send control signal by DSP, and FPGA and Electric Machine Control terminal drive interface communication, composition control loop simultaneously.Motion controller receives host computer position command information as slave computer at a high speed by RS422 communication interface, has realized the function of motion controller real-time Communication for Power, and it is more than one times that the efficiency of existing motion controller real-time Communication for Power is fast on year-on-year basis.It can be used in electric machine control system.
Accompanying drawing explanation
Fig. 1 is the principle schematic of the servo-drive system real time kinematics controller based on DSP and FPGA described in embodiment one,
Fig. 2 is the principle schematic of the DA modular converter described in embodiment two,
Fig. 3 is the principle schematic of the clock circuit described in embodiment three,
Fig. 4 is the principle schematic of 4 path analoging switch described in embodiment four,
Fig. 5 is the principle schematic of the code-disc signal place in circuit described in embodiment five,
Fig. 6 is the principle schematic of the memory headroom configuration module described in embodiment six,
Fig. 7 is the principle schematic of the RS422 communication interface described in embodiment seven,
Fig. 8 is the principle schematic that the Electric Machine Control terminal described in embodiment eight drives interface.
Embodiment
Embodiment one: illustrate present embodiment with reference to Fig. 1, the servo-drive system real time kinematics controller based on DSP and FPGA described in present embodiment, it comprises that FPGA7, DSP8, motor 9, clock circuit 1, DA modular converter 2, code-disc signal place in circuit 3, memory headroom configuration module 4, RS422 communication interface 5 and Electric Machine Control terminal drive interface 6
The data-signal of described RS422 communication interface 5 inputs or outputs data-signal output or the input end that end connects FPGA7, the clock signal output terminal of clock circuit 1 connects the clock signal input terminal of FPGA7 and the clock signal input terminal of DSP8 simultaneously, DSP8 carries out data interaction by EMIF data bus and memory headroom configuration module 4, the memory headroom configuration signal of memory headroom configuration module 4 inputs or outputs the output of memory headroom configuration signal or the input end that end connects FPGA7, DA modular converter 2, DSP8 and FPGA7 carry out data interaction by EMIF data bus, the digital signal output end of FPGA7 connects the digital signal input end of DA modular converter 2, the analog signal output of DA modular converter 2 connects the input end of analog signal of motor 9, the motor code-disc signal output part of code-disc signal place in circuit 3 connects the motor code-disc signal input part of FPGA7, the driving signal of FPGA7 inputs or outputs the output of driving signal or the input end that end connects Electric Machine Control terminal driving interface 6.
Embodiment two: illustrate present embodiment with reference to Fig. 2, the difference of the servo-drive system real time kinematics controller based on DSP and FPGA described in present embodiment and embodiment one is, DA modular converter 2 comprises 4 road DA conversion chip 2-1,4 road DA bis-output buffer area 2-2,4 path analoging switch 2-3 and 4 tunnel Electric Machine Control voltage 2-4
Described 4 road DA conversion chip 2-1, DSP8 and FPGA7 carry out data interaction by EMIF data bus, the digital signal output end of FPGA7 connects the digital signal input end of 4 road DA conversion chip 2-1 and the digital signal input end of 4 path analoging switch 2-3 simultaneously, the buffered signal output terminal of 4 road DA conversion chip 2-1 connects the buffered signal input end of bis-output buffer area 2-2 of 4 road DA, the analog signal output of 4 road DA bis-times output buffer area 2-2 connects the input end of analog signal of 4 path analoging switch 2-3, the control signal output terminal of 4 path analoging switch 2-3 connects the control signal input end of 4 tunnel Electric Machine Control voltage 2-4, the control signal output terminal of 4 tunnel Electric Machine Control voltage 2-4 connects the control signal input end of motor.
In present embodiment, bis-output buffer area 2-2 of 4 road DA conversion chip 2-1 and 4 road DA are on same chip, on the chip U10 that the model that coexists is ADG5236BRUZ.
In present embodiment, 4 road DA conversion chips adopt the DA chip of the 4 road 16bit that model is AD669BR to realize, its output signal is as the control output signal of motor, chip carries bis-output buffers of 4 road DA, the scope of output is that negative 10V is to positive 10V, for motor is controlled, its data bus carry is on EMIF data bus, and control bus is controlled by FPGA; Simultaneously in order preventing from starting when, there is drift in DA, motor is impacted, and adopts 4 path analoging switch ADG5236BRUZ to select to export to final output voltage.
Embodiment three, illustrate present embodiment with reference to Fig. 3, the difference of the servo-drive system real time kinematics controller based on DSP and FPGA described in present embodiment and embodiment one is, described clock circuit 1 adopt model be SN74HC125D bus buffer lock chip U1 realize, this circuit comprises: capacitor C 1, capacitor C 2, capacitor C 3, resistance R 1, resistance R 2 and active crystal oscillator OS1
Described model is one end of No. 2 pin contact resistance R1 of the bus buffer lock chip U1 of SN74HC125D, the other end of resistance R 1 connects No. 3 pins of active crystal oscillator OS1 and one end of resistance R 2 simultaneously, the other end of resistance R 2 connects 5 pins of the bus buffer lock chip U1 that model is SN74HC125D, No. 4 pins of active crystal oscillator OS1 connect one end of capacitor C 2 simultaneously, positive pole+the 3.3V of one end of capacitor C 1 and 3.3V power supply, No. 2 pins of active crystal oscillator OS1 connect capacitor C 2 simultaneously, the power supply ground of capacitor C 1 and 3.3V power supply, model is that No. 14 pins of the bus buffer lock chip U1 of SN74HC125D connect one end of capacitor C 3 and the positive pole+3.3V of 3.3V power supply simultaneously, the other end of capacitor C 3 connects the power supply ground of 3.3V power supply simultaneously, model is No. 1 pin of the bus buffer lock chip of SN74HC125D, model is No. 4 pins of the bus buffer lock chip U1 of SN74HC125D, model is No. 10 pins of bus buffer lock chip U1 and No. 13 pins of the bus buffer lock chip that model is SN74HC125D of SN74HC125D, model is the power supply ground that No. 7 pins of the bus buffer lock chip U1 of SN74HC125D connect 3.3V power supply, model is that No. 3 pins of bus buffer lock chip U1 of SN74HC125D are as the clock signal output terminal of clock circuit 1.
In present embodiment, clock circuit produces the clock signal of 25MHz by active crystal oscillator OS1, be connected on DSP and FPGA through bus buffer lock, DSP and FPGA determine by PLL module separately the clock frequency using, DSP carries out frequency multiplication by PLL module to clock, after frequency multiplication, in DSP, nuclear clock is 200MHz, the peripheral clock of DSP is 50MHz, the external memory interface bus EMIF clock of DSP is 12.5MHz, in FPGA, clock is not carried out to frequency multiplication, directly use the clock 25MHz of active crystal oscillator.
Embodiment four, illustrate present embodiment with reference to Fig. 4, the difference of the servo-drive system real time kinematics controller based on DSP and FPGA described in present embodiment and embodiment two is, the chip U10 that 4 path analoging switch 2-3 employing models are ADG5236BRUZ realizes, described model is the power supply ground of No. 2 pin connection+15V power supplies of the chip U10 of ADG5236BRUZ, model is the power supply ground of No. 10 pin connection+15V power supplies of the chip U10 of ADG5236BRUZ, model is positive pole+15V that No. 13 pins of the chip U10 of ADG5236BRUZ connect 15V power supply, model is negative pole-15V that No. 5 pins of the chip U10 of ADG5236BRUZ connect 15V power supply, model is the power supply ground of No. 6 pin connection-15V power supplies of the chip U10 of ADG5236BRUZ, model is that No. 1 pin of chip U10 of ADG5236BRUZ and No. 9 pins are all as the digital signal input end of 4 path analoging switch 2-3, model is that No. 4 pins of chip U10 of ADG5236BRUZ and No. 12 pins are all as the input end of analog signal of 4 path analoging switch 2-3, model is that No. 3 pins of chip U10 of ADG5236BRUZ and No. 11 pins are all as the control signal output terminal of 4 path analoging switch 2-3.
In present embodiment, 4 path analoging switch 2-3ADG5236BRUZ control respectively the current output of choosing by control signal IN1 and IN2, B=ON when IN1=0, and A=ON when IN1=1, IN signal is controlled with FPGA, and when powering on, acquiescence is high-impedance state 1.
Embodiment five, illustrate present embodiment with reference to Fig. 5, the difference of the servo-drive system real time kinematics controller based on DSP and FPGA described in present embodiment and embodiment one is, code-disc signal place in circuit 3 adopt model be AM26LS32AC differential conversion chip U8 realize, this circuit comprises: capacitor C 22, capacitor C 23 and capacitor C 24
Described model is one end that No. 3 pins of the differential conversion chip U8 of AM26LS32AC connect capacitor C 22, the power supply ground of the other end connection+5V power supply of capacitor C 22, model is one end that No. 5 pins of the differential conversion chip U8 of AM26LS32AC connect capacitor C 23, the power supply ground of the other end connection+5V power supply of capacitor C 23, model is one end that No. 11 pins of the differential conversion chip U8 of AM26LS32AC connect capacitor C 24, the power supply ground of the other end connection+5V power supply of capacitor C 24, model is positive pole+5V that No. 4 pins of the differential conversion chip U8 of AM26LS32AC connect 5V power supply, model is the power supply ground of No. 12 pin connection+5V power supplies of the differential conversion chip U8 of AM26LS32AC, model is positive pole+5V that No. 16 pins of the differential conversion chip U8 of AM26LS32AC connect 5V power supply, model is the power supply ground of No. 8 pin connection+5V power supplies of the differential conversion chip U8 of AM26LS32AC, model is that No. 13 pins of differential conversion chip U8 of AM26LS32AC are as the code-disc signal output part of code-disc signal place in circuit 3.
In present embodiment, code-disc signal place in circuit 3 adopts 4 differential conversion chip AM26LS32AC that the differential signal of 12 code-discs of No. 4 motors is converted to Transistor-Transistor Logic level signal, the two paths of differential signals of each code-disc accesses respectively A, the B end that model is the differential conversion chip U8 of AM26LS32AC, output terminal Y is connected with FPGA, the 10bit signal of motor code-disc output is carried out to 4 frequency-doubled conversion in FPGA and is the code-disc signal of 12bit and export.
Embodiment six, illustrate present embodiment with reference to Fig. 6, the difference of the servo-drive system real time kinematics controller based on DSP and FPGA described in present embodiment and embodiment one is, memory headroom configuration module 4 comprises SDRAM4-1, NANDFLASH4-3 and NORFLASH4-2, described SDRAM4-1, NANDFLASH4-2 and NORFLASH4-3 all carry out data interaction with DSP8 by EMIF data bus, and the memory headroom configuration signal of NANDFLASH4-3 inputs or outputs end and is connected with the output of memory headroom configuration signal or the input end of FPGA7.
In present embodiment, memory headroom configuration module 4 comprises SDRAM, NANDFLASH and NORFLASH, in addition FPGA is also used as the EMIF external memory of DSP, SDRAM, NANDFLASH, NORFLASH and FPGA pass through EMIF bus and are connected with DSP, the EMIF memory headroom address of all DSP is take DSP as reference design, using capacitance delays DSP to start makes FPGA configure prior to DSP, signal is distributed to SDRAM, NANDFLASH and NORFLASH by FPGA, and all EMIF space outerpace chip selection signals all pass through FPGA and carry out decoding.Installed System Memory allocation of space is as shown in table 1.
Table 1 Installed System Memory space allocation table
Internal memory classification Allocation of space Address assignment Memory size
SDRAM0 CE0 0x80000000 8Mbytes (16 bit wide)
NORFLASH CE1 0x90000000 1Mbytes (8 bit wide)
SDRAM1 CE2 0xA0000000 8Mbytes (16 bit wide)
FPGA CE3 0xB0000000 32 bit wide asynchronous interfaces
Embodiment seven, illustrate present embodiment with reference to Fig. 7, the difference of the servo-drive system real time kinematics controller based on DSP and FPGA described in present embodiment and embodiment one is, it is that the interface chip U422_1 of MAX488ESA and U422_2 realize that RS422 communication interface 5 adopts model, this circuit comprises capacitor C 422_1, capacitor C 422_2, resistance R 422_1, resistance R 422_2, resistance R 422_3, resistance R 422_4 and interface J422
Described model is the power supply ground of No. 4 pin connection+5V power supplies of the interface chip U422_1 of MAX488ESA, model is that No. 1 pin of the interface chip U422_1 of MAX488ESA connects one end of capacitor C 422_1 and the positive pole+5V of 5V power supply simultaneously, the power supply ground of the other end connection+5V power supply of capacitor C 422_1, model is one end of No. 8 pin contact resistance R422_1 of the interface chip U422_1 of MAX488ESA, the other end of resistance R 422_1 connects No. 7 pins of the interface chip U422_1 that model is MAX488ESA, model is one end of No. 6 pin contact resistance R422_2 of the interface chip U422_1 of MAX488ESA, the other end of resistance R 422_2 connects No. 5 pins of the interface chip U422_1 that model is MAX488ESA, model is No. 1 pin of No. 8 pin connecting interface J422 of the interface chip U422_1 of MAX488ESA, model is No. 6 pins of No. 7 pin connecting interface J422 of the interface chip U422_1 of MAX488ESA, model is No. 2 pins of No. 6 pin connecting interface J422 of the interface chip U422_1 of MAX488ESA, model is No. 7 pins of No. 5 pin connecting interface J422 of the interface chip U422_1 of MAX488ESA
Described model is the power supply ground of No. 4 pin connection+5V power supplies of the interface chip U422_2 of MAX488ESA, model is that No. 1 pin of the interface chip U422_2 of MAX488ESA connects one end of capacitor C 422_2 and the positive pole+5V of 5V power supply simultaneously, the power supply ground of the other end connection+5V power supply of capacitor C 422_2, model is one end of No. 8 pin contact resistance R422_3 of the interface chip U422_2 of MAX488ESA, the other end of resistance R 422_3 connects No. 7 pins of the interface chip U422_2 that model is MAX488ESA, model is one end of No. 6 pin contact resistance R422_4 of the interface chip U422_2 of MAX488ESA, the other end of resistance R 422_4 connects No. 5 pins of the interface chip U422_2 that model is MAX488ESA, model is No. 8 pins of No. 8 pin connecting interface J422 of the interface chip U422_2 of MAX488ESA, model is No. 4 pins of No. 7 pin connecting interface J422 of the interface chip U422_2 of MAX488ESA, model is No. 9 pins of No. 6 pin connecting interface J422 of the interface chip U422_2 of MAX488ESA, model is No. 5 pins of No. 5 pin connecting interface J422 of the interface chip U422_2 of MAX488ESA, the power supply ground of No. 3 pin connection+5V power supplies of interface J422
Model is that No. 2 pins and No. 3 pins of No. 2 pins of interface chip U422_1 of MAX488ESA and No. 3 pins and the model interface chip U422_2 that is MAX488ESA all input or output end as the data-signal of RS422 communication interface 5.
In present embodiment, RS422 communication interface 5 realizes serial communication by interface chip MAX488ESA, has designed two-way RS422 interface in actual design, only has a road to be applied in system, and another road is for subsequent use, need to use time, in FPGA and DSP, programmes.In Fig. 7, show equally the annexation of two-way interface chip and hardware interface, can realize like this real-time Communication for Power of host computer and processor.
Embodiment eight, illustrate present embodiment with reference to Fig. 8, the difference of the servo-drive system real time kinematics controller based on DSP and FPGA described in present embodiment and embodiment one is, Electric Machine Control terminal drives interface 6 to comprise resistance R _ DA11, resistance R _ DA12, a relay K DA1 and No. two relay K DA2
One end of positive pole+24V contact resistance R_DA11 of described 24V power supply, one end of the other end contact resistance R_DA12 of resistance R _ DA11, the power supply ground of the other end connection+24V power supply of resistance R _ DA12,
The power supply ground of No. 1 pin connection+24V power supply of a relay K DA1, the power supply ground of No. 4 pin connection+24V power supplies of a relay K DA1, the power supply ground of No. 1 pin connection+24V power supply of No. two relay K DA2, the power supply ground of No. 4 pin connection+24V power supplies of No. two relay K DA2, No. 2 pins of one end of resistance R _ DA12, a relay K DA1 and No. 2 pins of No. two relay K DA1 drive three of interface 6 to drive signal output or input end as Electric Machine Control terminal respectively.
In present embodiment, Electric Machine Control terminal drives interface to realize the driving to Electric Machine Control terminal by relay, each road motor has 3 control terminals, wherein two for outputing signal to motor, be connected respectively on the CONT1 and CONT2 control terminal of motor, the configuration software that the concrete function of these two terminals can carry by Fuji is configured, another one terminal is for receiving the output signal of motor, the OUT1 that is connected to motor is upper, also can be configured appointment by the configuration software of motor; The CONT1 of No. four motors and CONT2 signal drive by relay ALQ305 respectively, and in the time that relay is connected, CONT1 and CONT2 are just connected on the ground, and this operation circuit forms loop, thereby control signal is effective; The OUT1 of motor is a 24V output signal, for FPGA can be read this signal, adopts the form of electric resistance partial pressure to realize.
The control method that the servo-drive system real time kinematics controller based on DSP and FPGA described in embodiment nine, employing embodiment one is realized, the method comprises the following steps:
Step 1, host computer send the collection signal of instruction to FPGA7 or FPGA7 reception Electric Machine Control terminal driving interface by RS422 communication interface; And select execution step two or a step 3;
Step 2, FPGA7 are transferred to DSP8 by the instruction receiving by the external memory interface EMIF data bus of DSP8, carry out processing instruction and result is delivered to memory headroom configuration module 4 by EMIF data bus by DSP8, meanwhile, FPGA7 and memory headroom configuration module 4 carry out data communication; DA modular converter 2 carries out digital-to-analog conversion by the digital signal of EMIF data bus reception DSP8 and obtains voltage analog signal, controls motor, execution step four with this;
Step 3, DA modular converter 2 receive Electric Machine Control terminal by FPGA7 and drive the driving signal of interface 6 to carry out after digital-to-analog conversion, motor being controlled, execution step four;
Step 4, adopt code-disc signal place in circuit 3 to receive to be converted to Transistor-Transistor Logic level signal after the signal of motor code-disc and be linked in FPGA7, DSP8 is read the code-disc information of buffer memory in FPGA and data is processed by EMIF bus according to the clock signal timing in clock circuit 1, DSP8 data after treatment are passed to FPGA7, and the signal that FPGA7 receives returns to host computer by RS422 communication interface 5.

Claims (9)

1. the servo-drive system real time kinematics controller based on DSP and FPGA, it is characterized in that, it comprises that FPGA (7), DSP (8), motor (9), clock circuit (1), DA modular converter (2), code-disc signal place in circuit (3), memory headroom configuration module (4), RS422 communication interface (5) and Electric Machine Control terminal drive interface (6)
The data-signal of described RS422 communication interface (5) inputs or outputs data-signal output or the input end that end connects FPGA (7), the clock signal output terminal of clock circuit (1) connects the clock signal input terminal of FPGA (7) and the clock signal input terminal of DSP (8) simultaneously, DSP (8) carries out data interaction by EMIF data bus and memory headroom configuration module (4), the memory headroom configuration signal of memory headroom configuration module (4) inputs or outputs the output of memory headroom configuration signal or the input end that end connects FPGA (7), DA modular converter (2), DSP (8) and FPGA (7) carry out data interaction by EMIF data bus, the digital signal output end of FPGA (7) connects the digital signal input end of DA modular converter (2), the analog signal output of DA modular converter (2) connects the input end of analog signal of motor (9), the motor code-disc signal output part of code-disc signal place in circuit (3) connects the motor code-disc signal input part of FPGA (7), the driving signal of FPGA (7) inputs or outputs the output of driving signal or the input end that end connects Electric Machine Control terminal driving interface (6).
2. the servo-drive system real time kinematics controller based on DSP and FPGA according to claim 1, it is characterized in that, DA modular converter (2) comprises 4 road DA conversion chips (2-1), bis-output buffer areas of 4 road DA (2-2), 4 path analoging switch (2-3) and 4 tunnel Electric Machine Control voltages (2-4)
Described 4 road DA conversion chips (2-1), DSP (8) and FPGA (7) carry out data interaction by EMIF data bus, the digital signal output end of FPGA (7) connects the digital signal input end of 4 road DA conversion chips (2-1) and the digital signal input end of 4 path analoging switch (2-3) simultaneously, the buffered signal output terminal of 4 road DA conversion chips (2-1) connects the buffered signal input end of bis-output buffer areas of 4 road DA (2-2), the analog signal output of 4 road DA bis-times output buffer areas (2-2) connects the input end of analog signal of 4 path analoging switch (2-3), the control signal output terminal of 4 path analoging switch (2-3) connects the control signal input end of 4 tunnel Electric Machine Control voltages (2-4), the control signal output terminal of 4 tunnel Electric Machine Control voltages (2-4) connects the control signal input end of motor.
3. the servo-drive system real time kinematics controller based on DSP and FPGA according to claim 1, it is characterized in that, the bus buffer lock chip (U1) that described clock circuit (1) employing model is SN74HC125D is realized, this circuit comprises: capacitor C 1, capacitor C 2, capacitor C 3, resistance R 1, resistance R 2 and active crystal oscillator OS1
Described model is one end of No. 2 pin contact resistance R1 of the bus buffer lock chip (U1) of SN74HC125D, the other end of resistance R 1 connects No. 3 pins of active crystal oscillator OS1 and one end of resistance R 2 simultaneously, the other end of resistance R 2 connects 5 pins of the bus buffer lock chip (U1) that model is SN74HC125D, No. 4 pins of active crystal oscillator OS1 connect one end of capacitor C 2 simultaneously, positive pole+the 3.3V of one end of capacitor C 1 and 3.3V power supply, No. 2 pins of active crystal oscillator OS1 connect capacitor C 2 simultaneously, the power supply ground of capacitor C 1 and 3.3V power supply, model is that No. 14 pins of the bus buffer lock chip (U1) of SN74HC125D connect one end of capacitor C 3 and the positive pole+3.3V of 3.3V power supply simultaneously, the other end of capacitor C 3 connects the power supply ground of 3.3V power supply simultaneously, model is No. 1 pin of the bus buffer lock chip of SN74HC125D, model is No. 4 pins of the bus buffer lock chip (U1) of SN74HC125D, model is No. 10 pins of bus buffer lock chip (U1) and No. 13 pins of the bus buffer lock chip that model is SN74HC125D of SN74HC125D, model is the power supply ground that No. 7 pins of the bus buffer lock chip (U1) of SN74HC125D connect 3.3V power supply, model is that No. 3 pins of bus buffer lock chip (U1) of SN74HC125D are as the clock signal output terminal of clock circuit (1).
4. the servo-drive system real time kinematics controller based on DSP and FPGA according to claim 2, it is characterized in that, the chip (U10) that 4 path analoging switch 2-3 employing models are ADG5236BRUZ is realized, described model is the power supply ground of No. 2 pin connection+15V power supplies of the chip (U10) of ADG5236BRUZ, model is the power supply ground of No. 10 pin connection+15V power supplies of the chip (U10) of ADG5236BRUZ, model is positive pole+15V that No. 13 pins of the chip (U10) of ADG5236BRUZ connect 15V power supply, model is negative pole-15V that No. 5 pins of the chip (U10) of ADG5236BRUZ connect 15V power supply, model is the power supply ground of No. 6 pin connection-15V power supplies of the chip (U10) of ADG5236BRUZ, model is that No. 1 pin of chip (U10) of ADG5236BRUZ and No. 9 pins are all as the digital signal input end of 4 path analoging switch (2-3), model is that No. 4 pins of chip (U10) of ADG5236BRUZ and No. 12 pins are all as the input end of analog signal of 4 path analoging switch (2-3), model is that No. 3 pins of chip (U10) of ADG5236BRUZ and No. 11 pins are all as the control signal output terminal of 4 path analoging switch (2-3).
5. the servo-drive system real time kinematics controller based on DSP and FPGA according to claim 1, it is characterized in that, the differential conversion chip (U8) that code-disc signal place in circuit (3) employing model is AM26LS32AC is realized, this circuit comprises: capacitor C 22, capacitor C 23 and capacitor C 24
Described model is one end that No. 3 pins of the differential conversion chip (U8) of AM26LS32AC connect capacitor C 22, the power supply ground of the other end connection+5V power supply of capacitor C 22, model is one end that No. 5 pins of the differential conversion chip (U8) of AM26LS32AC connect capacitor C 23, the power supply ground of the other end connection+5V power supply of capacitor C 23, model is one end that No. 11 pins of the differential conversion chip (U8) of AM26LS32AC connect capacitor C 24, the power supply ground of the other end connection+5V power supply of capacitor C 24, model is positive pole+5V that No. 4 pins of the differential conversion chip (U8) of AM26LS32AC connect 5V power supply, model is the power supply ground of No. 12 pin connection+5V power supplies of the differential conversion chip (U8) of AM26LS32AC, model is positive pole+5V that No. 16 pins of the differential conversion chip (U8) of AM26LS32AC connect 5V power supply, model is the power supply ground of No. 8 pin connection+5V power supplies of the differential conversion chip (U8) of AM26LS32AC, model is that No. 13 pins of differential conversion chip (U8) of AM26LS32AC are as the code-disc signal output part of code-disc signal place in circuit (3).
6. the servo-drive system real time kinematics controller based on DSP and FPGA according to claim 1, it is characterized in that, memory headroom configuration module (4) comprises SDRAM (4-1), NANDFLASH (4-3) and NORFLASH (4-2), described SDRAM (4-1), NANDFLASH (4-2) and NORFLASH (4-3) all carry out data interaction with DSP (8) by EMIF data bus, the memory headroom configuration signal of NANDFLASH (4-3) inputs or outputs end and is connected with the output of memory headroom configuration signal or the input end of FPGA (7).
7. the servo-drive system real time kinematics controller based on DSP and FPGA according to claim 1, it is characterized in that, the interface chip U422_1 that RS422 communication interface (5) employing model is MAX488ESA and U422_2 realize, this circuit comprises capacitor C 422_1, capacitor C 422_2, resistance R 422_1, resistance R 422_2, resistance R 422_3, resistance R 422_4 and interface J422
Described model is the power supply ground of No. 4 pin connection+5V power supplies of the interface chip U422_1 of MAX488ESA, model is that No. 1 pin of the interface chip U422_1 of MAX488ESA connects one end of capacitor C 422_1 and the positive pole+5V of 5V power supply simultaneously, the power supply ground of the other end connection+5V power supply of capacitor C 422_1, model is one end of No. 8 pin contact resistance R422_1 of the interface chip U422_1 of MAX488ESA, the other end of resistance R 422_1 connects No. 7 pins of the interface chip U422_1 that model is MAX488ESA, model is one end of No. 6 pin contact resistance R422_2 of the interface chip U422_1 of MAX488ESA, the other end of resistance R 422_2 connects No. 5 pins of the interface chip U422_1 that model is MAX488ESA, model is No. 1 pin of No. 8 pin connecting interface J422 of the interface chip U422_1 of MAX488ESA, model is No. 6 pins of No. 7 pin connecting interface J422 of the interface chip U422_1 of MAX488ESA, model is No. 2 pins of No. 6 pin connecting interface J422 of the interface chip U422_1 of MAX488ESA, model is No. 7 pins of No. 5 pin connecting interface J422 of the interface chip U422_1 of MAX488ESA
Described model is the power supply ground of No. 4 pin connection+5V power supplies of the interface chip U422_2 of MAX488ESA, model is that No. 1 pin of the interface chip U422_2 of MAX488ESA connects one end of capacitor C 422_2 and the positive pole+5V of 5V power supply simultaneously, the power supply ground of the other end connection+5V power supply of capacitor C 422_2, model is one end of No. 8 pin contact resistance R422_3 of the interface chip U422_2 of MAX488ESA, the other end of resistance R 422_3 connects No. 7 pins of the interface chip U422_2 that model is MAX488ESA, model is one end of No. 6 pin contact resistance R422_4 of the interface chip U422_2 of MAX488ESA, the other end of resistance R 422_4 connects No. 5 pins of the interface chip U422_2 that model is MAX488ESA, model is No. 8 pins of No. 8 pin connecting interface J422 of the interface chip U422_2 of MAX488ESA, model is No. 4 pins of No. 7 pin connecting interface J422 of the interface chip U422_2 of MAX488ESA, model is No. 9 pins of No. 6 pin connecting interface J422 of the interface chip U422_2 of MAX488ESA, model is No. 5 pins of No. 5 pin connecting interface J422 of the interface chip U422_2 of MAX488ESA, the power supply ground of No. 3 pin connection+5V power supplies of interface J422
Model is that No. 2 pins and No. 3 pins of No. 2 pins of interface chip U422_1 of MAX488ESA and No. 3 pins and the model interface chip U422_2 that is MAX488ESA all input or output end as the data-signal of RS422 communication interface (5).
8. the servo-drive system real time kinematics controller based on DSP and FPGA according to claim 1, it is characterized in that, Electric Machine Control terminal drives interface (6) to comprise resistance R _ DA11, resistance R _ DA12, a relay (KDA1) and No. two relays (KDA2)
One end of positive pole+24V contact resistance R_DA11 of described 24V power supply, one end of the other end contact resistance R_DA12 of resistance R _ DA11, the power supply ground of the other end connection+24V power supply of resistance R _ DA12,
The power supply ground of No. 1 pin connection+24V power supply of a relay (KDA1), the power supply ground of No. 4 pin connection+24V power supplies of a relay (KDA1), the power supply ground of No. 1 pin connection+24V power supply of No. two relays (KDA2), the power supply ground of No. 4 pin connection+24V power supplies of No. two relays (KDA2), No. 2 pins of one end of resistance R _ DA12, No. 2 pins of a relay (KDA1) and No. two relay K DA1 all drive the output of driving signal or the input end of interface (6) as Electric Machine Control terminal.
9. the control method that adopts the servo-drive system real time kinematics controller based on DSP and FPGA claimed in claim 1 to realize, is characterized in that, the method comprises the following steps:
Step 1, host computer send the collection signal of instruction to FPGA (7) or FPGA (7) reception Electric Machine Control terminal driving interface by RS422 communication interface; And select execution step two or a step 3;
Step 2, FPGA (7) are transferred to DSP (8) by the instruction receiving by the external memory interface EMIF data bus of DSP (8), carry out processing instruction and result is delivered to memory headroom configuration module (4) by EMIF data bus by DSP (8), meanwhile, FPGA (7) carries out data communication with memory headroom configuration module (4); DA modular converter (2) carries out digital-to-analog conversion by the digital signal of EMIF data bus reception DSP (8) and obtains voltage analog signal, controls motor with this, execution step four;
Step 3, DA modular converter (2) receive Electric Machine Control terminal by FPGA (7) and drive the driving signal of interface (6) to carry out after digital-to-analog conversion, motor being controlled, execution step four;
After the signal of step 4, employing code-disc signal place in circuit (3) reception motor code-disc, being converted to Transistor-Transistor Logic level signal is linked in FPGA (7), DSP (8) is read the code-disc information of buffer memory in FPGA (7) and data is processed by EMIF bus according to the clock signal timing in clock circuit (1), DSP (8) data after treatment are passed to FPGA (7), and the signal that FPGA (7) receives returns to host computer by RS422 communication interface (5).
CN201410166049.4A 2014-04-23 2014-04-23 Servo system real-time motion controller based on DSP and FPGA and control method Pending CN103901804A (en)

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