CN101776752B - Precise tracking and measuring method of high dynamic signal of air fleet link - Google Patents
Precise tracking and measuring method of high dynamic signal of air fleet link Download PDFInfo
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Abstract
The invention relates to a precise tracking and measuring method of a high dynamic signal of an air fleet link, belonging to the technical field of aeronautical data links and radio navigation, and aiming at providing a precise tracking and measuring method of the high dynamic signal the an air fleet link and an implementation structure to solve the problems in the prior art. The invention provides a system framework of the precise tracking and measuring method of the high dynamic signal of the air fleet link, which can be implemented on a digital signal processor (DSP) and a FPGA (field programmable gate array) of a circuit board, and overcomes the defects of the unfavorable precision of a traditional high dynamic receiver by utilizing a double-loop structure of a frequency tracking loop of carrier tracking and a phase locking loop as well as a code phase locking loop to realize the high precise tracking under a high dynamic condition. The method can be widely applied to satellite navigation receivers, range measurement systems and communication systems based on a quiescent carrier modulation direct sequence spread spectrum system.
Description
The technical field is as follows:
the invention relates to a precise tracking and measuring method for a high dynamic signal of a cluster link, belonging to the technical field of aviation data link and radio navigation.
Background art:
because the links between the member airplanes of the fleet adopt a BPSK/QPSK modulation system for inhibiting carriers and a direct sequence spread spectrum mode, the problems of signal capture and tracking can be encountered:
firstly, the method inhibits the capturing and tracking difficulty and frequent lock losing and capture losing caused by the high dynamic relative motion of a sender and a receiver under a carrier communication system;
secondly, high dynamic causes increased carrier tracking error, difficult accurate alignment of regenerated pseudo code phase, and increased ranging and speed measurement errors;
and thirdly, the lock losing and capture losing probability is greatly increased, so that the continuous carrier phase measurement is difficult and the integral Doppler measurement is difficult to realize. Thus, a major and difficult point in receiving BPSK/QPSK modulated spread spectrum signals in a highly dynamic environment is the high quality tracking of the carrier and pseudo code phases.
Disclosure of Invention
The invention aims to provide a precise tracking and measuring method for a high dynamic signal of a cluster link, which aims to solve the problems in the prior art.
The invention relates to a precise tracking and measuring method of a high dynamic signal of a cluster link, which can be realized on a Digital Signal Processor (DSP) and a Field Programmable Gate Array (FPGA) of a circuit board. The method comprises the following specific steps:
high dynamic carrier tracking loop
The high dynamic carrier tracking unit of the invention adopts a carrier tracking strategy suitable for carrier dynamics, namely after the pseudo code phase is captured by an FFT frequency domain algorithm, a four-phase frequency discriminator is adopted to further pull and capture the Doppler frequency and initially track, and the Doppler frequency is reduced from hundreds of hertz to several hertz, so that the Doppler frequency enters the working range of a cross product automatic frequency tracking loop; an FLL loop with strong dynamic capability is adopted to eliminate dynamic and steady tracking; a costas PLL with small thermal noise error is used to increase the carrier phase. The method comprises the following specific steps:
[1] integrator-eliminator and frequency and phase decision algorithm
Let the sampling frequency be TsFor a sampling interval, the received signal is down-converted and then subjected to intermediate frequency sampling to obtain:
s(i)=Ai·PNI(i·Ts-τ)·cos[(ωI,+ωd)i+φ]+Ai·PNQ(i·Ts-τ)·sin[(ωI+ωd)i+φ](1)
in equation (1): omegaI=2πfITsIntermediate frequency for the received signal; omegad=2πfdTsIs the Doppler frequency; phi is the phase of the received signal; PN (pseudo-noise)I(i·Ts);PNQ(j·Ts) In-phase pseudo codes and orthogonal pseudo codes respectively; tau is the received signal delay;
the in-phase signal and the orthogonal signal output by the carrier NCO of the receiving channel are respectively set as follows:
in equation (2): a. theROutputting the amplitude of sine and cosine signals for NCO; <math><mrow><msub><mover><mi>ω</mi><mo>^</mo></mover><mi>d</mi></msub><mo>=</mo><mn>2</mn><mi>π</mi><msub><mover><mi>f</mi><mo>^</mo></mover><mi>d</mi></msub><msub><mi>T</mi><mi>s</mi></msub></mrow></math> (for the Doppler frequency f in the received signaldEstimate of (d);is an estimate of the phase phi of the received signal;
I. the Q branch integrator-clearer outputs the result at the end of the correlation interval as follows:
in equation (3): a is the signal amplitude; Δ ωd(k) A residual is estimated for the doppler shift and, <math><mrow><mi>Δ</mi><msub><mi>ω</mi><mi>d</mi></msub><mrow><mo>(</mo><mi>k</mi><mo>)</mo></mrow><mo>=</mo><msub><mi>ω</mi><mi>d</mi></msub><mrow><mo>(</mo><mi>k</mi><mo>)</mo></mrow><mo>-</mo><msub><mover><mi>ω</mi><mo>^</mo></mover><mi>d</mi></msub><mrow><mo>(</mo><mi>k</mi><mo>)</mo></mrow><mo>;</mo></mrow></math> ε (k) is the code phase (delay) estimated bias (true delay and estimated delay)E (k) ═ Δ τ; r (-) is an ideal two-level autocorrelation function of the pseudo-random code, and is a function of time; n is the number of integration points of the integration remover; thetakIs carrier phase error, θk=k·N·Δwd(k)-Δwd(k)·N/2+△φ;nI(k),nQ(k) Is random noise. The formula (3) is important and is the basis for frequency tracking error estimation, cross product frequency discrimination and arc tangent phase discrimination algorithm.
The frequency decision adopts the expression as follows:
in the formula (4), TIDIs the integration clearing time.
In the frequency pulling process with four-phase frequency discriminator, delta f is adoptedkAnd judging whether the current frequency is less than 10 Hz. If the current frequency Δ fkIf the frequency is less than 10Hz, switching to an FLL tracking loop for frequency tracking; otherwise, the frequency pulling process is continued.
At the beginning of the tracking, the frequency needs to be pulled from a few hundred Hz to below 10Hz by a frequency pulling module and then according to the carrier phase thetakAnd (6) making a decision. If theta is greater than thetakMore than 10 degrees, the receiver tracks the frequency by using a cross product frequency discriminator; if theta is greater than thetakLess than 10 deg., a pure PLL loop is used for phase tracking.
The phase decision expression is:
in the above formula when thetakVery small, tg θkAnd thetakIs in direct proportion. Let θkWhen the angle is less than 10 degrees, switching to phase-locked loop tracking to convert theta intokSubstituting 10 ° into the above equation to obtain the phase decision threshold ηk=0.176。
[2] Frequency pulling of four-phase frequency discriminator
After the pseudo code is captured, the carrier Doppler frequency shift range is guided to a Doppler frequency search unit range, namely 500Hz, and at the moment, the frequency estimation error is still large, so that the frequency is pulled to the tracking range of the cross product frequency discriminator by using a frequency pulling module; the invention adopts the four-phase frequency discriminator to carry out the frequency pulling algorithm, and pulls the frequency below 10Hz after the pulling is carried out for a plurality of times. During frequency pulling, Δ f is usedkJudging whether the current frequency is less than 10Hz, if so, determining whether the current frequency is delta fkIf the frequency is less than 10Hz, switching to an FLL tracking loop for high-frequency tracking; otherwise, the frequency pulling process is continued.
[3] Cross product frequency discrimination automatic frequency tracking (CP-AFC) locked loop (FLL)
When the frequency error is less than 10Hz, the cross product frequency discriminator is adopted to realize accurate frequency tracking. Where T is the integration interval time of the integrate-dump.
Cross product frequency discriminator output efkComprises the following steps:
efk=I(k-1)Q(k)-I(k)Q(k-1)
=0.25A2D(k)D(k-1)R[ε(k)][ε(k-1)] (6)
·sinc[Δfd(k)·πT]·sinc[Δfd(k-1)·πT]·sin(φk-φk-1)
in equation (6): t is the integration clearing time. When the capture is finished, the received pseudo code and the local pseudo code are basically aligned, the time interval is set as unit time, and the modulation data bit is unchanged in the continuous measurement process, so that D (k) D (k-1) is 1, and R [ epsilon (k)]≈1,R[ε(k-1)]≈1,φk=Δfd(k)·t+φ0,φk-φk-1=[Δfd(k)-Δfd(k-1)]·T=ΔfdT; when the frequency pulling is completed, the Doppler shift estimation error Δ fd< 10 DEG/Hz, phase error | Delta fd(k) When π T | < π/2, sinc2[Δfd(k)·πT]→1,sin(φk-φk-1)→φk-φk-1. The control quantity is proportional to the phase change (frequency) in unit time, and the carrier NCO is controlled by the control quantity through a filter to achieve the purpose of frequency tracking.
The output of the cross product frequency discriminator is
efk=θk-θk-1=2πΔfd(k)·T (7)
[4] Phase tracking lock loop (PLL)
An in-phase quadrature phase-locked loop (Costas loop ) is a type of PLL that has found widespread use in PSK despreading receivers because it is insensitive to carrier modulated data. A commonly used costas loop phase detector algorithm is a two-quadrant arc tangent phase detector algorithm:
two-quadrant arc tangent phase discriminator tan-1(Qps/Ips) The performance is linear in the whole range of-90 degrees to 90 degrees, and the performance is optimal.
[5] Loop filter of frequency-locked loop FLL and phase-locked loop PLL
The carrier tracking frequency-locked loop (second-order loop) adopts a first-order Jaffe-Rechtin filter, and the carrier tracking phase-locked loop (third-order loop) adopts a second-order Jaffe-Rechtin filter.
In conclusion, a carrier tracking loop structure formed by combining frequency traction of four-phase discrimination, a second-order FLL frequency automatic tracking loop of cross product frequency discrimination and a third-order PLL phase-locked loop of two-quadrant arc tangent phase discrimination can meet the requirements of general high-dynamic tasks; the parameters of the first-order and second-order Jaffe-Rechtin loop filters are carefully designed, so that higher carrier frequency/carrier phase tracking precision can be obtained.
(II) high dynamic spread spectrum code tracking loop
After parallel search in FFT frequency domain to capture coarse carrier frequency and pseudo code phase, the local regenerated spread spectrum code and the spread spectrum code of the received signal complete coarse alignment, and the error is within 1/2 chips. Then, a code tracking process (corresponding to carrier tracking) is carried out to realize the precise alignment of the phase (delay) of the spread spectrum code. The closed loop tracking of the pseudo code usually adopts a delay phase-locked loop, namely, a local code generator is used for generating phase lead and lag signals, the phase lead and lag signals are related after being orthogonally mixed with an input BPSK/QPSK modulated spread spectrum signal, the results of the in-phase I/orthogonal Q two branches are compared to obtain a code phase error signal so as to control a code NCO and generate a local code signal consistent with the phase of the input code.
The pseudo code phase tracking of the invention adopts a non-coherent digital delay phase-locked loop (DDLL) algorithm structure and consists of an integral-clearer, a code phase discriminator, a loop filter, a code NCO, a regenerative code generator and a shift register. Wherein the parameters of the integrate-and-dump, the code phase detector and the loop filter determine the characteristics of the code tracking loop. In order to realize narrow correlation and achieve the purpose of accurately tracking the code phase, regenerated pseudo codes of an instantaneous code, a lead-lag 1/2 chip and a lead-lag 1/4 chip are generated through a shift register in a loop design, and respectively form incoherent delay locked loops with correlation intervals of 1 chip and 1/4. In the code tracking loop, a code phase discriminator compares the pre-detection integral results of an in-phase branch and an orthogonal branch to generate an error signal, and outputs a code NCO frequency control word through a loop filter to control the accurate alignment of a regenerated pseudo code and a received pseudo code. The code tracking loop phase discrimination algorithm, the code tracking loop filter, and the carrier assisted code loop tracking are described in detail below.
[1] Code loop discriminator phase discrimination algorithm of code tracking loop
The input of the code loop discriminator is a digital correlation accumulation result of code phase lead, prompt and lag of a carrier in-phase I/orthogonal Q branch.
There are three common code-loop discriminator algorithms: dot product power discriminator (I)es-Ils)Ips+(Qes-Qls)QpsA lead minus lag power discriminator (I)es 2+Qes 2)-(Ils 2+Qls 2) Early minus late envelope discriminatorTypically no lead minus lag envelope discriminator is used.
When code correlation occurs, the loop tracks, and if the correlation distance d is 2 delta, the error signal output by the lead-minus lag type coherent code phase discriminator is
E(k)=Ie(k)-Il(k) (9)
=0.5Asinc[Δfd(k)·πT]·cos[Δfd(k)·tk+φ0]·{R[ε(k)-δ]-R[ε(k)+δ]}
As can be seen from equation (9), the error signal has a dependency on carrier tracking, and when the carrier is not synchronized or cycle skip occurs after tracking, the phase detector generates an indeterminate amount, so that a coherent phase detector is not generally used. The incoherent code phase detector mainly comprises a lead-lag power phase detector and a dot product phase detector. The present invention provides two different delay locked loop discriminator algorithms: a normalized lead minus lag power discriminator, a normalized dot product discriminator.
Power discriminator with leading and lagging functions
In equation (10):Ies(k)、Ips(k) and Ils(k) Respectively inputting in-phase signals and leading, instant and lagging codes to be output in correlation; qes(k)、Qps(k) And Qls(k) Respectively defining phase discrimination characteristic function S of leading-lag power phase discriminator for correlated output of input quadrature phase signal and leading, instantaneous and lagging codesel(ε, δ) is:
Sel(ε,δ)=R2[ε(k)-δ]-R2[ε(k)+δ] (11)
correlation value and chip width T when defining a perfect alignment of the spreading codecThe autocorrelation function when all are 1 can be expressed as:
the formula (11) is respectively substituted into the formula (12), so that the phase discrimination characteristic function of the lead minus lag power phase discriminator can be obtained:
(i) when delta is 1/2
(ii) When delta is 1/8 or 1/16
② dot product discriminator
Edp(k)=[Ie(k)-Il(k)]Ips(k)+[Qe(k)-Ql(k)]Qps(k)
=0.25A2{R[ε(k)-δ]-R[ε(k)+δ]}·R[ε(k)]·sinc2[Δfd(k)·πT] (15)
=0.25A2sinc2[Δfd(k)·πT]·Sdp(ε,δ)
In equation (15): i ises(k)、Ips(k) And Ils(k) Respectively inputting in-phase signals and leading, instant and lagging codes to be output in correlation; qes(k)、Qps(k) And Qls(k) The output of the input orthogonal digital signal and the lead code, the time code and the lag code after the phase rotation result of the digital correlation accumulation result. Phase discrimination characteristic function S of defined dot product phase discriminatordp(ε, δ) is:
Sdp(ε,δ)={R[ε(k)-δ]-R[ε(k)+δ]}·R[ε(k)] (16)
(i) when delta is 1/2
(ii) When delta is 1/8 or 1/16
[2] Loop filter for code tracking loop
Because the auxiliary of a carrier loop is adopted in code tracking, a second-order loop filter is adopted in the code tracking loop. The filtering algorithm selects a second-order Jaffe-Rechtin filter.
The code tracking loop dynamics and thermal noise performance are analyzed below.
Loop dynamic performance
The dynamic measurement error of the code tracking loop is determined by the order and bandwidth of the loop filter, and for the second-order code tracking loop filter, the dynamic measurement error is
In equation (19): r is the unit of the number of basic chips, the loop natural frequency omegan=1.89Bn,(BnLoop bandwidth).
In general, dynamic tracking errors are caused in the code ring by the dynamic acceleration of the carrier, but because a fixed proportional relation exists between code doppler and carrier doppler, most of the dynamic errors in the code ring can be eliminated by carrier assistance while the carrier ring accurately tracks the carrier dynamics, so that the actual dynamic errors in the code ring are very small and can be disregarded.
② thermal noise flutter error (1 sigma)
The thermal noise error of the lead-minus-lag power phase discriminator is as follows:
the thermal noise error of the dot product phase discriminator is as follows:
in formula (20) and formula (21): b isnFor loop equivalent noise bandwidth (Hz), d is the correlation interval (chips) of the early and late codes, T is the pre-detection integration time(s), C/N0Is the carrier-to-noise power ratio (as C/N)0Expressed in dB, it equals
[3] Carrier-assisted code loop tracking compensation for Doppler dynamic errors
The carrier tracking loop provides a carrier assist to control the code NCO output frequency while accurately tracking carrier phase changes to truly track spreading code rate changes due to doppler effects. Since the doppler effect on a signal is inversely proportional to the wavelength of the signal, a carrier-assisted scaling factor is defined: <math><mrow><mi>μ</mi><mo>=</mo><mfrac><msub><mi>f</mi><mi>code</mi></msub><msub><mi>f</mi><mi>RF</mi></msub></mfrac><mo>,</mo></mrow></math> fcodefor the nominal value of the spreading code rate, fRFFor radio frequency carrier frequency point nominalThe value is obtained.
The amount of change in spreading code rate due to dynamic motion (spreading code doppler shift) is calculated by:
A carrier Doppler frequency estimation value output by the loop filter;is an estimate of the doppler shift of the spreading code.Frequency offset control word P converted into frequency control word and code tracking loopbiasAnd adding the signals, and feeding the signals back to a numerically-controlled oscillator NCO of the pseudo code delay locked loop for adjustment, so that the influence of dynamic stress on the pseudo code delay locked loop is effectively reduced, and the dynamic tracking performance and the tracking precision of the code tracking loop are improved.
The invention relates to a precise tracking and measuring method of a cluster link high dynamic signal, which has the advantages that: the method of the invention solves the defect of poor precision of the traditional high dynamic receiver; the method disclosed by the invention can be widely applied to satellite navigation receivers, distance measuring systems and communication systems based on a carrier modulation suppression direct sequence spread spectrum system.
Drawings
Fig. 1 is a structural diagram of a carrier tracking loop and a code tracking loop algorithm of the method of the present invention.
Fig. 2 is a diagram showing an algorithm structure of a carrier tracking loop in the present invention.
Fig. 3 shows a FLL and PLL combined carrier tracking principle block.
Fig. 4 is a schematic diagram of a cross product automatic frequency tracking loop.
Fig. 5 shows the frequency discrimination characteristic of the cross-product discriminator.
Fig. 6 is a block diagram showing the overall structure of the code tracking loop.
Fig. 7 is a block diagram of the architecture of the non-coherent digital delay-locked loop (DDLL) algorithm.
Fig. 8(a) shows the phase detection characteristic of the lead minus lag power phase detector.
Fig. 8(b) shows a phase detection characteristic curve of the dot product phase detector.
FIG. 9 is a graph showing code loop thermal noise error versus loop bandwidth; wherein (a) is a lead minus lag power discriminator; (b) is a dot product discriminator.
Detailed Description
The technical solution of the present invention is further described below with reference to the accompanying drawings and examples.
Fig. 1 shows a carrier tracking and code tracking loop algorithm structure diagram of the cluster link asynchronous communication and measurement terminal of the method of the present invention.
Since the influence of the doppler shift variation dynamically introduced by the carrier on the pseudo code tracking loop can be eliminated by carrier assistance, the dynamic performance of the receiver mainly depends on the carrier tracking technology. There are generally two tracking loops available: one is a coherent phase-locked loop (PLL) (a costas loop is one of them, but it is not sensitive to modulation data on the carrier wave), the receiver needs to generate a coherent carrier wave with the same frequency and phase as the input carrier wave; another type of noncoherent frequency phase locked loop (FLL) is where the receiver needs to generate a carrier that is co-frequency with the incoming carrier but does not require coherence. Carrier acquisition and tracking are usually achieved by coherent demodulation of BPSK data using costas loop reconstructed carrier phase. The coherent system has better performance on Gaussian noise, but has poor tolerance capability on communication link interference, and is particularly greatly influenced by Doppler frequency shift introduced by carrier dynamics. For a large range of doppler shifts for high dynamic carriers, the costas loop must have a relatively wide bandwidth, which means that the signal-to-noise threshold performance, i.e. the tracking capability, is reduced. Coherent demodulation is no longer suitable at this point and a preferable solution is to use non-coherent demodulation, i.e. the loop automatically tracks the frequency instead of the phase. For the same dynamic state, the second-order frequency locking tracking loop FLL has the dynamic performance advantage of a signal-to-noise ratio threshold value of several dB-Hz compared with the third-order phase locking loop PLL, but the tracking precision is low, and the two have certain contradiction, so that the advantages of making up for the deficiencies in the design can be obtained. The following describes the design and analysis discussion of the carrier tracking loop and the code tracking loop algorithm, respectively.
High dynamic carrier tracking loop
1. Working principle of FLL (flash loop) and PLL (phase locked loop) combined carrier tracking loop
The carrier ring design of the invention adopts a carrier tracking strategy suitable for carrier dynamics, namely after the pseudo code phase is captured by an FFT frequency domain algorithm, a four-phase frequency discriminator is adopted to further pull and capture the Doppler frequency and initially track, and the Doppler frequency is reduced from hundreds of hertz to several hertz, so that the Doppler frequency enters the working range of the cross product automatic frequency tracking ring; an FLL loop with strong dynamic capability is adopted to eliminate dynamic and steady tracking; the basic invention of improving the carrier phase by adopting costas PLL with small thermal noise error. The tracking loop can simultaneously meet the requirements of dynamic performance and tracking precision, the loop parameters can be set in a programmable manner, and two tracking strategies are dynamic along with the carrierThe change is switched in a software mode, and the flexibility and the robustness of tracking are ensured. The carrier tracking loop algorithm structure is shown in fig. 2. Because the system works in a high dynamic environment, the carrier tracking adopts a frequency-locked loop and a phase-locked loop to work simultaneously to track the carrier. And the frequency locking loop carries out frequency estimation on the basis of capturing the predicted frequency, synchronously adjusts the output of the NCO of the frequency locking loop and carries out carrier stripping. Frequency estimation is usually implemented by using integrate and clear plus frequency discrimination, the linear range of frequency estimation is determined by the time of integrate and clear, and no jump of data bit can occur in the integrate and clear time period. In the embodiment of the invention: the carrier NCO offset is a frequency word corresponding to the intermediate frequency of the digital intermediate frequency signal:
and after the pseudo code and the carrier wave are preliminarily captured, entering a tracking stage. At this time, because the resolution of Doppler frequency prediction is only 500Hz and the residual Doppler frequency component is still large, the carrier frequency estimation residual error delta f is estimated by adopting the frequency pulling module firstlykDown to below 10Hz and then according to the carrier phase thetakMake a decision if thetakIf the frequency is more than 10 degrees, the carrier tracking adopts a cross product frequency detector to track the frequency; if theta is greater than thetakLess than 10 deg., phase tracking is performed using a pure PLL. The output selector in FIG. 3 is based on Δ fkAnd thetakOr whether the output of the frequency pulling algorithm is fed back to the carrier NCO, or the FLL loop output or the PLL loop output is fed back to the carrier NCO (as shown in fig. 3)
2. Integrator-eliminator and frequency and phase decision algorithm
The integrator-clearer functions as follows:
a low-pass filter: the integrator-eliminator is equivalent to a low-pass filter and filters the mixed sum frequency component;
secondly, low-pass filtering is carried out on the input signal, and the influence of dynamic and radio frequency noise is eliminated;
and thirdly, accumulating the input signals, improving the signal-to-noise ratio of the signals and increasing the sensitivity of the receiver. The sampling rate of the radio frequency front end of the receiver is 62.11MHz, and when the pre-detection integration time is 0.2ms, the signal-to-noise ratio can be improved by nearly 42dB by integrating and accumulating 12422 data;
and fourthly, reducing the sampling rate: the sampling rate of the input intermediate frequency signal of the transponder is 62.11MHz, and the integral cleaner outputs a result once per accumulation 12422 points, namely the data sampling rate is reduced to 5kHz, which is about the length of a pseudo code period. Because the I, Q two-way integration clean-up results obtained in this case are erroneous if the integration time exceeds the length of one pseudo-code period before bit synchronization, the transition of the data bit may be crossed during the integration period. The integration clearing time is chosen to be 0.2 ms.
Let the sampling frequency be TsFor a sampling interval, the received signal is down-converted and then subjected to intermediate frequency sampling to obtain:
s(i)=Ai·PNI(i·Ts-τ)·cos[(ωI+ωd)i+φ]+Ai·PNQ(i·Ts-τ)·sin[(ωI+ωd)i+φ] (1)
in equation (1): omegaI=2πfITsIntermediate frequency for the received signal; omegad=2πfdTsIs the Doppler frequency; phi is the phase of the received signal; PN (pseudo-noise)I(i·Ts);PNQ(i·Ts) In-phase pseudo codes and orthogonal pseudo codes respectively; τ is the received signal delay.
The in-phase signal and the orthogonal signal output by the carrier NCO of the receiving channel are respectively set as follows:
in equation (2): a. theROutputting the amplitude of sine and cosine signals for NCO; <math><mrow><msub><mover><mi>ω</mi><mo>^</mo></mover><mi>d</mi></msub><mo>=</mo><mn>2</mn><mi>π</mi><msub><mover><mi>f</mi><mo>^</mo></mover><mi>d</mi></msub><msub><mi>T</mi><mi>s</mi></msub></mrow></math> (for the Doppler frequency f in the received signaldEstimate of (d);is an estimate of the phase phi of the received signal.
I. The Q branch integrator-clearer outputs the result at the end of the correlation interval as follows:
in equation (3): a is the signal amplitude; Δ ωd(k) A residual is estimated for the doppler shift and, <math><mrow><mi>Δ</mi><msub><mi>ω</mi><mi>d</mi></msub><mrow><mo>(</mo><mi>k</mi><mo>)</mo></mrow><mo>=</mo><msub><mi>ω</mi><mi>d</mi></msub><mrow><mo>(</mo><mi>k</mi><mo>)</mo></mrow><mo>-</mo><msub><mover><mi>ω</mi><mo>^</mo></mover><mi>d</mi></msub><mrow><mo>(</mo><mi>k</mi><mo>)</mo></mrow><mo>;</mo></mrow></math> epsilon (k) is the code phase (delay) estimation bias (difference between the real delay and the estimated delay), and epsilon (k) is delta tau; r (-) is an ideal two-level autocorrelation function of pseudo-random code, all in timeA function of (a); n is the number of integration points of the integration remover; thetakIs carrier phase error, θk=k·N·Δwd(k)-Δwd(k)·N/2+Δφ;nI(k),nQ(k) Is random noise. The formula (3) is important and is the basis for frequency tracking error estimation, cross product frequency discrimination and arc tangent phase discrimination algorithm.
The frequency decision adopts the expression as follows:
in the formula (4), TIDIs the integration clearing time.
In the frequency pulling process with four-phase frequency discriminator, delta f is adoptedkAnd judging whether the current frequency is less than 10 Hz. If the current frequency Δ fkIf the frequency is less than 10Hz, switching to an FLL tracking loop for frequency tracking; otherwise, the frequency pulling process is continued.
At the beginning of the tracking, the frequency needs to be pulled from a few hundred Hz to below 10Hz by a frequency pulling module and then according to the carrier phase thetakAnd (6) making a decision. If theta is greater than thetakMore than 10 degrees, the receiver tracks the frequency by using a cross product frequency discriminator; if theta is greater than thetakLess than 10 deg., a pure PLL loop is used for phase tracking.
The phase decision expression is:
in the above formula when thetakVery small, tg θkAnd thetakIs in direct proportion. Let θkWhen the angle is less than 10 degrees, switching to phase-locked loop tracking to convert theta intokSubstituting 10 ° into the above equation to obtain the phase decision threshold ηk=0.176。
3. Frequency pulling of four-phase frequency discriminator
After the pseudo code is captured, the carrier doppler frequency shift range is guided to a doppler frequency search unit range, i.e. 500Hz, and the frequency estimation error is still large and may exceed the linear tracking range of the cross product discriminator. Therefore, the frequency is first pulled into the tracking range of the cross-product discriminator by the frequency pulling module.
The invention adopts a four-phase frequency discriminator to carry out a frequency pulling algorithm: the four-phase frequency discriminator has simple calculation method and small operand, but can finish the frequency traction below 10Hz by multiple times of traction. During frequency pulling, Δ f is usedkJudging whether the current frequency is less than 10Hz, if so, determining whether the current frequency is delta fkIf the frequency is less than 10Hz, switching to an FLL tracking loop for high-frequency tracking; otherwise, the frequency pulling process is continued.
4. Cross product frequency discrimination automatic frequency tracking (CP-AFC) locked loop (FLL)
When the four-phase frequency discriminator pulls the larger frequency error within a certain range, the cross-product frequency discriminator can be used for realizing accurate frequency tracking. The FLL generates the appropriate frequency by the carrier NCO to demodulate the signal carrier, insensitive to the 180 ° inversion of the in-phase signal phase, and therefore easier to achieve frequency lock than phase lock at initial signal acquisition. The invention adopts a cross product automatic frequency tracking algorithm (CP-AFC) to realize the FLL frequency discriminator. This algorithm performs nearly optimally at low signal-to-noise ratios relative to other algorithms.
When the frequency error is less than 10Hz, the cross product frequency discriminator is adopted to realize accurate frequency tracking. Cross product automatic frequency tracking loop schematic 4. Where T is the integration interval time of the integrate-dump.
Cross product frequency discriminator output efkComprises the following steps:
efk=I(k-1)Q(k)-I(k)Q(k-1)
=0.25A2D(k)D(k-1)R[ε(k)][ε(k-1)] (6)
·sinc[Δfd(k)·πT]·sinc[Δfd(k-1)·πT]·sin(φk-φk-1)
in equation (6): t is the integration clearing time. When the capture is finished, the received pseudo code and the local pseudo code are basically aligned, the time interval is set as unit time, and the modulation data bit is unchanged in the continuous measurement process, so that D (k) D (k-1) is 1, and R [ epsilon (k)]≈1,R[ε(k-1)]≈1,φk=Δfd(k)·t+φ0,φk-φk-1=[Δfd(k)-Δfd(k-1)]·T=ΔfdT; when the frequency pulling is completed, the Doppler shift estimation error Δ fd< 10 DEG/Hz, phase error | Delta fd(k) When π T | < π/2, sinc2[Δfd(k)·πT]→1,sin(φk-φk-1)→φk-φk-1. The control quantity is proportional to the phase change (frequency) in unit time, and the carrier NCO is controlled by the control quantity through a filter to achieve the purpose of frequency tracking.
The output of the cross product frequency discriminator is
efk=θk-θk-1=2πΔfd(k)·T (7)
The cross product frequency discriminator characteristic is shown in fig. 5.
It can be seen that when the error is small, efkAnd Doppler shift angular frequency estimation error delta fdIs in direct proportion. Due to the existence of code phase error epsilon (k) and Doppler shift estimation error delta fdThe gain of the discriminator is affected to some extent by the relevant terms. For carrier phase tracking, the second order FLL loop may track the phase and frequency rate of change produced by uniform and uniform accelerations with zero steady state error, and the derivative of the frequency rate of change produced by carrier jerk with steady state error.
5. Phase tracking lock loop (PLL)
An in-phase quadrature phase locked loop (Costas loop) is a type of PLL that has found widespread use in PSK despreading receivers because it is insensitive to carrier modulated data. A commonly used costas loop phase detector algorithm is a two-quadrant arc tangent phase detector algorithm:
two-quadrant arc tangent phase discriminator tan-1(Qps/Ips) The performance is linear in the whole range of-90 degrees to 90 degrees, and the performance is optimal. The output signal of the phase discriminator is related to the code delay error and the Doppler frequency shift estimation error. Because the receiver adopts independent code tracking loop and carrier tracking loop, the carrier loop is closed after the code loop correlation occurs, so the code phase is aligned in an allowable range, and the influence on the carrier tracking is small. The Doppler frequency shift estimation error is in the range of the Doppler search unit and is possibly larger, the amplitude of the phase discrimination function of the costas loop is attenuated, the phase discrimination characteristic is influenced, and the phase is difficult to directly capture or track. When the receiver pulls the frequency estimation error to an acceptable range through the four-phase frequency discriminator, the cross product frequency discriminator enables the carrier tracking loop to reach a stable tracking state, and a costas loop carrier phase tracking mode is adopted. The costas loop is as dynamic as a normal PLL, but produces the most accurate pseudorange rate observations. The costas loop also provides lower data demodulation than the FLL bit error rate for a given signal power.
6. Loop filter of frequency-locked loop FLL and phase-locked loop PLL
The loop filter is selected taking into account two factors: filter order and noise bandwidth, the choice of which directly determines the dynamic response of the loop to the input signal. A first-order tracking loop (the loop filter is 0 order) can track phase step input, and has no steady-state phase error, but when tracking frequency step input, the steady-state phase error exists; an ideal second-order tracking loop (the loop filter is 1 order) can track phase step and frequency step signals, has no steady-state error, but has a steady-state tracking error when a tracking frequency ramp signal is input; the third-order tracking loop (the loop filter is 2 orders) can correctly track phase step, frequency step and frequency ramp signals and has no steady-state error. The frequency-locked loop is better to dynamic stress than a phase-locked loop. To cope with the same dynamics, the order of the frequency-locked loop may be one order lower than the order of the phase-locked loop. Therefore, the carrier tracking frequency-locked loop (second-order loop) adopts a first-order Jaffe-Rechtin filter, and the carrier tracking phase-locked loop (third-order loop) adopts a second-order Jaffe-Rechtin filter.
Finally, the following description summarizes the tracking error between the carrier tracking loop FLL and the PLL, which mainly comes from:
signal doppler dynamic stress: jerk (second derivative of the amount of doppler shift) of the relative motion;
thermal noise jitter error of the loop: related to signal carrier to noise ratio dynamics and loop bandwidth;
③ random drift of frequency scale: the influence factors are small and can be ignored generally in relation to the Allan variance of the local frequency standard.
In summary, the carrier tracking loop structure (fig. 6) formed by combining the frequency pulling of the four-phase detection, the second-order FLL frequency automatic tracking loop of the cross product frequency detection and the third-order PLL phase locked loop of the two-quadrant arc tangent phase detection can meet the requirements of general high dynamic tasks; the parameters of the first-order and second-order Jaffe-Rechtin loop filters are carefully designed, so that higher carrier frequency/carrier phase tracking precision can be obtained.
(II) high dynamic spread spectrum code tracking loop
1. Design principle of spread spectrum code tracking loop algorithm
After parallel search in FFT frequency domain to capture coarse carrier frequency and pseudo code phase, the local regenerated spread spectrum code and the spread spectrum code of the received signal complete coarse alignment, and the error is within 1/2 chips. Then, a code tracking process (corresponding to carrier tracking) is carried out to realize the precise alignment of the phase (delay) of the spread spectrum code. Therefore, the code tracking loop and carrier tracking loop structure, algorithm and design have isomorphism.
The closed loop tracking of the pseudo code usually adopts a delay phase-locked loop, namely, a local code generator is used for generating phase lead and lag signals, the phase lead and lag signals are related after being orthogonally mixed with an input BPSK/QPSK modulated spread spectrum signal, the results of the in-phase I/orthogonal Q two branches are compared to obtain a code phase error signal so as to control a code NCO and generate a local code signal consistent with the phase of the input code. The invention adopts a lead-lag non-coherent tracking loop, does not need coherent carrier waves in the tracking process, has no dependence on the carrier tracking state and has excellent comprehensive performance. The overall structure block diagram of the code tracking loop is shown in fig. 6.
The pseudo code phase tracking of the invention adopts a non-coherent digital delay phase-locked loop (DDLL) algorithm structure (shown in figure 7), and consists of an integral-clearer, a code phase discriminator, a loop filter, a code NCO, a regenerative code generator, a shift register and the like. Wherein the parameters of the integrate-and-dump, the code phase detector and the loop filter determine the characteristics of the code tracking loop. In order to realize narrow correlation and achieve the purpose of accurately tracking the code phase, regenerated pseudo codes of an instantaneous code, a lead-lag 1/2 chip and a lead-lag 1/4 chip are generated through a shift register in a loop design, and respectively form incoherent delay locked loops with correlation intervals of 1 chip and 1/4. In the code tracking loop, a code phase discriminator compares the pre-detection integral results of an in-phase branch and an orthogonal branch to generate an error signal, and outputs a code NCO frequency control word through a loop filter to control the accurate alignment of a regenerated pseudo code and a received pseudo code.
In the embodiment of the invention: the integrator-clearer in the code tracking loop adopts the same structure as the carrier tracking loop, and the pre-detection time is also 0.2ms, namely, 12422 times of integration and accumulation are carried out every 0.2 ms. The integrate-and-dump has been discussed in the carrier tracking loop algorithm, and the code tracking loop phase discrimination algorithm, the code tracking loop filter, and the carrier assisted code loop tracking are discussed below.
2. Phase discrimination algorithm of code loop discriminator of code tracking loop
The code phase discriminator generates related error quantity according to the related values of the in-phase branch and the orthogonal branch, the type of the delay locked loop determines the performance of the delay locked loop, and the code phase discriminator capable of generating the related error quantity can be a coherent code phase discriminator or a non-coherent code phase discriminator. The input of the code loop discriminator is a digital correlation accumulation result of code phase lead, prompt and lag of a carrier in-phase I/orthogonal Q branch.
There are three common code-loop discriminator algorithms: dot product power discriminator (I)es-Ils)Ips+(Qes-Qls)QpsA lead minus lag power discriminator (I)es 2+Qes 2)-(Ils 2+Qls 2) Early minus late envelope discriminatorEssentially, the two discriminators of the early minus lag power and the early minus lag envelope have the same DLL discriminator error performance, and the operation amount of the early minus lag envelope is large, so that the early minus lag envelope discriminator is not used generally.
When code correlation occurs, the loop tracks, and if the correlation distance d is 2 delta, the error signal output by the lead-minus-lag type coherent code phase discriminator is
E(k)=Ie(k)-Il(k) (9)
=0.5Asinc[Δfd(k)·πT]·cos[Δfd(k)·tk+φ0]·{R[ε(k)-δ]-R[ε(k)+δ]}
As can be seen from equation (9), the error signal has a dependency on carrier tracking, and when the carrier is not synchronized or cycle skip occurs after tracking, the phase detector generates an indeterminate amount, so that a coherent phase detector is not generally used. The incoherent code phase detector mainly comprises a lead-lag power phase detector and a dot product phase detector. The present invention provides two different delay locked loop discriminator algorithms: a normalized lead minus lag power discriminator; a normalized dot product discriminator.
(1) Leading-reducing-lagging power phase discriminator
In equation (10): i ises(k)、Ips(k) And Ils(k) Respectively inputting in-phase signals and leading, instant and lagging codes to be output in correlation; qes(k)、Qps(k) And Qls(k) Respectively defining phase discrimination characteristic function S of leading-lag power phase discriminator for correlated output of input quadrature phase signal and leading, instantaneous and lagging codesel(ε, δ) is:
Sel(ε,δ)=R2[ε(k)-δ]-R2[ε(k)+δ] (11)
correlation value and chip width T when defining a perfect alignment of the spreading codecThe autocorrelation function when all are 1 can be expressed as:
the phase discrimination characteristic function of the lead-minus-lag power phase discriminator can be obtained by respectively substituting the formula (11) into the formula (12):
when delta is 1/2
② when delta is 1/8 or 1/16
(2) Dot product phase discriminator
Edp(k)=[Ie(k)-Il(k)]Ips(k)+[Qe(k)-Ql(k)]Qps(k)
=0.25A2{R[ε(k)-δ]-R[ε(k)+δ]}·R[ε(k)]·sinc2[Δfd(k)·πT] (15)
=0.25A2sinc2[Δfd(k)·πT]·Sdp(ε,δ)
In equation (15): i ises(k)、Ips(k) And Ils(k) Respectively inputting in-phase signals and leading, instant and lagging codes to be output in correlation; qes(k)、Qps(k) And Qls(k) The output of the input orthogonal digital signal and the lead code, the time code and the lag code after the phase rotation result of the digital correlation accumulation result. Phase discrimination characteristic function S of defined dot product phase discriminatordp(ε, δ) is:
Sdp(ε,δ)={R[ε(k)-δ]-R[ε(k)+δ]}·R[ε(k)] (16)
when delta is 1/2
② when delta is 1/8 or 1/16
In the examples: by means of Ips 2+Qps 2The method respectively normalizes the leading minus lag power phase discriminator and the dot product phase discriminator (namely the power at the moment of the code phase), eliminates the influence caused by signal amplitude and carrier tracking by normalizing, effectively suppresses noise interference and reduces the influence of pulse interference, provides constant phase discriminator phase discrimination gain, and avoids adding an AGC controller after digital correlation accumulation.
Fig. 8(a) shows a phase detection characteristic curve of the early minus late power phase detector, and it can be seen from the graph that in the early minus late power phase detector, as the correlation interval decreases, the linear range of the phase detection characteristic curve becomes smaller, and the gain of the phase detector (the slope of the phase detection characteristic curve at the zero point) becomes larger, which shows that the early minus late power phase detector has the advantage of narrow correlation. Fig. 8(b) shows a phase detection characteristic curve of the dot product phase detector, and it can be seen from the graph that, in the dot product phase detector, as the correlation interval decreases, the linear range of the phase detection characteristic curve becomes smaller, but the phase detection characteristic curve of the phase detector is not improved significantly.
Studies have shown that narrow correlation tracking can improve the tracking accuracy of the pseudo code tracking loop. The normalized leading-lag power phase discriminator has the advantages of being suitable for narrow correlation spacing, large in gain and high in phase discrimination sensitivity, but small in gain when the code phase is large, so that the normalized leading-lag power phase discriminator is suitable for high-sensitivity tracking in the later tracking period of a code tracking loop and is suitable for the situation that the minimum interval between narrow correlation tracking and a leading-lag code is more than 0.05 chip. A normalized lead-minus-lag power dot-product phase detector is used for a pseudo-code delay locked loop with correlation spacing of 1/4 and 1/8 chips. Considering that the thermal noise jitter error is larger than the dot product power discriminator when the lead minus lag power discriminator has the same value of d, the dot product power discriminator is suitable for the case that the minimum interval of the lead-lag code is more than 0.1 chip (meanwhile, the calculation amount of the dot product power discriminator is small). Comprehensive comparison analysis shows that: the dot product phase discriminator has smaller computation amount compared with the lead-lag power phase discriminator, so the dot product phase discriminator is more suitable for being used as a phase discrimination algorithm in the initial phase of code tracking; and during subsequent high-precision code tracking, a lead-lag power phase discriminator is adopted to carry out a narrow correlation phase discrimination algorithm. Studies have shown that the effects of multipath can be effectively mitigated using narrow correlation techniques.
NovAtel corporation adopts a correlator group with the variable distance from 1 chip to 0.05 chip when tracking the C/A code of the GPS, and adopts a normalized lead-lag power phase discriminator when in narrow correlation interval, the tracking noise performance of the C/A code is better than 10cm (1 sigma), and the tracking precision of the P code is achieved.
3. Loop filter design and error analysis for code tracking loops
When the system works in a high dynamic environment, dynamic tracking errors exist in the code tracking ring. Because the Doppler component of the code clock frequency and the carrier Doppler frequency are in a fixed proportional relation, the carrier tracking loop is designed to carry out carrier assistance on the code tracking loop, most of the dynamic state of the code tracking loop can be eliminated, and the dynamic tracking error of the code tracking loop can be ignored in the design. Because the auxiliary of a carrier loop is adopted in code tracking, a second-order loop filter is adopted in the code tracking loop. The filtering algorithm selects a second-order Jaffe-Rechtin filter.
The code tracking loop dynamics and thermal noise performance are analyzed below.
Loop dynamic performance
The dynamic measurement error of the code tracking loop is determined by the order and bandwidth of the loop filter, and for the second-order code tracking loop filter, the dynamic measurement error is
In equation (19): r is the unit of the number of basic chips, the loop natural frequency omegan=1.89Bn,(BnLoop bandwidth).
In general, dynamic tracking errors are caused in the code ring by the dynamic acceleration of the carrier, but because a fixed proportional relation exists between code doppler and carrier doppler, most of the dynamic errors in the code ring can be eliminated by carrier assistance while the carrier ring accurately tracks the carrier dynamics, so that the actual dynamic errors in the code ring are very small and can be disregarded.
② thermal noise flutter error (1 sigma)
The thermal noise error of the lead-minus-lag power phase discriminator is as follows:
the thermal noise error of the dot product phase discriminator is as follows:
in formula (20) and formula (21): b isnFor loop equivalent noise bandwidth (Hz), d is the correlation interval (chips) of the early and late codes, T is the pre-detection integration time(s), C/N0Is the carrier-to-noise power ratio (as C/N)0Expressed in dB, it equals
As can be seen from equation (20) and equation (21) and fig. 9: code tracking Loop design parameters (early and late code correlation Interval d, Pre-detection integration time T, Loop Bandwidth Bn) Given, carrier to noise ratio C/N0The larger the difference is, the smaller the code loop thermal noise variance is, and the higher the tracking accuracy is. On the premise of meeting dynamic tracking performance of code ring, BnThe smaller the better the recommended value is between 1/20 Hz-1/10 Hz. From the theoretical analysis in this section, it can be seen that under large signal dynamic conditions (carrier-to-noise ratio C/N)0Wide range variation) and doppler dynamics (relative motion varies strongly), for loop bandwidth BnThe requirements are contradictory, a narrow loop bandwidth is favorable for eliminating the former influence (suppressing thermal noise jitter error), a wide loop bandwidth is favorable for eliminating the latter influence (suppressing tracking error), and the measured result reflects the rule.
4. Carrier-assisted code loop tracking compensation for Doppler dynamic errors
The carrier tracking loop provides a carrier assist to control the code NCO output frequency while accurately tracking carrier phase changes to truly track spreading code rate changes due to doppler effects. Due to the Doppler effect on the signal and the wavelength of the signalInversely proportional, so a carrier-assisted scaling factor is defined: <math><mrow><mi>μ</mi><mo>=</mo><mfrac><msub><mi>f</mi><mi>code</mi></msub><msub><mi>f</mi><mi>RF</mi></msub></mfrac><mo>,</mo></mrow></math> fcodefor the nominal value of the spreading code rate, fRFIs the nominal value of the frequency point of the radio frequency carrier.
The amount of change in spreading code rate due to dynamic motion (spreading code doppler shift) is calculated by:
in equation (22):a carrier doppler frequency estimate output for the carrier loop filter;is an estimate of the doppler shift of the spreading code.Frequency offset control word P converted into frequency control word and code tracking loopbiasAnd adding the signals, and feeding the signals back to a numerically-controlled oscillator NCO of the pseudo code delay locked loop for adjustment, so that the influence of dynamic stress on the pseudo code delay locked loop is effectively reduced, and the dynamic tracking performance and the tracking precision of the code tracking loop are improved.
The method has important significance in obtaining high-precision carrier Doppler frequency shift estimation values, can be used for precision speed measurement, continuous carrier phase observation, integral Doppler measurement, carrier-assisted code loop tracking to obtain high-precision distance measurement, design of narrow-band carrier loops and code loop filters to inhibit signal dynamics of large-range carrier-to-noise ratio changes, improve tracking precision of the carrier loops and the code loops, reduce out-of-lock probability, improve loop signal-to-noise ratio and receiver sensitivity, and the like. The method can be particularly used for assisting in directly capturing encrypted hopping codes, for carrier Doppler and code phase extrapolation prediction of a burst spread spectrum system and a spread spectrum ranging/non-spread spectrum data transmission multiplexing channel system, and the like, and provides a solution for certain key technologies of a cluster link.
Claims (1)
1. A precise tracking and measuring method for high dynamic signals of a cluster link is realized on a Digital Signal Processor (DSP) and a Field Programmable Gate Array (FPGA) of a circuit board; the method is characterized in that: the method comprises the following specific steps:
high dynamic carrier tracking loop
The high dynamic carrier tracking loop unit adopts a carrier tracking strategy applicable to carrier dynamics, namely, after pseudo code phase acquisition is carried out through an FFT frequency domain algorithm, a four-phase frequency discriminator is adopted to further pull and acquire Doppler frequency and initial tracking, and the Doppler frequency is reduced from hundreds of hertz to several hertz so as to enter the working range of a cross product automatic frequency tracking loop; an FLL loop with strong dynamic capability is adopted to eliminate dynamic and steady tracking; a costas PLL with small thermal noise error is adopted to improve the carrier phase; the method comprises the following specific steps:
[1] integrator-eliminator and frequency and phase decision algorithm
Let the sampling frequency beTsFor a sampling interval, the received signal is down-converted and then subjected to intermediate frequency sampling to obtain:
S(i)=Ai·PNI(i·Ts-τ)·cos[(ωI+ωd)i+φ]+Ai·PNQ(i·Ts-τ)·sin[(ωI+ωd)i+φ](1)
in equation (1): omegaI=2πfITsIntermediate frequency for the received signal; omegad=2πfdTsIs the Doppler frequency; phi is the phase of the received signal; PN (pseudo-noise)I(i·Ts);PNQ(i·Ts) In-phase pseudo codes and orthogonal pseudo codes respectively; tau is the received signal delay;
the in-phase signal and the orthogonal signal output by the carrier NCO of the receiving channel are respectively set as follows:
in equation (2): a. theROutputting the amplitude of sine and cosine signals for NCO;wherein,for the Doppler frequency f in the received signald(ii) an estimate of (d);is an estimate of the phase phi of the received signal;
I. the Q branch integrator-clearer outputs the result at the end of the correlation interval as follows:
in equation (3): a is the signal amplitude; Δ ωd(k) A residual is estimated for the doppler shift and,epsilon (k) is code phase estimation deviation, namely the difference between real delay and estimated delay, and epsilon (k) is delta tau; r (-) is an ideal two-level autocorrelation function of the pseudo-random code, and is a function of time; n is the number of integration points of the integration remover; thetakIs carrier phase error, θk=k·N·Δwd(k)-Δwd(k)·N/2+Δφ;nI(k),nQ(k) Is random noise;
the frequency decision adopts the expression as follows:
in the formula (4), TIDIs the integration clearing time;
in the frequency pulling process with four-phase frequency discriminator, delta f is adoptedkJudging whether the current frequency is less than 10 Hz; if the current frequency Δ fkLess than 10Hz, thenSwitching to an FLL tracking loop for frequency tracking; otherwise, continuing the frequency traction process;
at the beginning of the tracking, the frequency needs to be pulled from a few hundred Hz to below 10Hz by a frequency pulling module and then according to the carrier phase thetakJudging; if theta is greater than thetakMore than 10 degrees, the receiver tracks the frequency by using a cross product frequency discriminator; if theta is greater than thetakIf the angle is less than 10 degrees, a pure PLL loop is adopted for phase tracking;
the phase decision expression is:
in the above formula when thetakVery small, tg θkAnd thetakIs in direct proportion; let θkWhen the angle is less than 10 degrees, switching to phase-locked loop tracking to convert theta intokSubstituting 10 ° into the above equation to obtain the phase decision threshold ηk=0.176;
[2] Frequency pulling of four-phase frequency discriminator
After the pseudo code is captured, the carrier Doppler frequency shift range is guided to a Doppler frequency search unit range, namely 500Hz, and at the moment, the frequency estimation error is still large, so that the frequency is pulled to the tracking range of the cross product frequency discriminator by using a frequency pulling module; adopting a four-phase frequency discriminator to carry out a frequency pulling algorithm, pulling the frequency to be below 10Hz after multiple times of pulling; during frequency pulling, Δ f is usedkJudging whether the current frequency is less than 10Hz, if so, determining whether the current frequency is delta fkLess than 10Hz, the process is switched toCarrying out high-frequency tracking by an FLL tracking loop; otherwise, continuing the frequency traction process;
[3] a cross product frequency discrimination automatic frequency tracking lock loop;
when the frequency error is less than 10Hz, a cross product frequency discriminator is adopted to realize accurate frequency tracking; wherein T is the integration interval time of the integration-removal device;
cross product frequency discriminator output efkComprises the following steps:
efk=I(k-1)Q(k)-I(k)Q(k-1)
=0.25A2D(k)D(k-1)R[ε(k)][ε(k-1)] (6)
·sin c[Δfd(k)·πT]·sinc[Δfd(k-1)·πT]·sin(φk-φk-1)
in equation (6): t is the integral clearing time; when the capture is finished, the received pseudo code and the local pseudo code are basically aligned, the time interval is set as unit time, and the modulation data bit is unchanged in the continuous measurement process, so that D (k) D (k-1) is 1, and R [ epsilon (k)]≈1,R[ε(k-1)]≈1,φk=Δfd(k)·t+φ0,φk-φk-1=[Δfd(k)-Δfd(k-1)]·T=ΔfdT; when the frequency pulling is completed, the Doppler shift estimation error Δ fd< 10 DEG/Hz, phase error | Delta fd(k) Sin c when π T | < π/22[Δfd(k)·πT]→1,sin(φk-φk-1)→φk-φk-1(ii) a So the control quantity and the phase change in unit time; proportional, the carrier NCO is controlled by the filter to achieve the purpose of frequency tracking;
the output of the cross product frequency discriminator is
efk=φk-φk-1=2πΔfd(k)·T (7)
[4] A phase tracking locked loop;
an in-phase quadrature phase-locked loop, namely a costas loop, is one of phase tracking lock loops, and a commonly used costas loop phase detector algorithm is a two-quadrant arc tangent phase detection algorithm:
two-quadrant arc tangent phase discriminator tan-1(Qps/Ips) The performance is linear in the whole range of-90 degrees to 90 degrees, and the performance is optimal;
[5] loop filter of frequency-locked loop FLL and phase-locked loop PLL
The carrier tracking frequency-locked loop adopts a first-order Jaffe-Rechtin filter, and the carrier tracking frequency-locked loop adopts a second-order Jaffe-Rechtin filter;
in conclusion, a carrier tracking loop structure formed by combining a frequency traction of four-phase discrimination and a third-order PLL phase-locked loop of second-order FLL frequency automatic tracking of cross product frequency discrimination and twelve-quadrant arc tangent phase discrimination can meet the requirement of a general high-dynamic task; the parameters of the first-order and second-order Jaffe-Rechtin loop filters are carefully designed to obtain higher carrier frequency/carrier phase tracking precision;
(II) high dynamic spread spectrum code tracking loop
After parallel search and capture of coarse carrier frequency and pseudo code phase in FFT frequency domain, coarse alignment of local regenerated spread spectrum code and spread spectrum code of received signal is completed, and error is within 1/2 chips; then, a code tracking process is carried out to realize the accurate alignment of the spread spectrum code phase; the closed loop tracking of the pseudo code usually adopts a delay phase-locked loop, namely, a local code generator is utilized to generate phase lead and lag signals, the phase lead and lag signals are related to an input BPSK/QPSK modulated spread spectrum signal after orthogonal frequency mixing, the results of the in-phase I/orthogonal Q two branches are compared to obtain a code phase error signal to control a code NCO and generate a local code signal with the same phase as the input code;
the pseudo code phase tracking adopts a non-coherent digital delay phase-locked loop (DDLL) algorithm structure and consists of an integral-clearer, a code phase discriminator, a loop filter, a code NCO, a regenerative code generator and a shift register; the parameters of the integral-clearer, the code phase discriminator and the loop filter determine the characteristics of a code tracking loop; in order to realize narrow correlation and achieve the purpose of accurately tracking the code phase, regenerated pseudo codes of an instant code, a lead-lag 1/2 chip and a lead-lag 1/4 chip are generated through a shift register in the loop design, and respectively form incoherent delay locked loops with correlation intervals of 1 chip and 1/4; in a code tracking loop, a code phase discriminator compares pre-detection integral results of an in-phase branch and an orthogonal branch to generate an error signal, and outputs a code NCO frequency control word through a loop filter to control a regenerated pseudo code to be accurately aligned with a received pseudo code; the code tracking loop phase discrimination algorithm, the code tracking loop filter and the carrier-assisted code loop tracking are explained in detail below:
[1] code loop discriminator phase discrimination algorithm of code tracking loop
The input of the code loop discriminator is a digital correlation accumulation result of code phase advance, prompt and lag of a carrier in-phase I/orthogonal Q branch;
commonly used code ring identificationThere are three types of classifier algorithms: dot product power discriminator (I)es-Ils)Ips+(Qes-Qls)QpsA lead minus lag power discriminator (I)es 2+Qes 2)-(Ils 2+Qls 2) Early minus late envelope discriminatorThe lead minus lag envelope discriminator is not typically used;
when code correlation occurs, the loop tracks, and if the correlation distance d is 2 delta, the error signal output by the lead-minus lag type coherent code phase discriminator is
E(k)=Ie(k)-Il(k)
(9)
=0.5A sinc[Δfd(k)·πT]·cos[Δfd(k)·tk+φ0]·{R[ε(k)-δ]-R[ε(k)+δ]}
As can be seen from the formula (9), the error signal has dependency on carrier tracking, and when the carrier is not synchronized or cycle skip occurs after tracking, the phase discriminator generates an indeterminate quantity, so that a coherent phase discriminator is not generally adopted; the incoherent code phase discriminator mainly comprises a lead-lag power phase discriminator and a dot product phase discriminator; the present invention provides two different delay locked loop discriminator algorithms: a normalized lead minus lag power discriminator, a normalized dot product discriminator;
power discriminator with leading and lagging functions
In equation (10): i ises(k)、Ips(k) And Ils(k) Respectively inputting in-phase signals and leading, instant and lagging codes to be output in correlation; qes(k)、Qps(k) And Qls(k) Respectively defining phase discrimination characteristic function S of leading-lag power phase discriminator for correlated output of input quadrature phase signal and leading, instantaneous and lagging codesel(ε, δ) is:
Sel(ε,δ)=R2[ε(k)-δ]-R2[ε(k)+δ] (11)
correlation when defining a perfect alignment of spreading codesValue and chip width TcThe autocorrelation function when all are 1 can be expressed as:
the formula (11) is respectively substituted into the formula (12), so that the phase discrimination characteristic function of the lead minus lag power phase discriminator can be obtained:
(i) when delta is 1/2
(ii) When delta is 1/8 or 1/16
② dot product discriminator
Edp(k)=[Ie(k)-Il(k)]Ips(k)+[Qe(k)-Ql(k)]Qps(k)
=0.25A2{R[ε(k)-δ]-R[ε(k)+δ]}·R[ε(k)]·sinc2[Δfd(k)·πT] (15)
=0.25A2 sinc2[Δfd(k)·πT]·Sdp(ε,δ)
In equation (15): i ises(k)、Ips(k) And Ils(k) Respectively inputting in-phase signals and leading, instant and lagging codes to be output in correlation; qes(k)、Qps(k) And Qls(k) Respectively inputting the orthogonal digital signal and the output of the advanced code, the instantaneous code and the lag code after the phase rotation result of the digital correlation accumulation result; phase discriminator with defined dot productPhase characteristic function Sdp(ε, δ) is:
Sdp(ε,δ)={R[ε(k)-δ]-R[ε(k)+δ]}·R[ε(k)] (16)
(i) when delta is 1/2
(ii) When delta is 1/8 or 1/16
[2] Loop filter for code tracking loop
Because the assistance of a carrier loop is adopted in code tracking, a second-order loop filter is adopted in the code tracking loop; the filtering algorithm selects a second-order Jaffe-Rechtin filter;
the code tracking loop dynamics and thermal noise performance are analyzed as follows:
loop dynamic performance
The dynamic measurement error of the code tracking loop is determined by the order and bandwidth of the loop filter, and for the second-order code tracking loop filter, the dynamic measurement error is
In equation (19): r is the unit of the number of basic chips, the loop natural frequency omegan=1.89BnWherein B isnIs the loop bandwidth;
under the normal condition, the dynamic acceleration of the carrier causes dynamic tracking error in the code ring, but because a fixed proportional relation exists between code Doppler and carrier Doppler, most of the dynamic error in the code ring can be eliminated by carrier assistance while the carrier ring accurately tracks the carrier dynamics, so that the actual dynamic error in the code ring is very small and can be not considered;
thermal noise jitter error
The thermal noise error of the lead-minus-lag power phase discriminator is as follows:
the thermal noise error of the dot product phase discriminator is as follows:
in formula (20) and formula (21): b isnFor loop equivalent noise bandwidth, d is the correlation interval of the early and late codes, T is the pre-detection integration time, C/N0Is the carrier-to-noise power ratio, wherein, when C/N0Expressed in dB, it equals
[3] Carrier-assisted code loop tracking compensation for Doppler dynamic errors
The carrier tracking loop provides a carrier assist to control the output frequency of the code NCO so as to truly track the rate change of the spread spectrum code caused by Doppler effect while accurately tracking the phase change of the carrier; since the doppler effect on a signal is inversely proportional to the wavelength of the signal, a carrier-assisted scaling factor is defined:fcodefor the nominal value of the spreading code rate, fRFIs the nominal value of the frequency point of the radio frequency carrier;
the code rate variation of the spreading code due to the dynamic motion, i.e., the doppler shift of the spreading code, is calculated by the following formula:
in equation (22):a carrier doppler frequency estimate output for the carrier loop filter;is a Doppler frequency shift estimated value of a spread spectrum code;frequency offset control word P converted into frequency control word and code tracking loopbiasNumerically controlled oscillator N added together and fed back to pseudo code delay locked loopAnd the CO is adjusted, so that the influence of dynamic stress on the pseudo code delay locking ring is effectively reduced, and the dynamic tracking performance and the tracking precision of the code tracking ring are improved.
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