CN101707476A

CN101707476A - LDMOS protection circuit

Info

Publication number: CN101707476A
Application number: CN200910153923A
Authority: CN
Inventors: 吴志坚; 赖敏福
Original assignee: Sunwave Communications Co Ltd
Current assignee: Sunwave Communications Co Ltd
Priority date: 2009-11-26
Filing date: 2009-11-26
Publication date: 2010-05-12

Abstract

The invention provides an LDMOS protection circuit. The circuit comprises an LDMOS amplification circuit, a grid voltage biasing circuit, a leakage voltage sampling comparison circuit and a direct current power supply, wherein the grid voltage biasing circuit is used for adjusting and setting the grid voltage of an LDMOS and has the automatic compensation function of grid voltage temperature, which causes the static current of the LDMOS to be constant within working temperature range; the leakage voltage sampling comparison circuit is used for sampling the drain voltage of the LDMOS and producing a high-low level to control whether the grid voltage biasing circuit outputs the grid of the LDMOS after comparing the drain voltage with the minimum working drain voltage required by the LDMOS, thus avoiding the unstable state when the LDMOS works under low leakage voltage and then functioning in the protection of the LDMOS; and the direct current power supply offers direct current sources to other three parts. The protection circuit has the beneficial effects of effectively and reliably protecting the LDMOS and being characterized by simpleness, low cost, easy realization, and the like.

Description

A kind of LDMOS protective circuit

Technical field

The present invention relates to the high-power amplifying technique of LDMOS, particularly a kind of LDMOS protective circuit avoids LDMOS to be operated in low labile state of leaking when pressing, and has protection LDMOS function.

Background technology

Because the LDMOS device has good electrology characteristic and radio frequency performance, and can be compatible fully with the CMOS technology of standard, application more and more widely therefore in radio frequency integrated circuit, obtained.LDMOS has following advantage: 1. Heat stability is good, and the high-temperature stability of device is good; 2. frequency stability height; 3. gain is high, bandwidth, linearity height; 4. the long service life of device; 5. simple match circuit, good AGC control; 6. lower noise etc.Since two thousand five, the LDMOS device occupied 2GHz and more the high power RF of wide frequency ranges amplify to use 90% market.Various fields such as mobile communication (CDMA, GSM, TD-SCDMA, WCDMA etc.), satellite communication, navigation and detection, HF communication (cluster radio station etc.), air traffic control now have been widely used in.

LDMOS is the modified model N-channel MOS FET that aims at Design of RF Power Amplifier, often is operated in the AB class, and its self-heating effect can cause the drift of static working current, and promptly under certain grid voltage, when temperature raise, its quiescent current raise; When temperature reduced, its quiescent current reduced.Usually, when the LDMOS working temperature when 20 ℃ are elevated to 100 ℃, its static working current changes 140%.The variation of static working current can influence the indexs such as gain, efficient and the linearity of power amplifier, more has even can make LDMOS be operated in labile state to cause self-excitation.Therefore need a kind of biasing circuit to keep the constant of LDMOS static working current.

Moving communicating field LDMOS operate as normal hourglass is pressed and is generally+28V, the grid voltage biasing is generally in 2～4V scope, in the design of radio frequency LDMOS power amplifier, drain electrode is very big during its work, need very big power filtering capacitor (capacitance can reach 220uF), and grid does not almost have electric current, only needs very little filter capacitor (1uF is following).The moment that so just causes LDMOS to power on, the charging interval of grid is shorter than drain electrode, and grid reaches operating voltage sooner than drain electrode; LDMOS closes the moment of electricity, and the discharge time of grid is faster than drain electrode, and grid reaches low level sooner than drain electrode.But the correct electric sequence of LDMOS is a grid after the drain electrode earlier, and closing the electricity order is to drain behind the first grid.So just make operating characteristic and the design principle of LDMOS contradict.If LDMOS powers on or to close the order of electricity not right, can cause LDMOS to damage.If also have the drain electrode power supply of LDMOS to break down, also can be higher than to leak to press and damage owing to the grid voltage of LDMOS.Reliability for the power amplifier that improves LDMOS design needs a kind of simple effective method or circuit and addresses the above problem.

Summary of the invention

The objective of the invention is to overcome just the deficiency that above-mentioned technology exists, and a kind of LDMOS protective circuit is provided, guarantee that LDMOS is operated in correct power on or close the electricity order, can also guarantee that LDMOS is operated in constant quiescent current in full temperature scope.

The object of the invention is achieved through the following technical solutions: this LDMOS protective circuit, comprise LDMOS amplifying circuit, grid voltage biasing circuit, leak and press sampling comparison circuit and DC power supply, the grid voltage biasing circuit is used to adjust the grid voltage of setting LDMOS, this circuit also has the grid voltage temperature self-compensation function, makes the quiescent current of LDMOS in operating temperature range constant; Leak to press sampling comparison circuit be used for the taking a sample drain voltage of LDMOS; and compare the back with the needed minimum work drain voltage of LDMOS and produce the grid whether a high-low level control-grid voltage biasing circuit outputs to LDMOS; to hang down unsure state when leaking pressure thereby avoid LDMOS to be operated in, thereby play the effect of protection LDMOS. DC power supply provides DC source for LDMOS amplifying circuit, grid voltage biasing circuit, three parts of leakage pressure sampling comparison circuit.

As preferably, described LDMOS amplifying circuit comprises LDMOS pipe Q1, input capacitance C1, output capacitance C3, grid strategic point stream inductance L 1, drain electrode strategic point stream inductance L 2, grid radiofrequency signal shunt capacitance C2, drain electrode radiofrequency signal shunt capacitance C4, drain power filter capacitor C5, C6; The gate bias voltage of LDMOS is VGS, and drain voltage is VDS.

As preferably, described grid voltage biasing circuit comprises three-terminal voltage-stabilizing module (LDO) U1; Dc filter capacitor C7, C8, C9, C10, C11, C12, C13, C14, C15; Resistance R 1 constitutes constant-current source with U1, and constant current value is determined by the resistance of voltage between 1 and 2 pin of U1 and R1; After constant-current source passes through R2, R3, R4, D1, produce different voltage at the two ends of R3; 1 of variable potentiometer VR1 is connected the two ends of resistance R 3 respectively with 3 pin, and the normal phase input end of 2 pin concatenation operation amplifier U2A is used for determining the static working current of LDMOS; Operational amplifier U2A and resistance R 5, R6 form direct current amplifier, and multiplication factor is determined by the resistance of R5 and R6; The temperature coefficient of Schottky diode D1 forms the temperature characterisitic that new temperature coefficient just in time compensates LDMOS after by the direct current amplifier conversion; Resistance R 7 and capacitor C 15 are formed charging circuit, and their value is determined charge constant; The gate bias voltage scope of LDMOS is determined by the voltage and the direct current amplifier at R3 two ends; Biasing circuit finally be output as VGS.

As preferably, the drain voltage VDS that sampling comparison circuit: LDMOS is pressed in described leakage is input to the inverting input of operational amplifier U2B after by sample resistance R10, R11 dividing potential drop; The in-phase input end of operational amplifier U2B determines that by resistance R 8, R9 and DC power supply+5V capacitor C 16 is used for filtering for comparing set point; The grid of a high-low level to N channel fet pipe Q2 exported by 7 pin in the anti-phase relatively back of the homophase of operational amplifier U2B, the source ground of Q2, and the drain electrode of Q2 meets VGS; When the drain voltage VDS of LDMOS was lower than set point, operational amplifier U2B exported high level, the Q2 conducting, and VGS is by the Q2 repid discharge, and LDMOS closes.

The effect that the present invention is useful: LDMOS protective circuit of the present invention has characteristics such as simple, practical and reliable, that cost is low, guarantees that LDMOS is operated in correct power on or close the electricity order, can also guarantee that LDMOS is operated in constant quiescent current in full temperature scope.

Description of drawings

Accompanying drawing 1 is an entire block diagram of the present invention;

Accompanying drawing 2 is power amplification circuit schematic diagrams;

Accompanying drawing 3 is grid voltage biasing circuit schematic diagrams;

Accompanying drawing 4 is to leak to press sampling rate than circuit theory diagrams.

Embodiment

Below in conjunction with drawings and Examples the present invention is further described, but should understand these embodiment limits the scope of the invention, under the situation of the spirit and scope of the present invention, those skilled in the art can make changes and improvements so that it is fit to different operating positions, condition and embodiment to the present invention.

The present invention is directed to the quiescent operation characteristic of LDMOS; realize protection from grid and drain electrode. comprise the LDMOS amplifying circuit; the grid voltage biasing circuit; leaking and press sampling comparison circuit and DC power supply. the grid voltage biasing circuit is used to adjust the grid voltage of setting LDMOS; this circuit also has the grid voltage temperature self-compensation function; make the quiescent current of LDMOS in operating temperature range constant. leak to press sampling comparison circuit be used for the taking a sample drain voltage of LDMOS; and compare the back with the needed minimum work drain voltage of LDMOS and produce the grid whether a high-low level control-grid voltage biasing circuit outputs to LDMOS; to hang down unsure state when leaking pressure thereby avoid LDMOS to be operated in, thereby play the effect of protection LDMOS. DC power supply provides DC source for other three parts.

LDMOS amplifying circuit (Fig. 2) comprises LDMOS pipe Q1, input capacitance C1, output capacitance C3, grid strategic point stream inductance L 1, drain electrode strategic point stream inductance L 2, grid radiofrequency signal shunt capacitance C2, drain electrode radiofrequency signal shunt capacitance C4, drain power filter capacitor C5, C6; The gate bias voltage of LDMOS is VGS, and drain voltage is VDS.Radiofrequency signal is by realizing the amplification of power behind the LDMOS amplifying circuit.

Gate bias circuit (Fig. 3) comprises three-terminal voltage-stabilizing module (LDO) U1; Dc filter capacitor C7, C8, C9, C10, C11, C12, C13, C14, C15; Resistance R 1 constitutes constant-current source with U1, and constant current value is determined by the resistance of voltage between 1 and 2 pin of U1 and R1; After constant-current source passes through R2, R3, R4, D1, produce different voltage at the two ends of R3; 1 of variable potentiometer VR1 is connected the two ends of resistance R 3 respectively with 3 pin, and the normal phase input end (3 pin) of 2 pin concatenation operation amplifier U2A is used for determining the static working current of LDMOS; Operational amplifier U2A and resistance R 5, R6 form direct current amplifier, and multiplication factor is determined by the resistance of R5 and R6; Schottky diode D1 has negative temperature characteristic, when temperature raise, the pressure drop that it produced reduced, when temperature raises, pressure drop that it produced raises, and its temperature coefficient forms the temperature characterisitic that new temperature coefficient just in time compensates LDMOS after by the direct current amplifier conversion; Resistance R 7 and capacitor C 15 are formed charging circuit, and their value is determined charge constant; The gate bias voltage scope of LDMOS is determined by the voltage and the direct current amplifier at R3 two ends; Biasing circuit finally be output as VGS.

Leak to press sampling comparison circuit (Fig. 4), it is characterized in that: the drain voltage VDS of LDMOS is input to the inverting input (6 pin) of operational amplifier U2B after by sample resistance R10, R11 dividing potential drop; The in-phase input end of operational amplifier U2B (5 pin) determines that by resistance R 8, R9 and DC power supply+5V capacitor C 16 strobes, and makes set point not have big fluctuation for comparing set point; The grid of a high-low level to N channel fet pipe Q2 exported by 7 pin in the anti-phase relatively back of the homophase of operational amplifier U2B, the source ground of Q2, and the drain electrode of Q2 meets VGS; When the drain voltage VDS of LDMOS was lower than set point, operational amplifier U2B exported high level, the Q2 conducting, and VGS is by the Q2 repid discharge, and the grid voltage of LDMOS is about zero like this, and LDMOS closes.When the drain voltage VDS of LDMOS is higher than set point, operational amplifier U2B output low level, Q2 closes, and the grid voltage VGS of LDMOS reaches the needed gate bias value of LDMOS, the LDMOS conducting by the charging circuit charging that R7 and C15 form like this.

The grid temperature compensation principle:

Three-terminal voltage-stabilizing module U1 (such as LT117-3.3), temperature variant hardly constant voltage 3.3V of an output of output between its 1 and 2 pin, the constant-current source electric current I of formation

I＝3.3/R1

This electric current is given potentiometer VR1 by forming two magnitudes of voltage at the R3 two ends behind R2, R3, R4 and the D1, and the 2 pin maximum output voltages of VR1 are Vmax

Vmax=I* (R3+R4)+Vd, wherein Vd is the pressure drop of diode D1, the 2 pin minimum output voltages that are generally 0.7 volt of VR1 under the normal temperature are Vmin

Vmin＝I*R3+Vd

Behind the direct current amplifier that the 2 pin output voltages of VR1 pass through to be made up of U2A, R5, R6, can determine the scope of the grid voltage VGS of LDMOS, the maximum voltage of VGS is VGSmax

VGSmax＝Vmax*(R5+R6)/R5

The minimum voltage of VGS is VGSmin

VGSmin＝Vmin*(R5+R6)/R5

From top formula as can be seen, the grid voltage VGS of LDMOS is relevant with the pressure drop Vd of diode D1, and Vd is a negative temperature coefficient.That is to say that when temperature raise, Vd descended, VGS also descends; When temperature reduced, Vd rose, and VGS also rises.VGS is inversely prroportional relationship with variation of temperature amount and Vd with the variation of temperature amount, and this proportionality coefficient can obtain by the resistance of adjusting R3, R4, R5, R6.The gate bias of LDMOS and temperature are inversely prroportional relationships, and this circuit output VGS also is an inversely prroportional relationship with temperature.In the design of radio frequency LDMOS power amplifier PCB, diode D1 wants as close as possible LDMOS, and the effect of temperature-compensating just can reach best like this.

Be understandable that, for a person skilled in the art, technical scheme of the present invention and inventive concept be equal to replacement or change the protection range that all should belong to the appended claim of the present invention.

Claims

1. LDMOS protective circuit, it is characterized in that: comprise LDMOS amplifying circuit, grid voltage biasing circuit, leak and press sampling comparison circuit and DC power supply, the grid voltage biasing circuit is used to adjust the grid voltage of setting LDMOS, makes the quiescent current of LDMOS in operating temperature range constant; Leak to press sampling comparison circuit be used for the taking a sample drain voltage of LDMOS, and compare the back with the needed minimum work drain voltage of LDMOS and produce the grid whether a high-low level control-grid voltage biasing circuit outputs to LDMOS, DC power supply for LDMOS amplifying circuit, grid voltage biasing circuit, leak and press three parts of sampling comparison circuit that DC source is provided.

2. LDMOS protective circuit according to claim 1, it is characterized in that: described LDMOS amplifying circuit comprises LDMOS pipe Q1, input capacitance C1, output capacitance C3, grid strategic point stream inductance L 1, drain electrode strategic point stream inductance L 2, grid radiofrequency signal shunt capacitance C2, drain electrode radiofrequency signal shunt capacitance C4, drain power filter capacitor C5, C6; The gate bias voltage of LDMOS is VGS, and drain voltage is VDS.

3. LDMOS protective circuit according to claim 1 is characterized in that: described grid voltage biasing circuit comprises three-terminal voltage-stabilizing module (LDO) U1; Dc filter capacitor C7, C8, C9, C10, C11, C12, C13, C14, C15; Resistance R 1 constitutes constant-current source with U1, and constant current value is determined by the resistance of voltage between 1 and 2 pin of U1 and R1; After constant-current source passes through R2, R3, R4, D1, produce different voltage at the two ends of R3; 1 of variable potentiometer VR1 is connected the two ends of resistance R 3 respectively with 3 pin, and the normal phase input end of 2 pin concatenation operation amplifier U2A is used for determining the static working current of LDMOS; Operational amplifier U2A and resistance R 5, R6 form direct current amplifier, and multiplication factor is determined by the resistance of R5 and R6; The temperature coefficient of Schottky diode D1 forms the temperature characterisitic that new temperature coefficient just in time compensates LDMOS after by the direct current amplifier conversion; Resistance R 7 and capacitor C 15 are formed charging circuit, and their value is determined charge constant; The gate bias voltage scope of LDMOS is determined by the voltage and the direct current amplifier at R3 two ends; Biasing circuit finally be output as VGS.

4. LDMOS protective circuit according to claim 1 is characterized in that: the drain voltage VDS that sampling comparison circuit: LDMOS is pressed in described leakage is input to the inverting input of operational amplifier U2B after by sample resistance R10, R11 dividing potential drop; The in-phase input end of operational amplifier U2B determines that by resistance R 8, R9 and DC power supply+5V capacitor C 16 is used for filtering for comparing set point; The grid of a high-low level to N channel fet pipe Q2 exported by 7 pin in the anti-phase relatively back of the homophase of operational amplifier U2B, the source ground of Q2, and the drain electrode of Q2 meets VGS; When the drain voltage VDS of LDMOS was lower than set point, operational amplifier U2B exported high level, the Q2 conducting, and VGS is by the Q2 repid discharge, and LDMOS closes.