CN101635637A - Method and system for distributing intelligent addresses based on serial bus - Google Patents
Method and system for distributing intelligent addresses based on serial bus Download PDFInfo
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- CN101635637A CN101635637A CN200810133595A CN200810133595A CN101635637A CN 101635637 A CN101635637 A CN 101635637A CN 200810133595 A CN200810133595 A CN 200810133595A CN 200810133595 A CN200810133595 A CN 200810133595A CN 101635637 A CN101635637 A CN 101635637A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/403—Bus networks with centralised control, e.g. polling
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40019—Details regarding a bus master
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L61/00—Network arrangements, protocols or services for addressing or naming
- H04L61/50—Address allocation
- H04L61/5038—Address allocation for local use, e.g. in LAN or USB networks, or in a controller area network [CAN]
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Abstract
The invention provides a system for distributing intelligent addresses. The system comprises a host and a slave, wherein the host comprises an MCU controller, a communication module, a memory and an initializing switch which have functions of executing address distribution; the slave comprises an MCU controller, a communication module, an electronic physical switch, a memory and an initializing switch which have functions of executing address distribution; and the system adopts a networking connection mode that a twisted-pair cable is led out of the host, then led in an input end of the electronic physical switch of the first slave, and led to an input end of the electronic physical switch of the second slave from an output end of the electronic physical switch.
Description
Technical field
The present invention relates generally to intelligent addresses and distributes, and more specifically, relates to a kind of method and system that distributes based on the intelligent addresses of universal serial bus under the master-slave communication pattern.
Background technology
Universal serial bus is widely used in industrial control field.When using universal serial bus, all devices common share communication medium on the bus, the communication information that any one equipment sends can both be received by the miscellaneous equipment on the bus.In order to indicate the equipment of the transmission or the information of reception, be necessary for mailing address of each devices allocation.General bus has master slave mode and " wheel main wheel from " two kinds of working methods of pattern.Because of latter's performance under the more situation of node not good, in the middle of the Industry Control overwhelming majority all be adopt one main more than from the communication network structure.Under master slave mode, whole communication bus system by a host node, several form from node, whether constantly take turns continuous query by host node has communication requirement from node.If have then bus control right given a certain from node, send from node and to return bus control right at once after finishing, communication could be set up in the address that main frame must very clear and definite slave, and slave addresses must be unique on network.Synchronization can only have a node to become host node and be in transmit status on the bus, other all nodes must be in accepting state.If synchronization has plural node to be in transmit status, will cause the data of all transmit legs to send failure, promptly so-called bus collision.
At present, in the serial bus system under adopting the master-slave communication pattern, generally be to adopt the device address manually is set.Usually the setting of address all is the artificial device address of distributing that toggle switch manually is set on slave in advance, notes addresses distributed number then, and communication is so just set up in the address of the slave unit that has distributed to main frame input again.In commercial Application, for example in central air conditioner system, can connect a lot of slaves below the main frame usually, and the position of slave is unfixing and distance is far, and the address that the device address is provided with repetition possibly manually is set.And a lot of main frames all are to belong to the sealing main frame, only open machine casing and just can simply be provided with, if keep in repair slave or increase newly behind machine equipment the user, tend to bring some chance failures.
For instance, as shown in Figure 1a, wherein illustrate the network configuration of RS485 bus of the prior art, this network is made up of a main frame (host) and three slaves (slave) 1,2,3.Fig. 1 b and Fig. 1 c show the structural representation of main frame of the prior art and slave respectively.As seen from the figure, the main frame of prior art comprises: MCU microcontroller, communication module, memory and dial-up input unit.Wherein, communication module is connected with twisted-pair feeder, and is connected with the MCU microcontroller, carries out normal communications command and send and receiving function MCU microcontroller under the control of MCU microcontroller, is connected with memory with communication module respectively; Memory is used to store each slave addresses of input, and offers the MCU microcontroller and read; The dial-up input switch is used for importing the address that each slave has set to memory.Therefore the address that the prior art main frame needs manual each slave of input to set needs an input unit, i.e. dial-up input switch is used for the slave addresses of having distributed to the memory input, so that correct input.Similarly, the slave of prior art comprises MCU microcontroller, communication module memory and dial-up input unit.Therefore the address that the prior art slave needs manual each slave of input to set needs an input unit, i.e. dial-up input switch.
According to the electrical characteristic of bus, the device address does not allow repetition, and the device address on the bus is unique.Yet, in manual assignment procedure, if accidentally with two slaves, for example the address of slave 1 and slave 3 all is set to for example 0x01, so according to bus characteristics, if main frame sends to the order that the address is the slave of 0x01, slave 1 and slave 3 can be received, and all can reply to main frame, so just causing in network at synchronization has two slaves sending message simultaneously, this will cause the communication failure of all terminals, and bus collision has just taken place, to such an extent as to whole system can not be worked.
What the automatic address under the master-slave communication pattern distributed presses on using.For example in an existing system, add, just might run into the problem that repeat the address from station equipment; Similarly, when changing the slave station that damages, also might run into the problem that repeat the address.
Summary of the invention
According to an aspect of the present invention, address distribution method in a kind of serial bus system is provided, described serial bus system comprises at least one main frame and at least one slave, described method comprises the following steps: that a. is provided with the electronics physical switch in described at least one slave each in universal serial bus, with the circuit on-off between next described slave of controlling each described slave and being adjacent; B. disconnect each the electronics physical switch in described at least one slave; C. be after the slave of the most adjacent address to be allocated distributes the address by described main frame, the electronic switch of closed this slave.
Preferably, repeating step c is until whole slaves are finished address assignment.
Preferably, in step b, main frame sends initialization command to slave, to disconnect the electronics physical switch.
Preferably, comprised the following steps: also that before step c main frame sends the address check order to slave, send to main frame with the slave of inspection matching addresses in the described address check order and confirm to reply.
Preferably, described address distribution method further comprises steps d: main frame regularly sends the step patrol and examine order to slave, describedly patrols and examines order and comprises each slave addresses.More preferably, describedly patrol and examine the address that order also is included as initial value.
Preferably, described address distribution method further comprises: e. increases at least one additional slave in described serial bus system; F. the described additional slave of initialization, disconnecting the electronics physical switch of described additional slave, and additional slave addresses is set is initial value; G. send to main frame with described additional slave for the matching addresses of initial value of patrolling and examining in the order and confirm to reply, preserve the described electronics physical switch of this address and closed described additional slave.
More preferably, repeating step g is until all additional slave is finished address assignment.
Preferably, whether described address distribution method further comprises and judges and effectively to distribute the address less than the step of slave quantity.
Preferably, the initial value of described slave addresses is 0xFF.
Preferably, described electronics physical switch is a relay.
According to a further aspect in the invention, provide a kind of main frame that is used for serial bus system, described serial bus system also comprises at least one slave, and described main frame comprises: controller; Communication module links to each other with controller, is used for sending data and receiving data from described at least one slave to described at least one slave; Memory links to each other with controller, is used for the address date of described at least one slave of access; And initialisation switch, link to each other with controller, be used for when described initialisation switch is activated, starting initialization operation.
Preferably, described controller comprises: the initialization command unit, be used for after initialisation switch is pressed, and send initialization command to described at least one slave; With the address assignment command sending unit, be used for sending the address assignment order to described at least one slave.
Preferably, described controller also comprises polling module, is used for regularly sending to described at least one slave patrolling and examining order, wherein saidly patrols and examines the address that order comprises described at least one slave.More preferably, describedly patrol and examine the address that order also is included as initial value.
Preferably, described controller also comprises the abnormality processing module, is used for when polling module finds to have additional slave to insert, and call address assignment commands unit sends the address assignment order to described additional slave.
Preferably, described controller also comprises the address check command sending unit, is used for sending the address check order to described at least one slave.
Preferably, described communication module is the RS485 communication module.
Preferably, described memory is a nonvolatile memory.
Preferably, described initialisation switch is the JP jumper switch or triggers key switch.
According to another aspect of the invention, provide a kind of slave that is used for serial bus system, described serial bus system also comprises at least one main frame, and described slave comprises: controller; Communication module links to each other with controller, is used for to described at least one main frame transmission data with from described at least one host receiving data; Memory links to each other with controller, is used for the address date of the described slave of access; The electronics physical switch is connected in the universal serial bus and is positioned at the downstream of communication module; And initialisation switch, link to each other with controller, be used for when described initialisation switch is activated, starting initialization operation.
Preferably, described controller comprises: the initialization command performance element is used for after initialisation switch is activated, or after receiving the initialization command that described at least one main frame sends, disconnects described electronics physical switch, and is initial value with self address setting; The address assignment command sending unit is used in the address assignment order of receiving that described at least one main frame sends, and uses the address in the address assignment order to replace the preceding address of distribution, and replys and reply, and connects the electronics physical switch simultaneously.
Preferably, described controller also comprises address check command response unit, is used for after receiving the address check order that described at least one main frame sends, and answer is replied.
Preferably, described communication module is the RS485 communication module.
Preferably, described memory is a nonvolatile memory.
Preferably, described initialisation switch is the JP jumper switch or triggers key switch.
Preferably, described electronics physical switch is a relay.
According to another aspect of the invention, there is provided a system comprising: at least one main frame; At least one slave; The universal serial bus that comprises two-wire; In wherein said at least one slave each comprises the electronics physical switch, and wherein the two-wire of universal serial bus is drawn from main frame, passes through each the electronics physical switch in described at least one slave successively.
Preferably, each in described at least one main frame comprises: console controller; Host computer communication module links to each other with console controller, is used for sending data and receiving data from described at least one slave to described at least one slave; Mainframe memory links to each other with console controller, is used for the address date of described at least one slave of access; With the main frame initialisation switch, link to each other with console controller, be used for when described main frame initialisation switch is activated, starting initialization operation.
Preferably, described console controller comprises: the initialization command unit, be used for after the main frame initialisation switch is pressed, and send initialization command to described at least one slave; With host address assignment commands transmitting element, be used for sending the address assignment order to described at least one slave.
Preferably, described console controller also comprises polling module, is used for regularly sending to described at least one slave patrolling and examining order, wherein saidly patrols and examines the address that order comprises described at least one slave.More preferably, describedly patrol and examine the address that order also is included as initial value.
Preferably, described console controller also comprises the abnormality processing module, is used for when polling module finds to have additional slave to insert, and call address assignment commands unit sends the address assignment order to described additional slave.
Preferably, console controller also comprises the address check command sending unit, is used for sending the address check order to described at least one slave.
Preferably, described host computer communication module is the RS485 communication module.
Preferably, described mainframe memory is a nonvolatile memory.
Preferably, described main frame initialisation switch is the JP jumper switch or triggers key switch.
Preferably, each in described at least one slave comprises: from machine controller; The slave communication module and links to each other from machine controller,, be used for sending data and from described at least one host receiving data to described at least one main frame; The slave memory and links to each other from machine controller, is used for the address date of the described slave of access; The electronics physical switch is connected in the universal serial bus and is positioned at the downstream of communication module; With the slave initialisation switch, and link to each other from machine controller, be used for when described slave initialisation switch is activated, starting initialization operation.
Preferably, describedly comprise from machine controller: the initialization command performance element, be used for after the slave initialisation switch is activated, or after receiving the initialization command that described at least one main frame sends, disconnect described electronics physical switch, and described slave addresses is set to initial value; With slave addresses assignment commands transmitting element, be used in the address assignment order of receiving that described at least one main frame sends, use the address in the address assignment order to replace the preceding address of distribution, and reply and reply, connect the electronics physical switch simultaneously.
Preferably, described controller also comprises address check command response unit, is used for after receiving the address check order that described at least one main frame sends, and answer is replied.
Preferably, described slave communication module is the RS485 communication module.
Preferably, described slave memory is a nonvolatile memory.
Preferably, described slave initialisation switch is the JP jumper switch or triggers key switch.
Preferably, described electronics physical switch is a relay.
Utilize the present invention, only need start the initialization key on slave when system adds new slave, main frame can be finished the address assignment to the slave of new insertion, and does not influence the communication of other slaves.The present invention can realize in serial bus system that automatic address distributes, thereby has avoided manually being provided with address error rate height, inefficient problem.
Description of drawings
In the time of the detailed description of disclosed embodiment below the thinking of following accompanying drawing, can obtain the present invention is better understood, wherein:
Fig. 1 a is the network configuration of RS485 bus of the prior art;
Fig. 1 b is the structural representation of main frame of the prior art;
Fig. 1 c is the structural representation of slave of the prior art;
Fig. 2 is the network configuration of intelligent addresses distribution system according to an embodiment of the invention;
Fig. 3 is the structural representation of main frame according to an embodiment of the invention;
Fig. 4 is the structural representation of slave according to an embodiment of the invention;
Fig. 5 is the flow chart of intelligent addresses distribution method according to an embodiment of the invention;
Fig. 6 is the flow chart of intelligent addresses distribution method according to another embodiment of the invention; And
Fig. 7 is the flow chart of intelligent addresses distribution method according to another embodiment of the invention.
Fig. 8 is the initialization flowchart of slave according to an embodiment of the invention.
Embodiment
In an embodiment of the present invention, be example with the RS485 bus, describe the present invention in detail.Yet, should be appreciated that the present invention is not limited in the RS485 bus, and can advantageously use other bus, for example the RS422 bus.
Fig. 2 is the network configuration of intelligent addresses distribution system according to an embodiment of the invention.As shown in the figure, system comprises a main frame 100, a plurality of slave 200 and RS485 bus 300, and wherein main frame 100 is command originator, and slave 200 is reception and the executors that belong to order, and both are by transmission and the reception of RS485 bus connection to finish instruction.Each slave 200 is provided with electronics physical switch 205.After the twisted-pair feeder of RS485 bus is drawn from main frame 100, introduce the input of the electronics physical switch of first slave earlier, from the go between input of electronics physical switch of second slave of the output of the electronics physical switch of first slave, by that analogy, finish networking again.
Particularly, as shown in Figure 3, wherein show the structural representation of main frame 100 according to an embodiment of the invention, main frame 100 comprises console controller 101 (for example main frame MCU microcontroller), host communication module 102, mainframe memory 103 and main frame initialisation switch 104.Wherein, host communication module 102 is connected with main frame MCU microcontroller 101 and twisted-pair feeder respectively, carries out normal the transmission and receiving function under the control of main frame MCU microcontroller 101; Main frame MCU microcontroller 101 is connected with mainframe memory 103 with host computer communication module 102 respectively, be used to finish initialization action, automatically distribute each slave addresses, the slave addresses of having distributed is preserved, and the regular visit slave, when finding to have new slave to insert, read the slave addresses of having distributed in the mainframe memory 103, automatically increase in order, produce new address, and distribute to the slave of this new access; Mainframe memory 103 is used for automatically preserving distributing to the address of each corresponding slave by main frame 100, and offers main frame MCU microcontroller 101 and read; Main frame initialisation switch 104 links to each other with main frame MCU microcontroller 101, is used for starting initialization action in the back that is pressed.Initialization action comprises: all slave addresses are set at a predetermined value, such as 0xFF, go into main frame memory 103 for all slaves in the net distribute addresses and recorded and stored.In this embodiment, main frame initialisation switch 104 is JP jumper switchs or triggers key switch that mainframe memory 103 is flash memories.Yet should be appreciated that main frame initialisation switch 104 is not limited to the switch of the above-mentioned type, also can be the switch of any adequate types such as toggle switch.Similarly, mainframe memory 103 also is not limited to the memory of the above-mentioned type, and can be the memory of any adequate types.Mainframe memory is nonvolatile memory preferably, includes but not limited to floppy disk, random access storage device (RAM), read-only memory (ROM), Erasable Programmable Read Only Memory EPROM (EPROM or flash memory) etc.Similarly, console controller 101 also is not limited to the MCU microcontroller, and can be the controller of any adequate types.In addition, console controller 101 can also connect a warning device (not shown), is used for sending sound and/or light and reports to the police when communication failure.
Console controller can comprise following functional module: the initialization command unit, be used for after the main frame initialisation switch is pressed, and send initialization command to slave; The address assignment command sending unit is used for sending the address assignment order to slave.Console controller can also comprise polling module, is used for regularly sending to slave patrolling and examining order.Console controller can also comprise the abnormality processing module, is used for when polling module finds to have additional slave to insert, and call address assignment commands unit sends the address assignment order to additional slave.Console controller can also comprise the address check command sending unit, is used for sending the address check order to slave.
Fig. 4 is the structural representation of slave 200 according to an embodiment of the invention.As shown in the figure, slave 200 comprises from machine controller 201, such as MCU microcontroller, slave communication module 202, slave memory 203, electronics physical switch 205 and slave initialisation switch 204.In this embodiment, electronics physical switch 205 be relay (normally closed closing, selecting normally closed purpose is to work as slave when not having start or fault, can not have influence on the communication of other slaves, being equivalent to this slave is not articulated on the bus), the slave initialisation switch is the JP wire jumper.Should be understood that electronics physical switch 205 and slave initialisation switch 204 are not limited to the above-mentioned type, and can be any suitable types.Similarly, also be not limited to the MCU microcontroller from machine controller 201, and can be the controller of any adequate types.Slave communication module 202 links to each other with twisted-pair feeder with slave MCU microcontroller 201 respectively, and twisted-pair feeder is through relay 205 back outputs; Slave memory 203 is used to store the address that slave 200 is assigned with; Relay 205 is carried out break-make under the control of slave MCU microcontroller 201, its acquiescence attitude is closed, like this when break down from node and cannot start shooting or cannot be initialized the time, not influence the normal communication of other equipment; Slave initialisation switch 204 is the JP wire jumper in this embodiment, is used for the control initialization address based on slave MCU microcontroller 201, is Default Value such as need initialization address after maintenance of equipment.Because relay 205 is positioned at the downstream of slave communication module 202, like this, when relay 205 disconnects, just disconnected and the communicating by letter of next slave, but this slave still can be by the slave communication module 20 and the main-machine communication of this slave.
Can comprise following functional module from machine controller: the initialization command performance element is used for after initialisation switch is activated, or after receiving the initialization command that main frame sends, disconnects the electronics physical switch, and is initial value with self address setting; The address assignment command sending unit is used in the address assignment order of receiving that main frame sends, and uses the address in the address assignment order to replace the preceding address of distribution, and replys and reply, and connects the electronics physical switch simultaneously.Can also comprise address check command response unit from machine controller, be used for after receiving the address check order that main frame sends that answer is replied.
Fig. 5 is the flow chart of intelligent addresses distribution method according to an embodiment of the invention.As shown in the figure, system works starts from step 502, and this moment, main frame and slave all began the operation that powers on.In step 504, press main frame initialisation switch 104, the initialization command unit of the console controller 101 of main frame 100 sends initialization command to slave 200, make the initialization command performance element action from machine controller of all slaves 200, disconnect relay 205, and all set slave addresses for a predetermined value, for example 0xff.Send initialization command in one embodiment continuously 20 times, receive to guarantee slave.Then, in step 506, the address assignment command sending unit of the console controller 101 of main frame 100 sends to slave 200 effectively distributes the address, after the address assignment command sending unit from machine controller of the slave 200 of unallocated address is received, using this distribution address replacement 0xff and closing relay to reply replys, if reply, then enter step 508, the scheduled wait time is replied or arrived to the wait slave, such as 100ms, if reply then will effectively distribute the address to increase (such as increasing by 1) by predefined procedure, and enter step 506 once more, at this moment previous slave of distributing the address is also received the distribution address of main frame to the slave transmission, but the comparison address is not own addresses distributed, so do not respond, and and the immediate another one slave of this slave from the address assignment command sending unit of machine controller after receiving the order that distributes the address, preserve this address and closing relay and reply and reply.If, think that then whole slaves all have been assigned with the address in repeatedly (for example, 10 times) still no response of step 506 circulation, then enter step 510, the automatic address assigning process finishes fully.
Fig. 6 is the flow chart of intelligent addresses distribution method according to another embodiment of the invention.As shown in the figure, system works starts from step 602, and this moment, main frame and slave all began the operation that powers on.In step 604, main frame 100 in the system need to judge whether system initialization by checking main frame initialisation switch 104 (jumper switch state or key-press status), for example, system is provided with when the main frame initialisation switch is 1 automatically, need carry out initialization, the main frame initialisation switch is 0 o'clock, does not need to carry out initialization.That is to say, if the main frame initialisation switch is 1, then system enters step 610, the initialization command unit continuous several times of the console controller 101 of main frame 100 sends address assignment mass-sending order to slave 200 at this moment, makes the initialization command performance element action from machine controller of all slaves 200, disconnection relay 205, and all set slave addresses for a predetermined value, for example 0xff has sent 20 times in one embodiment continuously, receives to guarantee slave.If the main frame initialisation switch is 0, then system enters step 606, and this moment, the slave addresses formation that has distributed was read from designated storage area by system, and then entered step 608, enters the proper communication program, and slave is patrolled and examined.The system that should be appreciated that also can carry out opposite setting.Then, in step 612, because original bus all is cut off physically, it is unique be connected with main frame (nearest node) that but a node is always arranged, so the address check command sending unit of the console controller 101 of main frame 100 sends the address check order to a nearest slave 200, the destination address of wherein carrying is 0xff, the address is to reply after the address check command response unit from machine controller of the slave of 0xff is received to reply, if and through a scheduled time, do not receive replying of slave such as 30 seconds main frames, then report to the police, otherwise just enter step 614, a scheduled time, for example 100ms are replied or waited for to the wait slave.If in step 614, slave is replied, and then enters step 616, and system sends effective slave addresses of preparing distribution, otherwise, return step 612.In step 618, the address assignment command sending unit of the console controller 101 of main frame sends to slave effectively distributes the address, wherein carry formal addresses distributed, after the address assignment command sending unit from machine controller of the slave 200 of unallocated address is received, using this formal addresses distributed replacement 0xff and closing relay 205 to reply replys, if reply, then will effectively distribute the address to press predefined procedure (such as increasing by 1), and enter step 616 once more, at this moment previous slave of distributing the address is also received the distribution address of main frame to the slave transmission, but the comparison address is not own addresses distributed, so do not respond, and and the immediate another one slave of this slave from the address assignment command sending unit of machine controller after receiving the order that distributes the address, preserve this address and closing relay 205 and reply and reply.If, think that then whole slaves all have been assigned with the address in repeatedly (for example, 10 times) still no response of step 618 circulation, then enter step 620, system address distributes end, preserves the slave maximum address and the prompting that distribute and is allocated successfully automatically.
Fig. 7 is the flow chart of intelligent addresses distribution method according to another embodiment of the invention.As shown in the figure, system works starts from step 702, and this moment, main frame and slave all began the operation that powers on.In step 704, main frame 100 in the system need to judge whether system initialization by checking main frame initialisation switch 104 (jumper switch state or key-press status), for example, system is provided with when initialisation switch is 1 automatically, need carry out initialization, the main frame initialisation switch is 0 o'clock, does not need to carry out initialization.That is to say that if the main frame initialisation switch is 1, then system enters step 710, this moment, system began to read the total quantity of slave.If the main frame initialisation switch is 0, then system enters step 706, and this moment, the slave addresses formation that has distributed was read from designated storage area by system, and then entered step 708, enters the proper communication program, and slave is patrolled and examined.The system that should be appreciated that also can carry out opposite setting.In step 712, the initialization command unit continuous several times of the console controller 101 of main frame 100 sends address assignment mass-sending order to slave 200 at this moment, make the initialization command performance element action from machine controller of all slaves, disconnect relay 205, and all set slave addresses for 0xff, sent continuously in one embodiment 20 times, received to guarantee slave.Then, in step 714, because original bus all is cut off physically, it is unique be connected with main frame (nearest node) that but a node is always arranged, so the address check command sending unit of the console controller 101 of main frame 100 sends the address check order to a nearest slave 200, the destination address of wherein carrying is 0xff, the address is to reply after the address assignment command sending unit from machine controller of the slave of 0xff is received to reply, if and through a scheduled time, do not receive replying of slave such as 30 seconds main frames, then report to the police, otherwise just enter step 716, a scheduled time, for example 100ms are replied or waited for to the wait slave.If in step 716, slave is replied, and then enters step 718, otherwise, return step 714.In step 718, the address assignment command sending unit of the console controller 101 of main frame sends effective slave addresses of preparing distribution to slave, wherein carry formal addresses distributed, after the address assignment command sending unit from machine controller of the slave 200 of unallocated address is received, use this formal addresses distributed replacement 0xff and closing relay 205 to reply and reply.In step 720, system waits for that once more slave is replied or the time of 100ms, if no response then returns 716, otherwise enters step 722.In step 722, and system's judgement " effectively distribute address＜SlaveNum〉" whether set up, if set up, then effective address is increased by 1, and enter step 720 once more, otherwise, enter step 724, system address distributes end, preserves the slave maximum address and the prompting that distribute and is allocated successfully automatically.
Fig. 8 is the initialization flowchart of slave according to an embodiment of the invention.When inserting new slave 200 in network, in step 802, slave 200 powers on.And then in step 804, slave 200 need to judge whether system initialization by checking slave initialisation switch 204, for example, system is provided with when the slave initialisation switch is 1 automatically, need carry out initialization, the slave initialisation switch is 0 o'clock, does not need to carry out initialization.That is to say that if the slave initialisation switch is 1, then system enters step 610, this moment, the initialization command performance element from machine controller of slave was set at the Default Value value with its memory 203, and for example 0xff, and disconnection relay 205 is waited for and distributed the address.If the slave initialisation switch is 0, then system enters step 806, judges whether the address is distributed, and then enters step 808 and change the normal communication pattern over to.The system that should be appreciated that also can carry out opposite setting.
When needing to insert new slave 200 in the legacy network, only need the initialisation switch 204 of slave is opened, recovering acquiescence 0xff is provided with, this slave just can be waited for the address assignment order, disconnect relay 205 switches, directly insert the new network that inserts then and press main frame initialisation switch 104 once more, the intelligent addresses that just can finish automatically again whole slaves distributes.Preferably, when inserting new slave, just need not to press once more main frame initialisation switch 104 and can distribute the address the slave of new insertion.For this reason, the polling module of the console controller of main frame can be arranged in and add 0xFF equipment search command in the order that sends when patrolling and examining.After main frame also can be arranged in all normal communications end, when bus is idle, send out the order of an inquiry 0xFF address separately again.The cycle of normal communication according to different system conditions and difference can be 10 seconds such as this cycle.Two kinds of methods can be used to the slave of new insertion is distributed the address.Be that example describes with the scheme that adds 0xFF equipment search command in the order that utilizes the main frame regular visit, when patrolling and examining, sends below.At first the initialisation switch of new slave is opened, recovering acquiescence 0xff is provided with, when main frame is patrolled and examined, when sending 0xFF equipment search command, the polling module of console controller will receive response, then showing has new slave to insert, then the abnormality processing module invokes address assignment command unit of the console controller of main frame begins new slave is distributed the address, up to all new slaves have been assigned.In one embodiment, main frame order on the basis of distributing address number increases address digit, distributes to the slave that increases newly.The order of patrolling and examining that above-mentioned main frame sent can regularly send, and the destination address of wherein carrying is respectively each slave addresses, also comprises a 0xff address.How many addresses that utilizes this preferred embodiment not need to know the current network the inside is, main frame can intelligence be finished the insertion of new slave, and does not influence the communication of other slaves.
Further specify the present invention below in conjunction with communication protocol stack.Wherein data frame format is made up of 23 bytes, and concrete data frame format is as follows:
| ?STX | CMD | Dest_Addr | Source_Addr | DATA | CHECK | ETX |
Wherein each byte is represented respectively:
STX:0x02, this value is an exemplary value only, should be appreciated that it can is other value;
CMD: type of data format;
Dest Addr: the destination address that data send;
Source Addr: the source address that data send;
The DATA:16 byte sends data;
CHECK:CRC16 verification, CRC initial value are 0xFFFF;
ETX:0x03, this value is an exemplary value only, should be appreciated that it can is other value.
Suppose to have a main frame (host), three slaves (slave) 1,2,3 are formed a Control Network, and as exemplary embodiment, main frame is that the slave addresses distributed is from 0x01.The normality of the relay in each slave is closed attitude.The address that should be appreciated that slave is not limited in from 0x01, and it can be selected among 0x00～0xFF any one.
When not inserting new slave in this network, if the initialisation switch on the main frame is pressed, then main frame enters initialization procedure automatically:
1, main frame sends initialization command:
STX+0 * 5A+0 * FF+0 * 00+Data+CRC16+ETX (Data is any)
Continuously sending 5 seconds, after three slaves are all received effective information, postpone 3 seconds disconnection relays, is 0xff with self address setting simultaneously.
2, main frame sends the address check order subsequently
STX+0 * 5B+0 * FF+0 * 00+Data+CRC16+ETX (Data is any)
At this moment,, has only slave 1 to link to each other with main frame, can receive this address check order, and the address is 0xFF that therefore, slave 1 is replied to the main frame transmission by its slave communication module because all relays all disconnect:
STX+0 * A5+0 * 00+0 * FF+Data+CRC16+ETX (Data is any)
Wherein, destination address 0x 00 position is a host address, and source address 0xFF position is a slave addresses.
3, after main frame receives that slave 1 is replied, send the address of record assignment commands:
STX+0 * 5C+0 * 01+0 * 00+Data+CRC16+ETX (Data is any)
Wherein destination address is 0x01, and expression is begun to distribute by 0x01;
After slave 1 is received this order, send affirmation to main frame and reply:
STX+0 * A6+0 * 00+0 * 01+Data+CRC16+ETX (Data is any)
And the while closing relay, connect next slave 2.
4, after main frame receives that slave 2 is replied, send the address of record assignment commands:
STX+0 * 5C+0 * 02+0 * 00+Data+CRC16+ETX (Data is any)
After slave 1 is received this order,, find that the address does not match, ignore and do not respond wherein address and the address contrast that oneself has been assigned with; After slave 2 is received, preserve this address (be about to 0xff and replace with this address) and send affirmation and reply to main frame:
STX+0 * A6+0 * 00+0 * 02+Data+CRC16+ETX (Data is any)
And the while closing relay, connect next slave 3.
5, after main frame receives that slave 3 is replied, send the address of record assignment commands:
STX+0 * 5C+0 * 03+0 * 00+Data+CRC16+ETX (Data is any)
After slave 1, slave 2 were received this order, wherein address and the address that oneself is assigned with did not match, and ignored and did not respond; After slave 3 is received, preserve this address and send affirmation and reply to main frame:
STX+0 * A6+0 * 00+0 * 03+Data+CRC16+ETX (Data is any)
And while closing relay.
6, main frame sends the address of record assignment commands to slave once more:
STX+0 * 5C+0 * 04+0 * 00+Data+CRC16+ETX (Data is any)
Send 10 times continuously, do not respond, address assignment finishes.
Should be understood that the form of address assignment order is not limited to above-mentioned form, and can be the form that is fit to arbitrarily, for example can adopt with the Data position and carry the form that distributes the address.
STX+0×5C+0×ff+0×00+Addr+CRC16+ETX
The address is after the slave of 0xff is received this order, uses Addr to replace 0xff, and sends and confirm to reply, and connects next slave communication simultaneously
STX+0 * A6+0 * 00+Addr+Data+CRC16+ETX (Data is any)
Next, main frame sends the address assignment order once more:
STX+0×5C+0×ff+0×00+(Addr+1)+CRC16+ETX
After first slave received, contrast 0xff was not the address of oneself, does not therefore reply, and after second slave received, discovery was issued oneself, then used Addr+1 to replace 0xff, and replied, and connected next slave simultaneously
STX+0 * A6+0 * 00+ (Addr+1)+Data+CRC16+ETX (Data is any)
Also can realize continuous address assignment by this way.
It is to be further understood that if for simplified design, in one embodiment, after initialization step, do not carry out address check, and can directly carry out address assignment.In another embodiment, can before each address assignment, all carry out the primary address inspection.
When order after the slave in this network 3 inserts a new slave 4, at first before inserting slave 4, press the initialisation switch of slave 4, the acquiescence 0xff that recovers to dispatch from the factory is provided with, and directly inserts network then.After slave 4 powers on, be checked through initialisation switch and be pressed, then slave 4 starts initialization, disconnects relay, waits for address assignment.
1, main frame can insert the order of searching the 0xff slave when patrolling and examining:
STX+0 * 5B+0 * FF+0 * 00+Data+CRC16+ETX (Data is any)
After slave 1,2,3 was received this order, wherein address and the address that oneself is assigned with did not match, and ignore; After slave 4 is received, send affirmation to main frame and reply:
STX+0 * A5+0 * 00+0 * FF+Data+CRC16+ETX (Data is any)
2, after main frame receives that slave 4 is replied, send the address of record assignment commands:
STX+0 * 5C+0 * 04+0 * 00+Da ta+CRC16+ETX (Data is any)
After slave 1, slave 2 and slave 3 were received this order, wherein address and the address that oneself is assigned with did not match, and ignore; After slave 4 is received, preserve this address and send affirmation and reply to main frame:
STX+0 * A6+0 * 00+0 * 04+Data+CRC16+ETX (Data is any)
3, main frame sends the address of record assignment commands to slave once more:
STX+0 * 5C+0 * 05+0 * 00+Data+CRC16+ETX (Data is any)
Send 10 times continuously, do not respond, address assignment finishes.
Between slave in this network 1 and slave 2, increase a new slave 5, when between slave 3 and slave 4, increasing simultaneously a new slave 6, at first before inserting slave 5, slave 6, press the initialisation switch of slave 5, slave 6, recovery is dispatched from the factory and is given tacit consent to the 0xff setting, directly inserts network then.After slave 5, slave 6 power on, be checked through initialisation switch and be pressed, then slave 5, slave 6 start initialization, disconnect relay, wait for address assignment.Because slave 6 is positioned at after the slave 5,, that is to say that slave that to have only a no more than address be 0xff links to each other with main frame the moment in the system so under the situation that the relay of slave 5 has disconnected, the address that links to each other with main frame is that the slave of 0xff has only slave 5.
1, main frame can insert the order of searching the 0xff slave when patrolling and examining:
STX+0 * 5B+0 * FF+0 * 00+Data+CRC16+ETX (Data is any)
After slave 1 was received this order, wherein address and the address that oneself is assigned with did not match, and ignore; After slave 5 is received, send affirmation to main frame and reply:
STX+0 * A5+0 * 00+0 * FF+Data+CRC16+ETX (Data is any)
2, after main frame receives that slave 5 is replied, send the address of record assignment commands:
STX+0 * 5C+0 * 05+0 * 00+Data+CRC16+ETX (Data is any)
After slave 1 was received this order, wherein address and the address that oneself is assigned with did not match, and ignore; After slave 5 is received, preserve this address and send affirmation and reply to main frame:
STX+0 * A6+0 * 00+0 * 05+Data+CRC16+ETX (Data is any)
And the while closing relay, connect slave 6.
3, after main frame receives that slave 5 is replied, send the address of record assignment commands:
STX+0 * 5C+0 * 06+0 * 00+Data+CRC16+ETX (Data is any)
After slave 1, slave 5, slave 2 and slave 3 were received this order, wherein address and the address that oneself is assigned with did not match, and ignore; After slave 6 is received, preserve this address and send affirmation and reply to main frame:
STX+0 * A6+0 * 00+0x06+Data+CRC16+ETX (Data is any)
4, main frame sends the address of record assignment commands to slave once more:
STX+0 * 5C+0 * 07+0 * 00+Data+CRC16+ETX (Data is any)
Send 10 times continuously, do not respond, address assignment finishes.
From above exemplary explanation as can be seen, no matter when the electronic switch of which slave disconnects, in the slave of unallocated address, constantly have only one can with main-machine communication, and this slave must be the unallocated address slave the most contiguous with main frame.
Should be understood that the present invention is not limited to disclosed concrete form in the above-mentioned preferred embodiment.For example, the present invention is applicable to that also many masters how from system, in such system, will have a main website to finish address assignment, and remaining main website can not participate in address assignment or be taken as some special slave stations (having certain special mark) and treat.
Although the particular demonstration of the present invention of reference has also been described the present invention, but those of ordinary skill in the art will understand, under situation without departing from the spirit and scope of the present invention, can carry out aforementioned therein and other form and variations in detail, include but not limited to interpolation, minimizing or modified elements or substitute, and/or add, reduce or revise the step of carrying out with identical or different order with equivalent.
Claims (44)
1. the address distribution method in the serial bus system, described serial bus system comprises at least one main frame and at least one slave, described method comprises the following steps:
A. in universal serial bus, the electronics physical switch is set, with the circuit on-off between next described slave of controlling each described slave and being adjacent in described at least one slave each;
B. disconnect each the electronics physical switch in described at least one slave;
C. be after the slave of the most adjacent address to be allocated distributes the address by described main frame, the electronic switch of closed this slave.
2. address distribution method according to claim 1, wherein repeating step c is until whole slaves are finished address assignment.
3. address distribution method according to claim 1, wherein in step b, main frame sends initialization command to slave, to disconnect the electronics physical switch.
4. address distribution method according to claim 1 comprised the following steps: also before step c that wherein main frame sends the address check order to slave, sent to main frame with the slave of inspection matching addresses in the described address check order and confirmed to reply.
5. address distribution method according to claim 1 further comprises steps d: main frame regularly sends the step patrol and examine order to slave, describedly patrols and examines order and comprises each slave addresses.
6. address distribution method according to claim 5 is is wherein saidly patrolled and examined the address that order also is included as initial value.
7. address distribution method according to claim 6 further comprises:
E. in described serial bus system, increase at least one additional slave;
F. the described additional slave of initialization, disconnecting the electronics physical switch of described additional slave, and additional slave addresses is set is initial value;
G. send to main frame with described additional slave for the matching addresses of initial value of patrolling and examining in the order and confirm to reply, preserve the described electronics physical switch of this address and closed described additional slave.
8. address distribution method according to claim 7, wherein repeating step g is until all additional slave is finished address assignment.
9. whether address distribution method according to claim 1 further comprises and judges and effectively to distribute the address less than the step of slave quantity.
10. address distribution method according to claim 1, the initial value of wherein said slave addresses is 0xFF.
11. address distribution method according to claim 1, wherein said electronics physical switch is a relay.
12. a main frame that is used for serial bus system, described serial bus system also comprises at least one slave, and described main frame comprises
Controller;
Communication module links to each other with controller, is used for sending data and receiving data from described at least one slave to described at least one slave;
Memory links to each other with controller, is used for the address date of described at least one slave of access; With
Initialisation switch links to each other with controller, is used for starting when described initialisation switch is activated initialization operation.
13. main frame according to claim 12, wherein said controller comprises:
The initialization command unit is used for after initialisation switch is pressed, and sends initialization command to described at least one slave;
The address assignment command sending unit is used for sending the address assignment order to described at least one slave.
14. main frame according to claim 13, wherein said controller also comprises polling module, is used for regularly sending to described at least one slave patrolling and examining order, wherein saidly patrols and examines the address that order comprises described at least one slave.
15. main frame according to claim 14 is is wherein saidly patrolled and examined the address that order also is included as initial value.
16. main frame according to claim 15, wherein said controller also comprises the abnormality processing module, is used for when polling module finds to have additional slave to insert, and call address assignment commands unit sends the address assignment order to described additional slave.
17. main frame according to claim 13, wherein said controller also comprises the address check command sending unit, is used for sending the address check order to described at least one slave.
18. main frame according to claim 12, wherein said communication module are the RS485 communication modules.
19. main frame according to claim 12, wherein said memory is a nonvolatile memory.
20. main frame according to claim 12, wherein said initialisation switch are the JP jumper switchs or trigger key switch.
21. a slave that is used for serial bus system, described serial bus system also comprises at least one main frame, and described slave comprises
Controller;
Communication module links to each other with controller, is used for to described at least one main frame transmission data with from described at least one host receiving data;
Memory links to each other with controller, is used for the address date of the described slave of access;
The electronics physical switch is connected in the universal serial bus and is positioned at the downstream of communication module; With
Initialisation switch links to each other with controller, is used for starting when described initialisation switch is activated initialization operation.
22. slave according to claim 21, wherein said controller comprises:
The initialization command performance element is used for after initialisation switch is activated, or after receiving the initialization command that described at least one main frame sends, disconnects described electronics physical switch, and is initial value with self address setting;
The address assignment command sending unit is used in the address assignment order of receiving that described at least one main frame sends, and uses the address in the address assignment order to replace the preceding address of distribution, and replys and reply, and connects the electronics physical switch simultaneously.
23. slave according to claim 22, wherein said controller also comprise address check command response unit, are used for after receiving the address check order that described at least one main frame sends, answer is replied.
24. slave according to claim 21, wherein said communication module are the RS485 communication modules.
25. slave according to claim 21, wherein said memory is a nonvolatile memory.
26. slave according to claim 21, wherein said initialisation switch are the JP jumper switchs or trigger key switch.
27. slave according to claim 21, wherein said electronics physical switch is a relay.
28. a system, described system comprises:
At least one main frame;
At least one slave;
The universal serial bus that comprises two-wire;
In wherein said at least one slave each comprises the electronics physical switch, and wherein the two-wire of universal serial bus is drawn from main frame, passes through each the electronics physical switch in described at least one slave successively.
29. system according to claim 28, each in wherein said at least one main frame comprises
Console controller;
Host computer communication module links to each other with console controller, is used for sending data and receiving data from described at least one slave to described at least one slave;
Mainframe memory links to each other with console controller, is used for the address date of described at least one slave of access; With
The main frame initialisation switch links to each other with console controller, is used for starting when described main frame initialisation switch is activated initialization operation.
30. system according to claim 29, wherein said console controller comprises:
The initialization command unit is used for after the main frame initialisation switch is pressed, and sends initialization command to described at least one slave;
Host address assignment commands transmitting element is used for sending the address assignment order to described at least one slave.
31. system according to claim 30, wherein said console controller also comprises polling module, is used for regularly sending to described at least one slave patrolling and examining order, wherein saidly patrols and examines the address that order comprises described at least one slave.
32. system according to claim 31 wherein saidly patrols and examines the address that order also is included as initial value.
33. system according to claim 32, wherein said console controller also comprises the abnormality processing module, is used for when polling module finds to have additional slave to insert, and call address assignment commands unit sends the address assignment order to described additional slave.
34. system according to claim 29, wherein said console controller also comprises the address check command sending unit, is used for sending the address check order to described at least one slave.
35. system according to claim 29, wherein said host computer communication module is the RS485 communication module.
36. system according to claim 29, wherein said mainframe memory is a nonvolatile memory.
37. system according to claim 29, wherein said main frame initialisation switch are the JP jumper switchs or trigger key switch.
38. system according to claim 28, each in wherein said at least one slave comprises
From machine controller;
The slave communication module and links to each other from machine controller,, be used for sending data and from described at least one host receiving data to described at least one main frame;
The slave memory and links to each other from machine controller, is used for the address date of the described slave of access;
The electronics physical switch is connected in the universal serial bus and is positioned at the downstream of communication module; With
The slave initialisation switch and links to each other from machine controller, is used for starting when described slave initialisation switch is activated initialization operation.
39., wherein saidly comprise from machine controller according to the described system of claim 38:
The initialization command performance element is used for after the slave initialisation switch is activated, or after receiving the initialization command of described at least one main frame transmission, disconnect described electronics physical switch, and described slave addresses is set to initial value;
Slave addresses assignment commands transmitting element is used in the address assignment order of receiving that described at least one main frame sends, and uses the address in the address assignment order to replace the preceding address of distribution, and replys and reply, and connects the electronics physical switch simultaneously.
40. according to the described system of claim 39, wherein said controller also comprises address check command response unit, is used for after receiving the address check order that described at least one main frame sends, answer is replied.
41. according to the described system of claim 38, wherein said slave communication module is the RS485 communication module.
42. according to the described system of claim 38, wherein said slave memory is a nonvolatile memory.
43. according to the described system of claim 38, wherein said slave initialisation switch is the JP jumper switch or triggers key switch.
44. according to the described system of claim 38, wherein said electronics physical switch is a relay.
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| CN200810133595A CN101635637A (en) | 2008-07-21 | 2008-07-21 | Method and system for distributing intelligent addresses based on serial bus |
| PCT/CN2008/001814 WO2010009584A1 (en) | 2008-07-21 | 2008-10-29 | Method and system for smart address assignment based on serial bus |
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| CN200810133595A CN101635637A (en) | 2008-07-21 | 2008-07-21 | Method and system for distributing intelligent addresses based on serial bus |
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