CN101617474A - Electronic switch network - Google Patents
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- CN101617474A CN101617474A CN200780049542A CN200780049542A CN101617474A CN 101617474 A CN101617474 A CN 101617474A CN 200780049542 A CN200780049542 A CN 200780049542A CN 200780049542 A CN200780049542 A CN 200780049542A CN 101617474 A CN101617474 A CN 101617474A
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Abstract
Disclosed the system and method that switches electronic signal.This switching can be hanged down loss and lower peak voltages is implemented.This handover scheme is suitable for switching the RF signal, for example, and can be used on such as in wireless system, terminal and the mobile phone.One example embodiment relates to transmission/reception switched system that CMOS makes up.This system comprises one or more delivery port, and each port is coupled to input/output end port via transfer path separately; And one or more receiving ports, each port is coupled to described input/output end port via RX path separately.Each RX path comprises commutation circuit, and described commutation circuit comprises transistor and the inductor in parallel with described transistor.Described commutation circuit is suitable for when transistor is in conducting state separately receiving port and described input/output end port being isolated at least substantially, and operatively receiving port separately is coupled to described input/output end port when transistor is in off-state.
Description
Related application
The application require on November 16th, 2006 application, name is called the 60/866th, No. 147 U.S. Provisional Application of " electronic switch network "; On May 31st, 2007 applied for, name is called the 11/809th, No. 203 U.S.'s non-provisional application of " electronic switch network "; On November 16th, 2006 applied for, name is called the 60/866th, No. 144 U.S. Provisional Application of " distributed multi-stage amplifier "; And on November 16th, 2006 application, name is called the 60/866th, No. 139 U.S. Provisional Application No. of " pulse amplifier ".Above-mentioned each application merges into a single whole at this by reference.
Technical field
The present invention relates to electronics and RF and switch the field.Application includes but not limited to wireless system, microwave components, transceiver, cmos amplifier, reaches portable electron device.
Background technology
Signal strength signal intensity in switch in simulation and radio frequency (RF) application must be handled on a large scale usually.Especially, conveyer must be handled very high crest voltage sometimes.Because signal strength signal intensity can surpass the puncture voltage of device, this may be a problem in the field of switch designs.Another problem is that available control voltage is much smaller than signal strength signal intensity.This makes and is difficult to switch is remained on the position that opens or closes.The switch of wireless phone is exactly the obvious example that embodies these problems.For example, in GSM mobile handset, maximum signal strength signal intensity can be up to 35dBm.Cause the crest voltage of 17.88V by the transmission of 50Ohm system, and control voltage and maximum can to utilize supply voltage be respectively 2.5V and 3.5V.
Fig. 1 has demonstrated a kind of of the oldest circuit that is used for handling the problems referred to above.In the case, disperse PIN diode as switching device.The diode of this type presents the good characteristic with big puncture voltage.Direct current (DC) voltage is used for forward or backwards biased diode to form low or high impedance.The quarter-wave matching network is required disconnection port and conducting port isolation.This scheme is worked in multiport system well.But, the high-performance PIN diode is not easy to be integrated.And, need a large amount of passive devices so that bias voltage and coupling to be provided.Another prominent question is the electric current that forward biased diode needs.Because design can be configured to make conducting diode only to be used in the transfer mode, this is acceptable in simple transmission-receiving system.But, multiport system also needs electric current in receiving mode.
Another common scheme as shown in Figure 2.In this case, field-effect transistor (FETs) is used as switching device.GaAs (GaAs) pseudomorphic high electron mobility transistor (PHEMTs) because its low-loss and high-breakdown-voltage, is the most normal use.Yet, the only about 16V of puncture voltage, it is too low and can't be by the high signal level of itself operating gsm system.And the control voltage of 2.5V will cause the transistor turns that disconnects during the negative amplitude of oscillation of output signal.This scheme that addresses these problems is to adopt the FETs of a plurality of series connection, as shown in Figure 3.This is assigned to signal voltage on each transistor effectively equably.This this solution can be operated high signal level when introducing can be accepted waste.It also has the advantage near the zero current requirement, can use at multiport to be configured, and can be integrated on the single naked core (die).An one shortcoming need to be a large amount of control signals.On GaAs, lack the compensated crystal Manifold technology and mean that any logic function will draw a large amount of electric currents.For this reason, frequent independently CMOS control chip uses with GaAs switch naked core.And, adopt outside technology to mean that switch can't combine with other functions in mobile phone.
Attempted using CMOS to have limited success as handoff technique.In some cases, used the DC converter to overcome the restriction of control signal.But, the high loss of substrate has been unacceptable.Silicon on sapphire (SOS) and other outside technology have overcome this problem, but expensively make it be unsuitable for integrating other functions.
Summary of the invention
One embodiment of the invention relate to a kind of switched system that can operate in transfer mode and receiving mode.This switched system comprises delivery port, is coupled to input/output end port via transfer path; Receiving port is coupled to input/output end port via RX path; And the commutation circuit that is arranged in RX path.Described commutation circuit comprises switching device, and described switching device comprises input terminal, outlet terminal, reaches the control terminal that receives control signal, and described control signal is controlled the state of described switching device between conducting state and off-state.When described switching device was in conducting state, described switched system was suitable for operating in transfer mode, and wherein said delivery port is coupled to described input/output end port and described receiving port and described input/output end port with being operated and isolates at least in fact.When described switching device is when being in off-state, described switched system is suitable for operating in receiving mode, and wherein, described receiving port is coupled to described input/output end port with being operated.
Another embodiment of the present invention relates to the switched system that a kind of CMOS makes up, and comprises one or more delivery port, and each port is coupled to input/output end port via transfer path separately; And one or more receiving ports, each port is coupled to described input/output end port via RX path separately.Each RX path comprises commutation circuit, and described commutation circuit comprises transistor and the inductor in parallel with described transistor.Described commutation circuit is suitable for when transistor is in conducting state separately receiving port and described input/output end port being isolated at least substantially, and operatively receiving port separately is coupled to described input/output end port when transistor is in off-state.
Another embodiment of the present invention relates to a kind of transmission/receiving system, comprising: antenna; Radio frequency transmitter; Radio frequency receiver; And switched system.This switched system comprises: delivery port, be set between described conveyer and the described antenna, and wherein, described delivery port is coupled to described antenna via transfer path; Receiving port is set between described receiver and the described antenna, and wherein, described receiving port is coupled to described antenna via RX path; And be arranged in the commutation circuit of RX path.Described commutation circuit comprises switching device, and described switching device comprises input terminal, outlet terminal, reaches the control terminal that receives control signal, and described control signal is controlled the state of described switching device between conducting state and off-state.When described switching device was positioned at conducting state, described switched system was suitable for operating in transfer mode, and wherein, receiving port is coupled to input/output end port with being operated, and described receiving port and described input/output end port are isolated at least in fact.When described switching device was in off-state, described switched system was suitable for operating in described receiving mode, and wherein said receiving port is coupled to described input/output end port with being operated.
Another embodiment of the present invention relates to a kind of changing method, comprise the following steps: to use the CMOS commutation circuit, between transfer mode and receiving mode, switch transmission/receiving system, wherein, comprise that in transfer mode the transmission signal that transmits carrier signal is transferred into input/output end port from delivery port, the reception carrier signal is transferred into receiving port from described input/output end port in receiving mode.When being operated in described transfer mode, with respect to described transmission carrier signal, described CMOS commutation circuit produces the harmonic wave that is not more than pact-60dB.When being operated in described transfer mode, described CMOS commutation circuit is added to the loss of signal on the transmission signal that is not more than about 2.5dB.
Another embodiment of the present invention relates to a kind of switched system, comprise the CMOS commutation circuit, be suitable between transfer mode and receiving mode, switching, wherein, comprise that in transfer mode the transmission signal that transmits carrier signal is transferred into input/output end port from delivery port, the reception carrier signal is transferred into receiving port from described input/output end port in receiving mode.When being operated in described transfer mode, with respect to described transmission carrier signal, described CMOS commutation circuit is suitable for producing the harmonic wave that is not more than pact-60dB.When being operated in described transfer mode, described CMOS commutation circuit is suitable for the loss of signal is added on the transmission signal that is not more than about 2.5dB.
Another embodiment of the present invention relates to a kind of switched system that can operate in transfer mode and receiving mode.Described switched system comprises: a plurality of ports comprise at least one delivery port that is coupled to input/output end port and at least one receiving port that is coupled to described input/output end port; And commutation circuit, be suitable for selecting in a plurality of ports one to be coupled to described input/output end port with being operated, wherein, when described switched system is when being operated in transfer mode, delivery port is coupled to described input/output end port with being operated, and wherein, when described switched system is when being operated in transfer mode, receiving port is coupled to described input/output end port.Described commutation circuit comprises at least one transistor, and wherein, and when described switched system is when being operated in transfer mode, each transistor of commutation circuit is to be in the conducting state.
Another embodiment of the present invention relates to a kind of switched system that can operate in first pattern and second pattern.Described switched system comprises: first port, be coupled to input/output end port via first path, and wherein, described first port is by first signal; Second port is coupled to described input/output end port via second path, and wherein, described second port is by having the low secondary signal of described first signal of power ratio; And the commutation circuit that is arranged in second path, described commutation circuit comprises switching device, and described switching device comprises input terminal, outlet terminal, reaches the control terminal that receives control signal, and described control signal is controlled the state of described switching device.Described commutation circuit is suitable for switching switched system between first pattern and second pattern, (1) in first pattern, the voltage that passes described switching device is essentially zero, described first port is coupled to described input/output end port with being operated, and described second port and described input/output end port are isolated at least substantially, reach (2) in second pattern, described second port is coupled to described input/output end port with being operated.
Another embodiment of the present invention relates to a kind of switched system and comprises: one or more first ports, and each is coupled to input/output end port via first path separately, and wherein, each first port passes through first signal separately; And one or more second ports, each is coupled to described input/output end port via second path separately, and wherein, each second port is by having each low secondary signal separately of first signal of power ratio.Each second path comprises commutation circuit, and described commutation circuit comprises transistor and is parallel to described transistorized transformer; And described commutation circuit is suitable for switching described switched system between first pattern and second pattern, wherein (1) is in first pattern, pass described transistorized voltage and be essentially zero, first port is coupled to described input/output end port with being operated, and second port and input/output end port are isolated at least substantially, reach (2) in second pattern, described second port is coupled to described input/output end port with being operated.
Description of drawings
Fig. 1 has shown the existing switch that uses PIN diode to make up;
Fig. 2 has shown the PET switch that first kind of existing switch makes up;
Fig. 3 has shown the PET switch that second kind of existing switch makes up;
Fig. 4 has shown first embodiment of the switched system of fill order's dpdt double-pole double-throw (DPDT) (SPDT) function;
The circuit of Fig. 5 displayed map 4 has first example of output matching network (OMN);
The circuit of Fig. 6 displayed map 4 has second example of OMN;
Fig. 7 shows another embodiment of switched system;
The modification of Fig. 8 displayed map 7 circuit;
Fig. 9 shows the embodiment of the switched system that can be used for the multiport operation;
Figure 10 shows another embodiment of the switched system that can be used for the multiport operation;
Figure 11 shows another embodiment of the switched system that can be used for the multiport operation; And
Figure 12 shows another embodiment of the switched system that can be used for multiband, multiport operation.
Embodiment
Fig. 1 shows how PIN diode is used to switch the RF signal traditionally.Switch 100 comprises delivery port 104 and receiving port 105, respectively is coupled to antenna 106.Transfer path comprises capacitor 108 and diode 101, be coupling in the inductor 109 between this capacitor 108 and the diode 101 and be coupling in capacitor 110 between this inductor 109 and the ground.Control signal Vc is applied to the node 111 between inductor 109 and the capacitor.RX path comprises that quarter-wave line 103, electric capacity 112 and an end are coupling in the diode 102 between quarter-wave line 103 and the capacitor 112.At the other end, diode 102 is coupled to ground.
At transfer mode, control signal Vc is arranged to height, two diodes 101 of its forward bias and 102.When diode 101 during by forward bias, it presents from delivery port 104 to receiving port 105 low impedance path.When diode 102 during by forward bias, it presents the approximate short circuit for receiving port 105, and this helps it and high pass feed signals level are isolated.Quarter-wave line 103 converts the short-circuit impedance of receiving port 105 to the high new open-circuit impedance of antenna 106.When Vc is configured to lowly, two diodes 101 and 102 are reversed bias voltage and are in high impedance status.Diode 101 provides high resistive path and isolates and transmit and antenna port 104,106.Diode 102 also is to be positioned at high impedance status, and it allows signal to flow freely between reception and antenna port 105,106.
Fig. 2 has shown the common execution mode that makes field-effect transistors (FETs) 201 and 202 single-pole double throw (SPDT) switches of realizing 200.GaAs PHEMTs is the most frequently used for this application.Because these are depletion mode device, grid must be biased into the drain electrode and below the source terminal, with the disconnection transistor.In order to meet this point, switch usually via use transmit separately, the blocking condenser 203,204,205 at reception and antenna port 206,207,208 places and being isolated or " drift (floating) " by DC.Then, be applied to the control signal Vref of resistor 209 1 ends, then be configured to the highest control voltage.Thereby the control signal that equals Vref can be with switch opens, and zero control signal can disconnect switch.When compensating signal was used to be coupled respectively to the control signal Vc1 of FETs202 and FETs201 and Vc2, FETs101 and 102 was switched, and switch moves between transfer mode and receiving mode.
Switch 300 like the SPDT Switch of Fig. 3 demonstration and Fig. 2, wherein FETs201 and 202 is replaced by the FETs201a-c of three series connection and 202a-c separately.Control signal Vc2 and Vc1 are in order to the chain separately of control FETs201 and 202.The advantage of this technology is that voltage is assigned with and passes the disconnection chain, punctures avoiding.
The layout of single-pole double-throw switch (SPDT) all has a common problem for transmission/receiving system.This part comes from the complementary characteristic of this design.During transmitting, when a plurality of reception branch was disconnected, a branch of switch was switched on.This switch should have low-loss when receiving port being provided enough isolation be coupled to these port low noise amplifiers (LNAs) with protection.But, opposite situation then is not like this.At receiving mode, loss is very important, is important and only influence under the situation of loss at it with the isolation of delivery port.Received signal intensity will not cause any damage to the power amplifier that is coupled to delivery port.The layout tendency of single-pole double-throw switch (SPDT) provides similar isolation to two kinds of situations.Can utilize these requirements uneven or can not be complementary in some one exemplary embodiment of this exposure.
Be used to transmit/switch of receiving system be that on the other hand because switching transistor remains on open position with high impedance, maximum distortion and potential damage take place device when the highest signal level of switch process.When transistor was in high impedance status, all signal potentials may crossover device terminals and occur.This has increased the risk that enters the transistor breakdown area.The existence of generating positive and negative voltage swing makes and is difficult to keep transistor to disconnect fully, causes some channel modulation and distorted signals.The high voltage potential that this type of has the risk of puncture and control problem can not appear in the device that is shown in an open position usually.These devices can be in low impedance state.And they may be by big electric current.If device is provided with to scale so that operate in the range of linearity, voltage potential can remain low, puncture and distorted signals avoiding, and device can remain on open mode.In some embodiment that this disclosed, switch can be configured to transistors all during transfer mode and remain in the open mode.
Fig. 4 shown and utilized above-mentioned uneven or embodiment that can not the complementary switched system that requires, and it can be configured to transistors all during transfer mode and remains in the open mode.Transmission/reception switched system 400 comprises transfer path, and it comprises delivery port 408, and it is coupled to output port 409 via power amplifier 401 and impedance matching network 403.Output port 409 is coupled to load impedance 404.Switched system 400 also comprises RX path.In RX path, reception impedance 407, switching transistor 406 and transformer 405 are connected in parallel to each other and are coupling between receiving port 410 and the impedance matching network 403.The inductor 402 that is coupling between power amplifier 401 and the impedance matching network 403 is used to biased power amplifier 401.Transformer 405 is coupled to the vent diverter of impedance matching network 403.Vent diverter can have various configurations, comprises separately or one or more resistors, capacitor and the inductor of combination.In this embodiment, vent diverter can advantageously be chosen as the element that will be used in the conveyer that does not have RX path, and is coupled to ground from impedance matching network, so that provide correct matched impedance to power amplifier.
In transfer mode, power amplifier 401 can be unlocked, and signal Vin is amplified to level Vd.Then, signal Vd propagates by matching network 403.Switching device shifter 406 is unlocked and provides Low ESR to ground from receiving port.This can be effectively with two primary side short circuits of transformer 405.Transformer can will be mapped to secondary winding in the impedance that elementary winding is seen by equation Zs=n*Zp.When resisting near short circuit for elementary group, secondary impedance also can be near short circuit.This can be coupled to ground with the vent diverter in the impedance matching network effectively.Then, vent diverter may have suitable resistance so that power amplifier 401 is matched to load impedance 404.For example, vent diverter can be designed such that when as above-mentioned as be coupled to when ground, vent diverter has impedance to be suitable for that power amplifier 401 is matched to load impedance 404.The Low ESR of switch can provide isolation to receiving impedance.When the size arrangement was correct, switch can provide sufficient isolation and have the low-potential voltage that strides across its terminal.Circulating current can appear in the transformer, and switching device can be arranged to size these electric currents are passed through undistortedly.
In receiving mode, power amplifier 401 can be disconnected, and presents known impedance for matching network 403.Depend on the design of power amplifier 401, this can be open circuit, short circuit or reactive impedance (reactive impedance).Switch 406 can be disconnected and load impedance 404 can be coupled to reception impedance 407 by transformer 405 and output matching network 403.The output impedance of power amplifier can realize the connection of receiving port to output loading.Because be indifferent to the isolation between output loading and power amplifier usually, impedance matching network can be designed to provide the power amplifier impedance of off-state.Can produce optimal design, making provides the matched well of the low loss of tool between output and receiving port 409,410.Also can use other matching element to receive coupling, loss and bandwidth at receiving port to improve.
The more detailed embodiment of the switched system of Fig. 5 displayed map 4.Especially, a demonstration execution mode that has shown the impedance matching network 403 of Fig. 4.Impedance matching network 503 comprises first bridging condenser 508, series reactor 509, second bridging condenser 510, reaches the blocking condenser 511 of series connection.Bridging condenser 510 is coupled to the secondary winding of transformer 505.When switch was unlocked, capacitor 510 was coupled to ground effectively and power amplifier 401 can be operated with suitable resistance.Receiving port 410 can be intercepted by the Low ESR of switch and only the low signal current potential can appear at switch terminal.In receiving mode, power amplifier 401 can be disconnected and provide impedance, and this impedance is characterised in that to have the high real part in parallel with shunting capacitance.The output capacitance of the device that combines with bridging condenser 508 can resonate with bias inductor 402.The value of inductor 402 can be selected such that the reactance elimination and present high impedance at series reactor 509.Then, receiving port 410 can directly be coupled by transformer 405, shunting capacitance 510 and blocking condenser 511.The leakage inductance of transformer can be designed to eliminate the series reactance of capacitor 510, and stays low impedance path between receiving port and output loading.
Fig. 6 is the switched system with another demonstration execution mode displayed map 4 of the impedance matching network 403 of Fig. 4.In this embodiment, impedance matching network 603 comprises bridging condenser 608, series capacitor 609, reaches bridging condenser 610.Class of operation in transfer mode is similar to the circuit among Fig. 5, and has the reception network that inductor 610 is coupled to ground in order suitably to mate.In receiving mode, power amplifier can be put into low impedance state.This may take place in some power amplifier circuit.For example, secondary matching network can be converted to Low ESR with the high state of the nature of amplifier installation in output.In this state, capacitor 608 and inductor 602 are removed from circuit effectively, and a side of series capacitor 609 is seen short circuit.Then, capacitor 609 is as with the leakage inductance of inductor 610, transformer and receive load shunting capacitance in parallel.This electric capacity can be used to tuning reception branch, to reach optimal performance.
Fig. 7 shows that one switches another example embodiment of system.In switched system 700, but the low-pass network of matching network 703 presentation graphs 5 or the high pass network of Fig. 6.Shunting matching inductor 704 is positioned at the operation that demonstrates switch outside the coupling block.As shown in the figure, transformer has used coupled inductors 705a and 705b to realize.These inductors are characterised in that the self-induction and the mutual inductance of each coil.Those skilled in the art turn to many circles and this practical structures of transformer whose drain inductance network switch with available feature.The coil of coupling can by around the winding in parallel of coil, be printed on the transmission line of spiral inductor on plate or the substrate or coupling and realize.Capacitor 706 and 707 can be used to leakage inductance resonance and improve the loss of transformer.Reception impedance 407 and switching device shifter 406 can be similar to the mode of the corresponding intrument in the circuit of Fig. 6 and operate.
Fig. 8 shows a switching system 800, and it is similar to the switched system 700 of Fig. 7, but replaces capacitor 707 with more complicated and random impedance matching network 807.This gives with leakage inductance resonance more elasticity is provided, and simultaneously to load impedance R
RX407 provide suitable coupling.Impedance matching network 807 can be made up of shunting and series capacitors and inductor.
The circuit of Fig. 9 shows the embodiment for preparing two receiving ports.This produces SP3T (SP3T) switch effectively.Be similar to other switched systems in this explanation, switched system 900 comprises power amplifier 401, is coupling between delivery port 408 and the bias inductor 402.Bias inductor 402 is coupled to impedance matching network 703, and it is coupled to output loading 404 successively at output port 409.Impedance matching network 703 is coupled to first and second transformer 905,910 (or first and second coupled inductors is to 905a, b and 910b, c) corresponding to first and second receiving port 913,914 via inductor 904.Inductor 905b and reception load 908 and switching device shifter 909 parallel coupled, and inductor 910b and second receives load 911 and switching device shifter 912 parallel coupled.During transmitting, 909,912 conductings of two switches and inductor 905b and 910b are by short circuit effectively.During receiving mode, in fact the inductor that one of switch can keep disconnecting being correlated with is maintained short circuit, and another switch is an open circuit.Identical advantage also is provided at the selectivity between two or more ports simultaneously during keeping transfer mode like this.Although extra leakage inductance is arranged and because the unfavorable result of the loss of circulating current, this technology can be expanded the receiving port to arbitrary number.Other technologies and embodiment will be conspicuous for those skilled in the art.
The embodiment that one of multiport switch of Figure 10 displayed map 9 substitutes.Especially, switched system 1000 omits transformer 910 (or coupled inductors 910a, 910b), makes switch 1011 be arranged in the grounding path of transformer 905 (or coupled inductors 905a, 905b).In this case, switch 1011 can be used to provide real short circuit for one of inductor 905a end, but not the imaginary short that provides by the transformer 910 (or coupled inductors 910a, 910b) of Fig. 9.Those skilled in the art will recognize that various matching elements can be added into to improve performance.
The modification of the switched system of Figure 11 displayed map 9, wherein, amplifier 901 and matching network 903 have utilized a pair amplifier 901a, 901b and have realized, and this pair amplifier utilizes coupled inductors or transformer 1103a, 1103b and mates.Amplifier 901a and 901b combine with separately first and second delivery port 908a and 908b.Amplifier can or in phase dispose by differential ground 901a and 901b, and is to equate or different substantially sizes.Plural amplifier also can be combined in this way.Coupled inductors or transformer 1103a or 1103b also can be fabricated coupling inductor or the transformer to 1105 and 1110 in a similar fashion.The execution mode of the transformer of 1103a and 1103b can use 1: 1 number of turns ratio, as shown in the figure, and perhaps similar any other number of turns ratio.
Figure 12 shows the present invention's one example embodiment, and wherein, amplifier is made of many widgets, and each assembly is combined via the coupled inductors transformer network.For example, amplifier 1201 and 1202 can represent to cover the independent amplifier of different frequency ranges.Receiving key section 1203 and 1204 is to work in the mode of the circuit that is similar to Fig. 9, can consider in this case to select between four receiver Rx1, Rx2, Rx3, Rx4.In this embodiment, switch section 1203 and 1204 can be designed to work together and cover different frequency ranges with amplifier independently.Extra transmission or RX path can be according to any the foregoing description according to requiring to be added into.In addition, it is manufactured that the receiving key of any number can use CMOS (Complementary Metal Oxide Semiconductor) (CMOS) technology.It will be tangible for those skilled in the art that other of this theme change shape.
Circuit at the switched system of this explanation can use for example false type High Electron Mobility Transistor (PHEMTs) of silicon bipolar transistor, CMOS transistor, GaAs (GaAs), metal-semiconductor field effect transistor (MESFETs), GaAs heterojunction bipolar transistor (HBTs) and/or GaAs.Circuit also can be relevant with last surface technology different integrated circuit (IC) technical compatibilities, and can produce the solution of single stone type.
Demonstration Application at the switched system of this explanation is a transmission/receiving key.In the method and system of this explanation, when switched system was operated in transfer mode, with respect to transmitting carrier signal, switch can produce and be not more than pact-60dB and (or according to another example be-70dB) harmonic wave.In addition, in the method and system of this explanation, switch is added to the loss of signal and transmits on the signal, and this signal is not more than about 2.5dB (or be 1.5dB according to another example).Thereby, advantageously loss and the distortion operation of transmission/receiving key to reduce.Although will be appreciated that transmission/receiving key is in a kind of favourable application of the switched system of this explanation, the present invention is not done such qualification.
The several characteristic of at least one embodiment of the present invention so has been described, Ying Zhike carries out various changes, modification and improvement in spirit of the present invention and category.These change, revise and improvement is intended to be the part of this description, and are intended within the spirit and scope of the present invention.Therefore, above-mentioned explanation and accompanying drawing only are as an example.
Claims (38)
1. a switched system can be operated under transfer mode and receiving mode, and described switched system comprises:
Delivery port is coupled to input/output end port via transfer path;
Receiving port is coupled to described input/output end port via RX path; And
Be arranged in the commutation circuit of described RX path, described commutation circuit comprises switching device, described switching device comprises input terminal, outlet terminal, reaches the control terminal that receives control signal, and described control signal is controlled the state of described switching device between conducting state and off-state;
Wherein, when described switching device is in described conducting state, described switched system is suitable for operating under transfer mode, under described transfer mode, described delivery port is coupled to described input/output end port and described receiving port and described input/output end port with being operated and isolates at least in fact; And
Wherein, when described switching device is when being in described off-state, described switched system is suitable for operating under receiving mode, and under described receiving mode, described receiving port is coupled to described input/output end port with being operated.
2. switched system as claimed in claim 1, wherein said switching device comprises transistor.
3. switched system as claimed in claim 1, wherein said switched system are to make up with CMOS.
4. switched system as claimed in claim 1, wherein under described receiving mode, described transfer path is not isolated with described input/output end port.
5. switched system as claimed in claim 4 also comprises the power amplifier that is arranged in described transfer path, and wherein when described switched system was in described receiving mode, described power amplifier had predetermined impedance.
6. switched system as claimed in claim 5, wherein when described switched system was in described receiving mode, the impedance of described power amplifier came down to zero.
7. switched system as claimed in claim 5, wherein when described switched system was in described receiving mode, the impedance of described power amplifier was the impedance of open circuit.
8. switched system as claimed in claim 1, wherein said switched system comprises at least one transistor, and wherein when described switched system is in described transfer mode, each transistor of described switched system is suitable for being in conducting state.
9. switched system as claimed in claim 1 also comprises:
Second receiving port is coupled to described input/output interface via second RX path; And
Be positioned at second commutation circuit of described second RX path, described second commutation circuit comprises the second switch device, described second switch device comprises input terminal, outlet terminal, reaches the control terminal that receives second control signal, and described second control signal is controlled the state of described second switch device between conducting state and off-state;
Wherein, when described second switch device was positioned at described off-state, described switched system was suitable for operating under second receiving mode, and under described second receiving mode, described second receiving port is coupled to described input/output end port with being operated.
10. switched system as claimed in claim 1, wherein, described commutation circuit is suitable for producing substantial at least short circuit between described receiving port and ground.
11. switched system as claimed in claim 1, wherein said switching device also comprise the inductor in parallel with described switching device.
12. switched system as claimed in claim 11, wherein when described switching device was in described conducting state, described switching device was suitable for the short circuit substantially of described inductor.
13. switched system as claimed in claim 1, wherein said switching device also comprise the transformer in parallel with described switching device.
14. switched system as claimed in claim 1, wherein said delivery port and described receiving port are coupled to described input/output end port via impedance matching network.
15. switched system as claimed in claim 14, under the wherein said transfer mode, the node place that described commutation circuit is suitable between described impedance matching network and described receiving port produces virtual earth.
16. switched system as claimed in claim 1 also comprises being used for the device of at least in fact described receiving port and described input/output end port being isolated at described transfer mode.
17. switched system as claimed in claim 1, wherein said input/output end port comprises antenna.
18. switched system as claimed in claim 1 also comprises the power amplifier that is positioned at described transfer path.
19. switched system as claimed in claim 18, wherein said power amplifier makes up with CMOS.
20. switched system as claimed in claim 1, wherein when described switched system is operated in described transfer mode, described commutation circuit is to be suitable for producing the harmonic wave that is not more than pact-60dB, and wherein when described switched system was operated under described transfer mode, described commutation circuit was suitable for the loss of signal is added on the signal that is not more than about 2.5dB that is transmitted.
21. the switched system that CMOS makes up comprises:
One or more delivery port, each port is coupled to input/output end port via transfer path separately; And
One or more receiving ports, each port is coupled to described input/output end port via RX path separately;
Wherein, each RX path comprises commutation circuit, described commutation circuit comprises transistor and the inductor in parallel with described transistor, wherein, described commutation circuit is suitable for when described transistor is in conducting state separately receiving port and described input/output end port being isolated at least substantially, and operatively receiving port separately is coupled to described input/output end port when transistor is in off-state.
22. the switched system that CMOS as claimed in claim 21 makes up, wherein said one or more RX path comprise first and second RX path.
23. the switched system that CMOS as claimed in claim 21 makes up, wherein said first and second RX path comprises first and second commutation circuit respectively, described first and second commutation circuit comprises first and second transistor respectively, and wherein said first and second commutation circuit is configured and is arranged to, make described first and second transistorized each during the transfer mode of described switched system, be in the conducting state.
24. a transmission/receiving system comprises:
Antenna;
Radio frequency transmitter;
Radio frequency receiver; And
Switched system comprises:
Delivery port is set between described conveyer and the described antenna, and wherein, described delivery port is coupled to described antenna via transfer path;
Receiving port is set between described receiver and the described antenna, and wherein, described receiving port is coupled to described antenna via RX path; And
Be arranged in the commutation circuit of described RX path, described commutation circuit comprises switching device, described switching device comprises input terminal, outlet terminal, reaches the control terminal that receives control signal, and described control signal is controlled the state of described switching device between conducting state and off-state;
Wherein, when described switching device was positioned at conducting state, described switched system was suitable for operating under transfer mode, under described transfer mode, described delivery port is coupled to described input/output end port with being operated, and described receiving port and described input/output end port are isolated at least in fact; And
Wherein, when described switching device was in described off-state, described switched system was suitable for operating under receiving mode, and under described receiving mode, described receiving port is coupled to described input/output end port with being operated.
25. transmission/receiving system as claimed in claim 24 also comprises the power amplifier that is arranged in described transfer path.
26. transmission/receiving system as claimed in claim 24, wherein, described switched system makes up with CMOS.
27. a changing method comprises the following steps:
Use the CMOS commutation circuit, between transfer mode and receiving mode, switch transmission/receiving system, wherein, comprise that under transfer mode the transmission signal that transmits carrier signal is transferred into input/output end port from delivery port, the reception carrier signal is transferred into receiving port from described input/output end port under receiving mode;
Wherein, when being operated in described transfer mode, with respect to described transmission carrier signal, described CMOS commutation circuit produces the harmonic wave that is not more than pact-60dB; And
Wherein, when being operated in described transfer mode, described CMOS commutation circuit is added to the loss of signal on the transmission signal that is not more than about 2.5dB.
28. a switched system comprises:
The CMOS commutation circuit, be suitable between transfer mode and receiving mode, switching, wherein, comprise that under transfer mode the transmission signal that transmits carrier signal is transferred into input/output end port from delivery port, the reception carrier signal is transferred into receiving port from described input/output end port under receiving mode;
Wherein, when being operated under described transfer mode, with respect to described transmission carrier signal, described CMOS commutation circuit is suitable for producing the harmonic wave that is not more than pact-60dB; And
Wherein, when being operated under described transfer mode, described CMOS commutation circuit is suitable for the loss of signal is added on the transmission signal that is not more than about 2.5dB.
29. switched system as claimed in claim 28, wherein said CMOS commutation circuit are integrated in non-insulated layer and cover on the silicon substrate of silicon (SOI).
30. switched system as claimed in claim 29, wherein, described non-SOI silicon substrate comprises the silicon single crystal wafer of at least a portion.
31. a switched system can be operated under transfer mode and receiving mode, described switched system comprises:
A plurality of ports comprise at least one delivery port that is coupled to input/output end port and at least one receiving port that is coupled to described input/output end port; And
Commutation circuit, be suitable for selecting in a plurality of ports one to be coupled to described input/output end port with being operated, wherein, when described switched system is when being operated in transfer mode, delivery port is coupled to described input/output end port with being operated, and wherein, when described switched system was operated under transfer mode, receiving port was coupled to described input/output end port;
Wherein, described commutation circuit comprises at least one transistor, and wherein, and when described switched system is when being operated under described transfer mode, each transistor of described commutation circuit is to be in the conducting state.
32. switched system as claimed in claim 31, wherein at least one RX path between at least one receiving port and described input/output end port comprises at least one transistor.
33. a switched system can be operated under first pattern and second pattern, described switched system comprises:
First port is coupled to input/output end port via first path, and wherein, described first port is by first signal;
Second port is coupled to described input/output end port via second path, and wherein, described second port is by having the low secondary signal of described first signal of power ratio; And
Be arranged in the commutation circuit in second path, described commutation circuit comprises switching device, and described switching device comprises input terminal, outlet terminal, reaches the control terminal that receives control signal, and described control signal is controlled the state of described switching device;
Wherein, described commutation circuit is suitable for switching described switched system between first pattern and second pattern, (1) under first pattern, the voltage that passes described switching device is essentially zero, described first port is coupled to described input/output end port with being operated, and described second port and described input/output end port are isolated at least substantially, reach (2) in second pattern, and described second port is coupled to described input/output end port with being operated.
34. a switched system comprises:
One or more first ports, each is coupled to input/output end port via first path separately, and wherein, each first port passes through first signal separately; And
One or more second ports, each is coupled to described input/output end port via second path separately, and wherein, each second port is by having each low secondary signal separately of first signal of power ratio;
Wherein, each second path comprises commutation circuit, and described commutation circuit comprises transistor and is parallel to described transistorized transformer;
And wherein, described commutation circuit is suitable for switching described switched system between first pattern and second pattern, wherein (1) is under first pattern, pass described transistorized voltage and be essentially zero, described first port is coupled to described input/output end port with being operated, and described second port and described input/output end port are isolated at least substantially, reach (2) under second pattern, and described second port is coupled to described input/output end port with being operated.
35. switched system as claimed in claim 34, wherein, described one or more first ports comprise single port, and wherein, described one or more second ports comprise a plurality of ports.
36. switched system as claimed in claim 34, wherein, described one or more first port comprises a plurality of ports, and wherein, described one or more second ports comprise a plurality of ports.
37. switched system as claimed in claim 34, wherein, described one or more first port comprises single port, and wherein, described one or more second ports comprise single port.
38. switched system as claimed in claim 34, wherein, described one or more first port comprises a plurality of ports, and wherein, described one or more second ports comprise single port.
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US86614706P | 2006-11-16 | 2006-11-16 | |
| US60/866,139 | 2006-11-16 | ||
| US60/866,147 | 2006-11-16 | ||
| US60/866,144 | 2006-11-16 | ||
| US11/809,203 | 2007-05-31 |
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| CN101617474A true CN101617474A (en) | 2009-12-30 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN200780049542A Pending CN101617474A (en) | 2006-11-16 | 2007-11-15 | Electronic switch network |
| CN200780049543A Pending CN101647198A (en) | 2006-11-16 | 2007-11-15 | Distributed multi-stage amplifier |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200780049543A Pending CN101647198A (en) | 2006-11-16 | 2007-11-15 | Distributed multi-stage amplifier |
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| CN (2) | CN101617474A (en) |
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| CN103812523A (en) * | 2012-11-08 | 2014-05-21 | 财团法人工业技术研究院 | Switching circuit, radio frequency switching circuit and switching method thereof |
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| CN101951232A (en) * | 2010-10-14 | 2011-01-19 | 沈阳中科微电子有限公司 | Radio-frequency (RF) power amplifier |
| CN103812523A (en) * | 2012-11-08 | 2014-05-21 | 财团法人工业技术研究院 | Switching circuit, radio frequency switching circuit and switching method thereof |
| CN104158524A (en) * | 2013-05-14 | 2014-11-19 | 英飞凌科技股份有限公司 | System and Method for a Switchable Capacitance |
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| CN110932747A (en) * | 2019-12-02 | 2020-03-27 | 翱捷智能科技(上海)有限公司 | Integrated high-performance radio frequency transmit-receive switch |
| CN110932747B (en) * | 2019-12-02 | 2020-08-21 | 翱捷智能科技(上海)有限公司 | Integrated high-performance radio frequency transmit-receive switch |
| CN114747127A (en) * | 2020-01-07 | 2022-07-12 | Oppo广东移动通信有限公司 | Adapter and control method |
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| CN101647198A (en) | 2010-02-10 |
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