CN101552028A - Storage device for combining and using storage equipment and method for realizing storage - Google Patents
Storage device for combining and using storage equipment and method for realizing storage Download PDFInfo
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- CN101552028A CN101552028A CNA2008100880839A CN200810088083A CN101552028A CN 101552028 A CN101552028 A CN 101552028A CN A2008100880839 A CNA2008100880839 A CN A2008100880839A CN 200810088083 A CN200810088083 A CN 200810088083A CN 101552028 A CN101552028 A CN 101552028A
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- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
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Abstract
The invention discloses a storage device for combining and using storage equipment, which at least comprises first storage equipment, second storage equipment and a control module, wherein the control module is respectively connected with the first storage equipment and the second storage equipment, the control module comprises a configuration information unit and a processing unit, the configuration information unit is used for recording the information of the storage equipment, the processing unit is respectively connected with the configuration information unit and external equipment, the parameter of the storage equipment is configured, and the first storage equipment and the second storage equipment have continuous access addresses. The invention has the purposes of combining and using the storage equipment, sufficiently uses recovering and storing equipment, realizes the combination of different types of storage equipment synchronously and exerts the advantages of different types of storage equipment.
Description
Technical field
The present invention relates to a kind of data storage device and method, particularly a kind of method that is used in combination the memory storage of memory device and realizes storage.
Background technology
Along with popularizing that flash memory uses, increasing flash type has appearred.Have certain difference between the inhomogeneous flash memory,, the life-span fast if any speed grown but expensive SLC (Single Level Cell, single layer cell flash memory); The MLC that speed is slow, the life-span is short but cheap (Multi Level Cell, multi-layered unit flash memory); Also there are some not reach the defective products of the standard of dispatching from the factory.
And prior art is only supported simultaneously one type flash memory, i.e. in same flash memory device (in a flash disk) can have multi-bank flash-memory and deposit, but must be the flash memory of same type, dissimilar can not being used in combination.
In addition, if adopt the flash memory of recycling in the flash memory device, then prior art may cause waste owing to can't be used in combination multiple flash memory.For example a flash memory is because of damaging the free space of only surplus 1.5G, and the capacity specifications of product is integers such as 1G, 2G, like this, adopts the product of this flash memory just can only reduce capacity, as the product use of 1G specification, thereby causes waste.
Also some application need low cost and the high flash memory device of read or write speed, the flash memory of MLC and SLC all is difficult to satisfy, and with both combinations, just can solve the problem of read or write speed and cost simultaneously.
Therefore, flash memory is used in combination the storage problem urgent need solution of memory device.
Summary of the invention
The invention provides a kind of convenient memory storage that is used in combination memory device and method of using, solve the problem that memory device can not be used in combination.
The present invention proposes a kind of memory storage that is used in combination memory device, comprising:
At least the first memory device and second memory device and control module, control module are connected with second memory device with above-mentioned first memory device respectively,
Above-mentioned control module comprises the configuration information unit, is used to write down the information of above-mentioned memory device; And
Processing unit is connected with external unit with the configuration information unit respectively, by the parameter of configure storage devices, makes above-mentioned first memory device and second memory device have the connected reference address.
Preferably, above-mentioned first memory device is identical and/or different types of memory device with second memory device.
Preferably, the information of above-mentioned configuration information unit record memory device comprises configuration information and bad block table.
Preferably, above-mentioned configuration information unit is corresponding with the memory device kind, makes the memory device correspondence of a kind that at least one configuration information unit is set.
Above-mentioned memory device is a flash memory.
Above-mentioned configuration information comprises: type, piece number, every number of pages, every page of sector number and/or visit clock period.
The present invention proposes a kind of coupling arrangement that the memory device combination can be used, and is used at least the first memory device and the combination of second memory device are used, and comprising:
The configuration information unit, the configuration information and the bad block table of record, the above-mentioned memory device of maintenance;
Processing unit is connected with external unit with the configuration information unit respectively, by the parameter of configure storage devices, makes memory device have the connected reference address; The memory device combination is used.
The present invention proposes a kind of method based on the memory storage realization storage that is used in combination memory device, and above-mentioned memory storage comprises at least the first memory device and second memory device, control module and processing unit; It is characterized in that said method comprises step:
Receive external command, obtain required reference address;
The configure storage devices parameter makes at least the first memory device and second memory device have the connected reference address;
Visit above-mentioned memory device according to required reference address.
Preferably, the step of above-mentioned configure storage devices parameter is as follows:
Determine the memory device of required reference address correspondence;
Access the relevant information of above-mentioned memory device;
According to relevant information configure storage devices parameter.
Preferably, the step of the memory device of above-mentioned definite required reference address correspondence is as follows:
Inquire about the capacity of first memory device;
Required reference address and the capacity of memory device that inquires are compared;
Judge that whether capacity of memory device is less than reference address; In this way, can determine that current memory device is required accessing storage device; As not, carry out next step;
Inquire about the capacity of next memory device, carry out the step that required reference address and the capacity of memory device that inquires are compared.
Reach the purpose that is used in combination memory device by the present invention, make full use of the recovery memory device; Simultaneously, realize the combination of dissimilar memory devices, the advantage of performance all kinds memory device.
Description of drawings
Fig. 1 is apparatus of the present invention first example structure synoptic diagram;
Fig. 2 is apparatus of the present invention second example structure synoptic diagram;
Fig. 3 is apparatus of the present invention second embodiment schematic flow sheets;
Fig. 4 is apparatus of the present invention the 3rd example structure synoptic diagram;
Fig. 5 is the inventive method the 4th embodiment schematic flow sheet;
Fig. 6 is the inventive method the 5th embodiment schematic flow sheet;
Fig. 7 is the inventive method the 5th embodiment part schematic flow sheet.
The realization of the object of the invention, functional characteristics and advantage will be in conjunction with the embodiments, are described further with reference to accompanying drawing.
Embodiment
The invention provides first embodiment, propose a kind of memory storage that is used in combination memory device, have the function that is used in combination memory device, make full use of memory device dissimilar and/or that part is damaged.
Please refer to Fig. 1, said apparatus comprises:
At least the first memory device 10 and second memory device 11 and control module 12;
Above-mentioned control module 12 is connected with first memory device 10 and second memory device 11 respectively, comprising:
At least the first configuration information unit 120 and the second configuration information unit 121 are respectively applied for the information that writes down first memory device 10 and second memory device 11;
Based on the foregoing description, the present invention proposes second embodiment.First memory device 10 in the present embodiment and second memory device 11 are flash memories of different types, and one is SLC (Single Level Cell, single layer cell flash memory), and another is MLC (Multi Level Cell, a multi-layered unit flash memory).
Please refer to Fig. 2, it is that first flash memory 20, MLC are second flash memory 21 that the processing unit 122 of control module 12 is established SLC respectively; And in the first configuration information unit 120 and the second configuration information unit 121, write down information (as shown in table 1) such as the configuration information of first flash memory 20 and second flash memory 21 and bad block table respectively, configuration information comprises: type, piece number, every number of pages, every page of sector number and/or visit clock period etc.Above-mentioned number also comprises physical block number and logical block number etc.And above-mentioned configuration information is not limited thereto, and can also comprise other.
| Type | The piece number | Every number of pages | Every page of sector number | The visit clock period | Bad block table |
| SLC | 4096 | 64 | 4 | 30ns | Do not have |
| MLC | 8192 | 128 | 4 | 50ns | 0-2047 |
Table 1
Please refer to Fig. 3, is example with information in the table 1, and the workflow process of present embodiment is described in detail in detail, and step is as follows:
Step S10, processing unit 122 receives external command, obtains required reference address;
Step S1100 inquires about first flash memory 20, obtains information such as flash capacity;
Step S1101, with the volume ratio of required reference address and flash memory;
Step S1102 judges that whether flash capacity is less than reference address; In this way, can determine that current memory device is required accessing storage device, carries out step S111; As not, inquire about second flash memory 21;
Step S111 accesses the relevant information of required visit flash memory;
Step S112 is according to relevant information configuration flash memory parameter;
Step S12, the visit flash memory;
Suppose that processing unit receives external command and need visit sector 21007;
Carry out step S1100 earlier, inquire about first flash memory 20, first flash memory 20 comprises 8192, and the available sector number that calculates first flash memory 20 according to prior art is 4*64*4096=1048576, and the available sector number of second flash memory 21 is 4*128*6144=3145728;
Carry out step S1101, control module 12 need reference address 21007 and first flash memory, 20 capacity (being available sector) relatively;
Carry out step S1102, judge that address 21007 is several 1048576 less than the available sector of first flash memory 20, promptly sector 21007 is positioned at first flash memory 20, determines that first flash memory 20 is required visit flash memory.
Carry out step S111, control module 12 accesses the configuration information in first flash memory, the 20 corresponding configuration information unit 120.
Carry out step S112, by configuration information, show that each piece has 256 sectors in first flash memory 20, adopt existing addressing technique, with 21007 divided by 256, the result is 82, and remainder is 15, draws the 15th sector that required visit sector is positioned at the 82nd piece; Remove every page of sector number 4 with 15 again, draw the 3rd sector that required visit sector is positioned at the 3rd page or leaf.So 21007 sectors are positioned at the 82nd piece of first flash memory 20, the 3rd sector of the 3rd page or leaf.
Carry out step S12, are 30ns the access cycles of establishing first flash memory 20, so control module 12 by the bus of flash memory, with the speed of the every byte of 30ns, sends visit order, address and data to first flash memory 20, and the feedback external unit.
With the information in the table 1 is example, and another workflow of present embodiment is described in detail in detail, and step is as follows:
Step S10, processing unit 122 receives external command, obtains required reference address;
Step S1100 inquires about first flash memory 20;
Step S1101, with the volume ratio of address and flash memory;
Whether step S1102 judges flash capacity less than reference address, in this way, can determine that current memory device is required accessing storage device, carries out step S111; As not, inquire about next flash memory;
Step S1103 inquires about next flash memory;
Step S111 accesses the relevant information of required visit flash memory;
Step S112 is according to relevant information configuration flash memory parameter;
Step S12, the visit flash memory;
Suppose to receive external command and need visit sector 3006739;
Equally, carry out step S1100 earlier, inquire about first flash memory 20;
Carry out step S1102, then control module 12 with 3006739 with first flash memory, 20 available sector tables relatively;
Carry out step S1102, address 3006739 is greater than the available sector number of first flash memory 20, and promptly first flash memory 20 is not required visit flash memory;
Carry out step S1103, control module 12 inquires second flash memory 21 in order, and deduct 1048576 (available sector of first flash memory 20) with 3006739, obtain new address 1958163, available sector with this address and second flash memory 21 compares again, and it is less than the available sector number of second flash memory 21, so determine that this address is positioned at second flash memory 21, and with respect to second flash memory 21, the address has become 1958163.
Carry out step S111, control module 12 accesses configuration information and the bad block table in second flash memory, the 21 corresponding configuration information unit 120.
Carry out step S112,, show that each piece has 512 sectors in second flash memory 21 by configuration information and bad block table, with 1958163 divided by 512, the result be 3824, remainder is 275; Draw required visit sector and be positioned at the 275th sector of the 3824th piece, use 275 sector numbers 4 again, draw the 3rd sector that required visit sector is positioned at the 68th page or leaf divided by each page.Simultaneously, information shows that the second flash memory 210-2047 is a bad piece, also need skip bad piece during visit, just make the address can connected reference, then the 0th of second flash memory 21 the available block becomes the 2048th, so there is skew the address that aforementioned calculation is come out, side-play amount is 2048, and the actual access piece is: the 3824+2048=5872 piece; 1958163 sectors just are positioned at the 5872nd piece of second flash memory 21, the 3rd sector of the 68th page or leaf.
Carry out step S12, are 50ns the access cycles of second flash memory 21, so control module 12 by the bus of flash memory, with the speed of the every byte of 50ns, sends visit order, address and data to second flash memory, and the feedback external unit.
In the present embodiment that speed is fast, the life-span, long SLC was made as first flash memory 20, and slow speed, the life-span, short MLC was made as second flash memory 21.Like this in general FAT/FAT32 file system, file allocation table is the front region that is positioned at a disk, in the present embodiment device, will be positioned at the SLC zone, and the access frequency of file allocation table in whole magnetic disk is the highest, therefore store this regional data with SLC, can improve the efficient of visit effectively, but the cost of MLC the cost more than SLC is low again.Be used in combination the flash memory of two kinds of different performances, can make cost and performance two aspects reach balance.
Device is realized the combination of dissimilar flash memories in the present embodiment, the advantage of performance all kinds flash memory; Simultaneously, set two flash memory parameters respectively, but realize two flash memory address connected references by processing unit 122; Reach the purpose that is used in combination flash memory.
The invention provides the 3rd embodiment, please refer to Fig. 4, a kind of coupling arrangement that the memory device combination can be used comprises:
Apparatus of the present invention can reach the purpose that is used in combination first memory device and second memory device by record and the maintenance to storage device configurations information and bad block table.
Other the invention provides the 4th embodiment, proposes a kind of method based on the memory storage realization storage that is used in combination memory device, by this method, is used in combination at least the first memory device and second memory device, makes full use of the recovery memory device.
Please refer to Fig. 5, this method step is carried out based on above-mentioned memory storage, and this memory storage comprises at least the first memory device and second memory device, control module and processing unit; The step of said method is as follows:
Step S10, processing unit 122 receives external command, obtains required reference address;
Step S11, processing unit 122 calls information in the configuration information unit 120, the configure storage devices parameter, but make the connected reference of memory device address;
Step S12, processing unit 122 is determined reference address, accessing storage device.
Above-mentioned control module 12 processing units 122 are determined the address of required visit according to want data quantity stored size; As being 1.7G, then need have access to this address of 1.7G at least when the storage data;
Above-mentioned processing unit 122 configures parameters such as side-play amount according to the configuration information and the bad block table of memory device, but makes the connected reference of memory device address; And,
By inquiry and processing, obtain the actual access address of required reference address, get final product DASD.
Based on the foregoing description, the present invention proposes the 5th embodiment.Memory device in the present embodiment is different types of two flash memories, and first flash memory 20 is SLC, and second flash memory 21 is MLC; Please refer to Fig. 6, the step of two kinds of dissimilar flash memory parameters of present embodiment configuration is as follows:
Step S110 determines the flash memory of required reference address correspondence;
Step S111 accesses the relevant information of required visit flash memory;
Step S112 is according to configuration information unit 120 configuration flash memory parameters.
Above-mentioned control module 12 processing units 122 receive external device instruction, when needing the visit flash memory, according to external command and the first configuration information unit 120, the second configuration information unit 121, determine the flash memory of required visit; Behind the flash memory of determining to visit, the configuration information of this flash memory is accessed;
And, configure parameters such as side-play amount according to the configuration information and the bad block table of configuration information unit 120, make flash memory have the connected reference address; As when visiting flash memory, the situation that has part to damage, will there be certain deviation in actual access address and required reference address, and actual access address computation formula is: actual access address=required reference address+side-play amount.
At last,, directly visit flash memory according to obtained actual access address, and the feedback external unit.
Please refer to Fig. 7, present embodiment determines that the step of flash memory of required reference address correspondence is as follows:
Step S1100 inquires about the capacity of first flash memory 20;
Step S1101 compares required reference address and the flash capacity that inquires;
Step S1102 judges that whether the flash sector number is less than reference address; In this way, can determine that first flash memory 20 is required visit flash memory; As not, carry out step S1103;
Step S1103 inquires about the capacity of next flash memory, and turns back to step S1101.
The processing unit 122 of above-mentioned control module 12 is set the visit order for flash memory; As SLC being set at first flash memory 20, MLC is second flash memory 21; During visit, visit first flash memory 20 earlier according to order; As the flash disk that synthesizes a 2G with a 1.5G and 0.5G, when needs visit 1.7G address, the capacity of inquiry first flash memory 20 compares then earlier; Relatively draw first flash memory, 20 capacity less than 1.7G after above-mentioned control module 12 inquire about second flash memory 21 according to order, find second flash memory, 21 capacity that 500M is arranged and required 1.7G address has only 200M (1.7G-1.5G) with respect to second flash memory, so determine the address in second flash memory 21, promptly required visit flash memory is second flash memory 21.
After determining the flash memory of required reference address correspondence, dispose flash memory parameter (as described in step S110-S112) again, as described in the step S12, obtain actual address visit flash memory then according to parameter.
Method realizes the combination of dissimilar flash memories in the present embodiment, the advantage of performance all kinds flash memory; Simultaneously, set two flash memory parameters by processing unit 122, but make two flash memory address connected references; Reach the purpose that is used in combination two flash memories.The number of above-mentioned flash memory can be a plurality of, not limit by this embodiment.Memory device in the present embodiment also is not limited to flash memory, can also be other memory devices.
The above only is the preferred embodiments of the present invention; be not so limit claim of the present invention; every equivalent structure or equivalent flow process conversion that utilizes instructions of the present invention and accompanying drawing content to be done; or directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the present invention.
Claims (10)
1. a memory storage that is used in combination memory device is characterized in that, comprising:
At least the first memory device and second memory device and control module, described control module are connected with second memory device with described first memory device respectively;
Described control module comprises the configuration information unit, is used to write down the information of described memory device; And
Processing unit is connected with external unit with the configuration information unit respectively, by the parameter of configure storage devices, makes described first memory device and second memory device have the connected reference address.
2. the memory storage that is used in combination memory device according to claim 1 is characterized in that, described first memory device is identical and/or different types of memory device with second memory device.
3. the memory storage that is used in combination memory device according to claim 1 is characterized in that, the information of described configuration information unit record memory device comprises configuration information and bad block table.
4. the memory storage that is used in combination memory device according to claim 1 is characterized in that, described configuration information unit is corresponding with the memory device kind, makes the memory device correspondence of a kind that at least one configuration information unit is set.
5. according to any described memory storage that is used in combination memory device in the claim 1 to 4, it is characterized in that described memory device is a flash memory.
6. the memory storage that is used in combination memory device according to claim 3 is characterized in that, described configuration information comprises: type, piece number, every number of pages, every page of sector number and/or visit clock period.
7. the coupling arrangement that the memory device combination can be used is used at least the first memory device and the combination of second memory device are used, and it is characterized in that, comprising:
The configuration information unit, the configuration information and the bad block table of record, the described memory device of maintenance;
Processing unit is connected with external unit with the configuration information unit respectively, by the parameter of configure storage devices, makes memory device have the connected reference address; The memory device combination is used.
8. realize the method for storage based on the memory storage that is used in combination memory device for one kind, described memory storage comprises at least the first memory device and second memory device, control module and processing unit; It is characterized in that described method comprises step:
Receive external command, obtain required reference address;
The configure storage devices parameter makes at least the first memory device and second memory device have the connected reference address;
Visit described memory device according to required reference address.
9. the method based on the memory storage realization storage that is used in combination memory device according to claim 8 is characterized in that the step of described configure storage devices parameter is as follows:
Determine the memory device of required reference address correspondence;
Access the relevant information of described memory device;
According to relevant information configure storage devices parameter.
10. the method based on the memory storage realization storage that is used in combination memory device according to claim 9 is characterized in that the step of the memory device of described definite required reference address correspondence is as follows:
Inquire about the capacity of first memory device;
Required reference address and the capacity of memory device that inquires are compared;
Judge that whether capacity of memory device is less than reference address; In this way, can determine that current memory device is required accessing storage device; As not, carry out next step;
Inquire about the capacity of next memory device, carry out the step that required reference address and the capacity of memory device that inquires are compared.
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| CNA2008100880839A CN101552028A (en) | 2008-03-31 | 2008-03-31 | Storage device for combining and using storage equipment and method for realizing storage |
| PCT/CN2009/071102 WO2009121291A1 (en) | 2008-03-31 | 2009-03-31 | Storage device and storage method |
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| CNA2008100880839A CN101552028A (en) | 2008-03-31 | 2008-03-31 | Storage device for combining and using storage equipment and method for realizing storage |
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| CN103176927A (en) * | 2011-10-24 | 2013-06-26 | 联阳半导体股份有限公司 | Mapping between two buses using serial addressing bits |
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| WO2009121291A1 (en) | 2009-10-08 |
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Application publication date: 20091007 |