CN101520580A - TFT-LCD array substrate structure and manufacturing method thereof - Google Patents
TFT-LCD array substrate structure and manufacturing method thereof Download PDFInfo
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- CN101520580A CN101520580A CN 200810101107 CN200810101107A CN101520580A CN 101520580 A CN101520580 A CN 101520580A CN 200810101107 CN200810101107 CN 200810101107 CN 200810101107 A CN200810101107 A CN 200810101107A CN 101520580 A CN101520580 A CN 101520580A
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- 239000000758 substrate Substances 0.000 title claims abstract description 60
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 32
- 238000002161 passivation Methods 0.000 claims abstract description 90
- 238000009413 insulation Methods 0.000 claims abstract description 23
- 239000010409 thin film Substances 0.000 claims abstract description 9
- 238000005516 engineering process Methods 0.000 claims description 91
- 239000000203 mixture Substances 0.000 claims description 82
- 229910052751 metal Inorganic materials 0.000 claims description 62
- 239000002184 metal Substances 0.000 claims description 62
- 238000000034 method Methods 0.000 claims description 61
- 230000015572 biosynthetic process Effects 0.000 claims description 16
- 238000000151 deposition Methods 0.000 claims description 12
- 230000008021 deposition Effects 0.000 claims description 12
- 238000004062 sedimentation Methods 0.000 claims description 12
- 238000004070 electrodeposition Methods 0.000 claims description 8
- 239000003990 capacitor Substances 0.000 abstract description 6
- 238000005530 etching Methods 0.000 description 19
- 239000004065 semiconductor Substances 0.000 description 15
- 238000002207 thermal evaporation Methods 0.000 description 10
- 238000010586 diagram Methods 0.000 description 9
- 229910045601 alloy Inorganic materials 0.000 description 8
- 239000000956 alloy Substances 0.000 description 8
- 229910052782 aluminium Inorganic materials 0.000 description 8
- 229910052804 chromium Inorganic materials 0.000 description 8
- 229910052802 copper Inorganic materials 0.000 description 8
- 229910052750 molybdenum Inorganic materials 0.000 description 8
- 229910052715 tantalum Inorganic materials 0.000 description 8
- 229910052719 titanium Inorganic materials 0.000 description 8
- 229910052721 tungsten Inorganic materials 0.000 description 8
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 7
- 150000004767 nitrides Chemical class 0.000 description 4
- 239000010408 film Substances 0.000 description 3
- 238000004380 ashing Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- JAONJTDQXUSBGG-UHFFFAOYSA-N dialuminum;dizinc;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Al+3].[Al+3].[Zn+2].[Zn+2] JAONJTDQXUSBGG-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
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- 238000000427 thin-film deposition Methods 0.000 description 1
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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Abstract
The invention relates to a TFT-LCD array substrate structure and a manufacturing method thereof. The array substrate structure comprises a plurality of grid lines and data lines on the substrate; pixel electrodes are formed in the pixel regions defined by the grid lines and data lines; and thin-film transistors are formed at the intersections of the grid lines and data lines. The thin-film transistor comprises a gate electrode, a gate insulation layer, an active layer, a source/drain electrode layer and a passivation layer as well as common electrode wires which are arranged among the data lines on and off and form a memory capacitor with the pixel electrodes. The common electrode wires and the source/drain electrode layer are arranged at the same layer and connected by a connecting electrode. Compared with the TFT-LCD array substrate structure of the prior art, with the same common electrode wire width, the memory capacitor formed by the structure provided by the invention is significantly improved; with the same memory capacitor, the common electrode wire of the structure provided by the invention has a smaller width, thereby increasing the aperture opening ratio. Besides, the common electrode wire reduces step difference, thus being conducive to the improvement of the TFT-LCD contrast ratio.
Description
Technical field
The present invention relates to a kind of Thin Film Transistor-LCD and manufacture method thereof, especially a kind of TFT-LCD array substrate structure and manufacture method thereof.
Background technology
Thin Film Transistor-LCD (Thin Film Transistor Liquid CrystalDisplay, abbreviation TFT-LCD) array base palte becomes box-like with color membrane substrates, have characteristics such as volume is little, low in energy consumption, radiationless, occupied leading position in current flat panel display market.
Figure 11 a is the planimetric map of prior art TFT-LCD array base-plate structure, Figure 11 b be among Figure 11 a J-J to sectional view.Shown in Figure 11 a, Figure 11 b, prior art TFT-LCD array base-plate structure comprises grid line 2b, public electrode wire 2c and data line 5c, grid line 2b and data line 5c define pixel region, and at infall formation TFT, TFT comprises the gate electrode 2a that is connected with grid line 2b, as the active layer 4 of switches conductive medium with form the drain electrode 5a and the source electrode 5b of TFT raceway groove, source electrode 5b is connected with data line 5c, drain electrode 5a is connected with pixel electrode 7, public electrode wire 2c is parallel with grid line 2b, and between adjacent two grid line 2b.Particularly, gate electrode 2a is formed on the substrate 1, gate insulation layer 3 is formed on the whole base plate 1 with gate electrode pattern, active layer 4 (comprising semiconductor layer and doping semiconductor layer) is formed on the gate electrode 2a, the drain electrode 5a and the source electrode 5b that form the TFT raceway groove are formed on the active layer 4, passivation layer 6 is formed on drain electrode 5a and the source electrode 5b, and offer the first passivation layer via hole 6a in drain electrode 5a position, pixel electrode 7 is formed in the pixel region, and is connected with drain electrode 5a by the first passivation layer via hole 6a.The preparation process of prior art TFT-LCD array base-plate structure comprises: form gate electrode, grid line and public electrode line graph; Form gate insulation layer and active layer; Formation source electrode, drain electrode and data line; Form passivation layer; Form pixel electrode.Each step all comprises thin film deposition, exposure and three main technique such as pattern formation, etching.
Memory capacitance is a very important parameter in the array base-plate structure design, its effect mainly is in order to allow pixel electrode finish charging, make pixel electrode can remain to frame update next time, therefore the size of memory capacitance not only influences the operate as normal of pixel, and the whole display quality of TFT-LCD is had significant effects.Normally utilize pixel electrode and grid line or public electrode wire to form parallel plate capacitor at present, promptly memory capacitance is in (Cst on Common) the two kinds of structures on public electrode wire of (Cst on Gate) and memory capacitance on the grid line.
Two kinds of structures of this of memory capacitance have merits and demerits separately respectively.For memory capacitance structure on grid line since with memory capacitance design on grid line, so TFT-LCD has high aperture opening ratio, but the RC that this memory capacitance can increase on the grid line conversely postpones, and then reduces the charge rate of TFT, influences display quality.For memory capacitance structure on public electrode wire, owing to be to utilize pixel electrode and public electrode wire to form parallel plate capacitor, thereby the RC that can not influence on the grid line postpones, but because public electrode wire and grid line are to form with in a composition technology, therefore the vertical range between public electrode wire and pixel electrode is the thickness summation of gate insulation layer and passivation layer, because distance between plates is from bigger, in order to guarantee the size of memory capacitance, generally need to increase the area (width) of public electrode wire, but can significantly reduce the aperture opening ratio of TFT-LCD like this.Simultaneously,, therefore also can influence the orientation of liquid crystal molecule, reduce the contrast of TFT-LCD owing to can form bigger section poor (equaling the grid metal layer thickness) around the public electrode wire.
Summary of the invention
The purpose of this invention is to provide a kind of TFT-LCD array base-plate structure and manufacture method thereof, effectively solve the memory capacitance that the public electrode line structure exists among the existing TFT-LCD little, reduce aperture opening ratio and form technological deficiencies such as big section difference.
To achieve these goals, the invention provides a kind of TFT-LCD array base-plate structure, comprise the grid line and the data line that are formed on the substrate, form pixel electrode in the pixel region that described grid line and data line limit, and at infall formation thin film transistor (TFT), described thin film transistor (TFT) comprises gate electrode, gate insulation layer, active layer, source-drain electrode layer and passivation layer, also comprise being interrupted and be arranged between the described data line and form the public electrode wire of memory capacitance with described pixel electrode, described public electrode wire and described source-drain electrode layer are provided with layer, and interconnect by connection electrode.
Described public electrode wire offers passivation layer via hole near the passivation layer on the end position of data line, and described connection electrode is formed on the described passivation layer, and by described passivation layer via hole adjacent public electrode wire is interconnected.
On the technique scheme basis, described public electrode wire can be arranged between adjacent two grid lines, also can be provided with on the described grid line.
To achieve these goals, the present invention also provides a kind of TFT-LCD array base-plate structure manufacture method, comprising:
Step 2, deposit gate insulation layer on the substrate of completing steps 1, and form active layer, drain electrode, source electrode, data line and public electrode line graph, wherein public electrode wire is interrupted and is formed between two data lines;
Wherein, described step 2 can be specially:
Wherein, described step 2 also can be specially: metal level is leaked in successive sedimentation gate insulation layer, active layer and source on the substrate of completing steps 1, form active layer, drain electrode, source electrode, data line and public electrode line graph by shadow tone or the semi-transparent composition technology of crossing, wherein the public electrode wire interruption is formed between two data lines.
The present invention proposes a kind of TFT-LCD array base-plate structure and manufacture method thereof, can form the memory capacitance of new construction, with five composition technologies is example, by the first time composition technology formation gate electrode and grid line figure, by the second time composition technology form active layer pattern, by the drain electrode of composition technology formation for the third time, the source electrode, data line and public electrode line graph, form first passivation layer via hole in the drain electrode position and form second passivation layer via hole near the end position of data line by the 4th composition technology at public electrode wire, form pixel electrode and connection electrode by the 5th composition technology at last, make pixel electrode pass through first passivation layer via hole and be connected, connection electrode is interconnected adjacent public electrode wire by second passivation layer via hole with drain electrode.Though the present invention adopts memory capacitance structure on public electrode wire equally, but public electrode wire and drain electrode, source electrode and data line are provided with layer, forming with in a composition technology, form two parallel-plates of memory capacitance by public electrode wire and pixel electrode, vertical range between two parallel-plates is reduced into the thickness that has only passivation layer, helps the raising of memory capacitance.In addition, because the section difference that public electrode wire brings is leaked metal layer thickness for the source, the section of making difference is reduced, and helps the raising of TFT-LCD contrast.Further, because public electrode wire and drain electrode, source electrode and data line are provided with layer, public electrode wire can be arranged on the grid line, when increasing memory capacitance, has greatly increased aperture opening ratio.
Compare with prior art TFT-LCD array base-plate structure, the formed storage capacitor construction of TFT-LCD array base-plate structure of the present invention has following advantage:
(1) when identical public electrode line width, the memory capacitance that the present invention forms has obvious increase;
(2) when identical memory capacitance size, the width of public electrode wire of the present invention is little, has increased aperture opening ratio;
(3) in the time of on public electrode wire is arranged on grid line, the present invention has greatly increased aperture opening ratio when obviously increasing memory capacitance.
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
Description of drawings
Fig. 1 a is the planimetric map of TFT-LCD array base-plate structure first embodiment of the present invention;
Fig. 1 b be among Fig. 1 a A-A to sectional view;
Fig. 1 c be among Fig. 1 a B-B to sectional view;
Fig. 2 a is the planimetric map after the TFT-LCD array base-plate structure composition technology first time of the present invention;
Fig. 2 b be among Fig. 2 a C-C to sectional view;
Fig. 3 a is the planimetric map after the TFT-LCD array base-plate structure composition technology second time of the present invention;
Fig. 3 b be among Fig. 3 a D-D to sectional view;
Fig. 4 a is TFT-LCD array base-plate structure of the present invention planimetric map after the composition technology for the third time;
Fig. 4 b be among Fig. 4 a E-E to sectional view;
Fig. 4 c be among Fig. 4 a F-F to sectional view;
Fig. 5 a is the planimetric map after the 4th composition technology of TFT-LCD array base-plate structure of the present invention;
Fig. 5 b be among Fig. 5 a G-G to sectional view;
Fig. 5 c be among Fig. 5 a H-H to sectional view;
Fig. 6 a is the planimetric map of TFT-LCD array base-plate structure second embodiment of the present invention;
Fig. 6 b be among Fig. 6 a I-I to sectional view;
Fig. 7 is the process flow diagram of TFT-LCD array base-plate structure manufacture method first embodiment of the present invention;
Fig. 8 is the process flow diagram of TFT-LCD array base-plate structure manufacture method second embodiment of the present invention;
Fig. 9 is the process flow diagram of TFT-LCD array base-plate structure manufacture method the 3rd embodiment of the present invention;
Figure 10 is the process flow diagram of TFT-LCD array base-plate structure manufacture method the 4th embodiment of the present invention;
Figure 11 a is the planimetric map of prior art TFT-LCD array base-plate structure;
Figure 11 b be among Figure 11 a J-J to sectional view.
Description of reference numerals:
1-substrate; 2a-gate electrode; 2b-grid line;
2c-public electrode wire; 3-gate insulation layer; 4-active layer
5a-drain electrode; 5b-source electrode; 5c-data line;
5d-public electrode wire; 6-passivation layer; 6a-first passivation layer via hole;
6b-second passivation layer via hole; 7-pixel electrode; 8-connection electrode.
Embodiment
Fig. 1 a is the planimetric map of TFT-LCD array base-plate structure first embodiment of the present invention, Fig. 1 b be among Fig. 1 a A-A to sectional view, Fig. 1 c be among Fig. 1 a B-B to sectional view.As Fig. 1 a, shown in Fig. 1 b and Fig. 1 c, present embodiment TFT-LCD array base-plate structure comprises grid line 2b, data line 5c and public electrode wire 5d, grid line 2b and data line 5c define pixel region, and at infall formation TFT, TFT comprises the gate electrode 2a that is connected with grid line 2b, as the active layer 4 of switches conductive medium and the drain electrode 5a and the source electrode 5b of formation TFT raceway groove, source electrode 5b is connected with data line 5c, passivation layer 6 on the drain electrode 5a offers the first passivation layer via hole 6a, pixel electrode 7 is formed on pixel region, and be connected with drain electrode 5a by the first passivation layer via hole 6a, be disposed on public electrode wire 5d between the data line 5c between adjacent two grid lines and with drain electrode 5a, source electrode 5b and data line 5c are provided with layer, it is near offering the second passivation layer via hole 6b on the passivation layer 6 on the end position of data line 5c, connection electrode 8 is provided with layer with pixel electrode 7, and the second passivation layer via hole 6b by two vicinities interconnects public electrode wire 5d.
Fig. 2 a～Fig. 5 c is the manufacturing synoptic diagram of TFT-LCD array base-plate structure of the present invention, be example with five composition technologies below, process for making by the TFT-LCD array base-plate structure further specifies technical scheme of the present invention, in the following description, the alleged composition technology of the present invention comprises technologies such as photoresist coating, mask, exposure, etching.
Fig. 2 a is TFT-LCD array base-plate structure of the present invention planimetric map after the composition technology for the first time, Fig. 2 b be among Fig. 2 a C-C to sectional view.Adopt the method for sputter or thermal evaporation, going up deposition one layer thickness at substrate 1 (as glass substrate or quartz base plate) is 500
～4000
The grid metal level.The grid metal level can use metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu, and the grid metal level also can be made up of the multiple layer metal film.By the first time composition technology grid metal level is carried out etching, on substrate 1, form gate electrode 2a and grid line 2b figure, shown in Fig. 2 a, Fig. 2 b.
Fig. 3 a is TFT-LCD array base-plate structure of the present invention planimetric map after the composition technology for the second time, Fig. 3 b be among Fig. 3 a D-D to sectional view.On the substrate of finishing gate electrode and grid line pattern, be 1000 by plasma enhanced chemical vapor deposition (be called for short PECVD) method successive sedimentation thickness
～4000
Gate insulation layer 3, thickness be 1000
～4000
Active layer 4, active layer 4 comprises that thickness is 1000
～3000
Semiconductor layer and thickness be 300
～600
Doping semiconductor layer (ohmic contact layer).Gate insulation layer can be selected oxide, nitride or oxynitrides for use, and corresponding reacting gas can be SiH
4, NH
3, N
2Mixed gas or SiH
2Cl
2, NH
3, N
2Mixed gas, the reacting gas of active layer correspondence can be SiH
4, H
2Mixed gas or SiH
2Cl
2, H
2Mixed gas.After above-mentioned each layer deposition finished, by the second time composition technology active layer 4 is carried out etching, form active layer 4 figures, shown in Fig. 3 a, Fig. 3 b.
Fig. 4 a is TFT-LCD array base-plate structure of the present invention planimetric map after the composition technology for the third time, Fig. 4 b be among Fig. 4 a E-E to sectional view, Fig. 4 c be among Fig. 4 a F-F to sectional view.After forming active layer 4 figures, by the method for sputter or thermal evaporation, deposit thickness is 500
～2500
The source leak metal level, metal level is leaked in the source can select metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu for use.By composition technology for the third time metal level is leaked in the source and carry out etching, form drain electrode 5a, source electrode 5b, data line 5c and public electrode wire 5d figure, be TFT raceway groove figure between drain electrode 5a and the source electrode 5b wherein, etch away the doping semiconductor layer in the active layer 4 in the TFT raceway groove figure fully, data line 5c is vertical with grid line 2b, public electrode wire 5d interruption is formed between two data line 5c, shown in Fig. 4 a, Fig. 4 b and Fig. 4 c.
Fig. 5 a is the planimetric map after the 4th composition technology of TFT-LCD array base-plate structure of the present invention, Fig. 5 b be among Fig. 5 a G-G to sectional view, Fig. 5 c be among Fig. 5 a H-H to sectional view.After forming drain electrode 5a, source electrode 5b, data line 5c and public electrode wire 5d figure, be 700 by PECVD method deposit thickness
～2000
Passivation layer 6, passivation layer 6 can adopt oxide, nitride or oxynitrides, corresponding reacting gas can be SiH
4, NH
3, N
2Mixed gas or SiH
2Cl
2, NH
3, N
2Mixed gas.By the 4th composition technology passivation layer 6 is carried out etching, form the first passivation layer via hole 6a in drain electrode 5a position, make the first passivation layer via hole 6a expose drain electrode 5a, end position at the close data line 5c of public electrode wire 5d forms the second passivation layer via hole 6b, make the second passivation layer via hole 6b expose public electrode wire 5d, shown in Fig. 5 a, Fig. 5 b and Fig. 5 c.
At last, by the method for sputter or thermal evaporation, deposit thickness is 300
～600
Transparency conducting layer, transparency conducting layer is generally tin indium oxide, indium zinc oxide or aluminum zinc oxide etc.By the 5th composition technology transparency conducting layer is carried out etching, form pixel electrode 7 figures at pixel region, pixel electrode 7 is connected with drain electrode 5a by the first passivation layer via hole 6a, end regions at public electrode wire 5d forms connection electrode 8 figures, connection electrode 8 is interconnected adjacent public electrode wire 5d by the second passivation layer via hole 6b, shown in Fig. 1 a, Fig. 1 b and Fig. 1 c.
By the manufacture process of the invention described above TFT-LCD array base-plate structure as can be seen, though TFT-LCD array base-plate structure of the present invention adopts memory capacitance (Cst on Common) structure on public electrode wire equally, but public electrode wire and drain electrode, source electrode and data line are provided with layer, forming with in a composition technology, form two parallel-plates of memory capacitance like this by public electrode wire and pixel electrode, vertical range between two parallel-plates only is the thickness of passivation layer, distance between memory capacitance the two poles of the earth is dwindled greatly, helps the raising of memory capacitance.In addition, because the section difference that public electrode wire brings is leaked metal layer thickness for the source, and metal layer thickness is leaked in the grid metal layer thickness source that is greater than usually, the section difference that is to say public electrode wire this moment is reduced, the segment difference helps the even orientation of liquid crystal molecule, reduce light leakage phenomena, therefore help the raising of TFT-LCD contrast.
In the manufacture process of TFT-LCD array base-plate structure of the present invention shown in Fig. 2 a～Fig. 5 c, can also prepare shield bars according to the design needs, wherein shield bars can be provided with layer with grid line, also can be provided with layer with public electrode wire.When shield bars and grid line were provided with layer, TFT-LCD array base-plate structure of the present invention composition technology for the first time was specially: adopt the method for sputter or thermal evaporation, deposition one layer thickness is 500 on substrate 1
～4000
The grid metal level.The grid metal level can use metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu, and the grid metal level also can be made up of the multiple layer metal film.By the first time composition technology grid metal level is carried out etching, on substrate, form gate electrode, grid line and shield bars figure.When shield bars and public electrode wire were provided with layer, TFT-LCD array base-plate structure of the present invention composition technology for the third time is specially: by the method for sputter or thermal evaporation, deposit thickness was 500
～2500
The source leak metal level, metal level is leaked in the source can select metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu for use, by composition technology for the third time metal level is leaked in the source and carry out etching, form drain electrode, source electrode, data line, public electrode wire and shield bars figure, it wherein between drain electrode and the source electrode TFT raceway groove figure, etch away the doping semiconductor layer in the active layer in the TFT raceway groove figure fully, data line is vertical with grid line, the public electrode wire interruption is formed between two data lines, and shield bars is set in parallel in a side or two sides of data line.In actual use, when shield bars and the same layer of public electrode wire, shield bars can also be connected with public electrode wire.
In actual use, TFT-LCD array base-plate structure of the present invention also can adopt the manufacturing of four composition technology to finish.In four composition technology, the technology that forms gate electrode and grid line figure, formation first passivation layer via hole and second passivation layer via hole, formation pixel electrode and connection electrode is ditto described, with aforementioned second time composition technology and for the third time composition technology be merged into a composition technology, be specially: on the substrate of finishing gate electrode and grid line pattern, be 1000 by PECVD method successive sedimentation thickness
～4000
Gate insulation layer, thickness be 1000
～4000
Active layer, active layer comprises that thickness is 1000
～3000
Semiconductor layer and thickness be 300
～600
Doping semiconductor layer (ohmic contact layer).Finish on the substrate of above-mentioned technology by the method for sputter or thermal evaporation, deposit thickness is 500
～2500
The source leak metal level, metal level is leaked in the source can select metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu for use.Carry out shadow tone (HTM) or the semi-transparent exposure technology of crossing mask plate afterwards, earlier metal level is leaked in the source and carry out etching, and then the TFT raceway groove figure of double exposure area carries out ashing and etching processing, form active layer, drain electrode, source electrode, data line and public electrode line graph, it wherein between drain electrode and the source electrode TFT raceway groove figure, etch away the doping semiconductor layer in the active layer in the TFT raceway groove figure fully, data line is vertical with grid line, and the public electrode wire interruption is formed between two data lines.
Fig. 6 a is the planimetric map of TFT-LCD array base-plate structure second embodiment of the present invention, Fig. 6 b be among Fig. 6 a I-I to sectional view.Shown in Fig. 6 a and Fig. 6 b, the structures such as the gate electrode 2a of present embodiment TFT-LCD array base-plate structure, grid line 2b, active layer 4, drain electrode 5a, source electrode 5b and data line 5c and first embodiment are basic identical, different is that public electrode wire 5d is arranged on the grid line.Particularly, grid line 2b and data line 5c define pixel region, and at infall formation TFT, TFT comprises the gate electrode 2a that is connected with grid line 2b, as the active layer 4 of switches conductive medium and the drain electrode 5a and the source electrode 5b of formation TFT raceway groove, source electrode 5b is connected with data line 5c, passivation layer 6 on the drain electrode 5a offers the first passivation layer via hole 6a, pixel electrode 7 is formed on pixel region, and be connected with drain electrode 5a by the first passivation layer via hole 6a, the public electrode wire 5d that is disposed between the data line 5c is positioned on the grid line 2b, and with drain electrode 5a, source electrode 5b and data line 5c are provided with layer, it is near offering the second passivation layer via hole 6b on the passivation layer 6 on the end position of data line 5c, connection electrode 8 is provided with layer with pixel electrode 7, and the second passivation layer via hole 6b by two vicinities interconnects public electrode wire 5d.
In the present embodiment,, therefore public electrode wire is arranged on the grid line, when increasing memory capacitance, has greatly increased aperture opening ratio because public electrode wire and drain electrode, source electrode and data line are provided with layer.
Said structure only is the enforcement structure of TFT-LCD array base-plate structure of the present invention, under the guiding theory with layer setting with public electrode wire and drain electrode, source electrode and data line, other array base-plate structure form can be arranged also, repeats no more.
Fig. 7 is the process flow diagram of TFT-LCD array base-plate structure manufacture method first embodiment of the present invention, is specially:
Particularly, adopt the method for sputter or thermal evaporation, going up deposition one layer thickness at substrate (as glass substrate or quartz base plate) is 500
～4000
The grid metal level.The grid metal level can use metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu, and the grid metal level also can be made up of the multiple layer metal film.By the first time composition technology grid metal level is carried out etching, on substrate, form gate electrode and grid line figure.On the substrate of finishing gate electrode and grid line pattern, be 1000 by PECVD method successive sedimentation thickness
～4000
Gate insulation layer, thickness be 1000
～4000
Active layer, active layer comprises that thickness is 1000
～3000
Semiconductor layer and thickness be 300
～600
Doping semiconductor layer (ohmic contact layer).Gate insulation layer can be selected oxide, nitride or oxynitrides for use.After above-mentioned each layer deposition finished, by the second time composition technology active layer is carried out etching, form active layer pattern.After forming active layer pattern, by the method for sputter or thermal evaporation, deposit thickness is 500
～2500
The source leak metal level, metal level is leaked in the source can select metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu for use.By composition technology for the third time metal level is leaked in the source and carry out etching, form drain electrode, source electrode, data line and public electrode line graph, it wherein between drain electrode and the source electrode TFT raceway groove figure, etch away the doping semiconductor layer in the active layer in the TFT raceway groove figure fully, data line is vertical with grid line, and the public electrode wire interruption is formed between two data lines.After forming drain electrode, source electrode, data line and public electrode line graph, be 700 by PECVD method deposit thickness
～2000
Passivation layer, passivation layer can adopt oxide, nitride or oxynitrides.By the 4th composition technology passivation layer is carried out etching, form first passivation layer via hole in the drain electrode position, make first passivation layer via hole expose drain electrode, end position at the close data line of public electrode wire forms second passivation layer via hole, makes second passivation layer via hole expose public electrode wire.At last, by the method for sputter or thermal evaporation, deposit thickness is 300
～600
Transparency conducting layer, transparency conducting layer is generally tin indium oxide, indium zinc oxide or aluminum zinc oxide etc.By the 5th composition technology transparency conducting layer is carried out etching, form the pixel electrode figure at pixel region, making pixel electrode pass through first passivation layer via hole is connected with drain electrode, end regions at public electrode wire forms the connection electrode figure, and connection electrode is interconnected adjacent public electrode wire by second passivation layer via hole.In technique scheme of the present invention, the alleged composition technology of the present invention comprises technologies such as photoresist coating, mask, exposure, etching.
The invention provides a kind of TFT-LCD array base-plate structure manufacture method, though form memory capacitance (Cst on Common) structure on public electrode wire equally, but public electrode wire and drain electrode, source electrode and data line are forming with in a composition technology, be that public electrode wire and drain electrode, source electrode and data line are provided with layer, form two parallel-plates of memory capacitance by public electrode wire and pixel electrode, vertical range between two parallel-plates only is the thickness of passivation layer, distance between memory capacitance the two poles of the earth is dwindled greatly, helps the raising of memory capacitance.In addition, because the section difference that public electrode wire brings is leaked metal layer thickness for the source, and metal layer thickness is leaked in the grid metal layer thickness source that is greater than usually, that is to say that the section difference of public electrode wire this moment is reduced, and this will help the raising of TFT-LCD contrast.Further, because public electrode wire and drain electrode, source electrode and data line are provided with layer, public electrode wire can be arranged between two grid lines, also can be arranged on the grid line, when increasing memory capacitance, has greatly increased aperture opening ratio.
Fig. 8 is the process flow diagram of TFT-LCD array base-plate structure manufacture method second embodiment of the present invention, is specially:
Different with the TFT-LCD array base-plate structure manufacture method first embodiment technical scheme of the present invention shown in Figure 7 is, present embodiment is to form the shield bars pattern in the first time simultaneously in the composition technology, be that shield bars and grid line are provided with layer, other process is basic identical, repeats no more.
Fig. 9 is the process flow diagram of TFT-LCD array base-plate structure manufacture method the 3rd embodiment of the present invention, is specially:
Different with the TFT-LCD array base-plate structure manufacture method first embodiment technical scheme of the present invention shown in Figure 7 is, present embodiment is to form the shield bars pattern simultaneously in the composition technology for the third time, be that shield bars and public electrode wire are provided with layer, shield bars can also be connected with public electrode wire, other process is basic identical, repeats no more.
Figure 10 is the process flow diagram of TFT-LCD array base-plate structure manufacture method the 4th embodiment of the present invention, is specially:
Step 41, on substrate deposition grid metal level, form gate electrode and grid line figure by composition technology;
Step 42, metal level is leaked in successive sedimentation gate insulation layer, active layer and source on the substrate of completing steps 41, form active layer, drain electrode, source electrode, data line and public electrode line graph by shadow tone (HTM) or the semi-transparent composition technology of crossing, wherein the public electrode wire interruption is formed between two data lines;
Step 43, on the substrate of completing steps 42 deposit passivation layer, form first passivation layer via hole by composition technology in the drain electrode position, form second passivation layer via hole at public electrode wire near the end position of data line;
Step 44, on the substrate of completing steps 43 the deposit transparent conductive layer, form the pixel electrode figure and form the connection electrode figure at pixel region by composition technology at the end regions of public electrode wire, make pixel electrode pass through first passivation layer via hole and be connected, make connection electrode interconnect public electrode wire by second passivation layer via hole with drain electrode.
Different with five composition technologies of TFT-LCD array base-plate structure manufacture method first embodiment of the present invention shown in Figure 7, present embodiment is four composition technologies.In four composition technologies of present embodiment, it is identical with aforementioned first embodiment with the technology of grid line figure, formation first passivation layer via hole and second passivation layer via hole, formation pixel electrode and connection electrode to form gate electrode, different is with among first embodiment the second time composition technology and for the third time composition technology be merged into a composition technology, be specially: on the substrate of finishing gate electrode and grid line pattern, be 1000 by PECVD method successive sedimentation thickness
～4000
Gate insulation layer, thickness be 1000
～4000
Active layer, active layer comprises that thickness is 1000
～3000
Semiconductor layer and thickness be 300
～600
Doping semiconductor layer (ohmic contact layer).Finish on the substrate of above-mentioned technology by the method for sputter or thermal evaporation, deposit thickness is 500
～2500
The source leak metal level, metal level is leaked in the source can select metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu for use.Carry out shadow tone (HTM) or the semi-transparent exposure technology of crossing mask plate afterwards, earlier metal level is leaked in the source and carry out etching, and then the TFT raceway groove figure of double exposure area carries out ashing and etching processing, form active layer, drain electrode, source electrode, data line and public electrode line graph, it wherein between drain electrode and the source electrode TFT raceway groove figure, etch away the doping semiconductor layer in the active layer in the TFT raceway groove figure fully, data line is vertical with grid line, and the public electrode wire interruption is formed between two data lines.Further, because public electrode wire and drain electrode, source electrode and data line are provided with layer, public electrode wire can be arranged between two grid lines, also can be arranged on the grid line, when increasing memory capacitance, has greatly increased aperture opening ratio.Certainly, present embodiment also can form the shield bars pattern simultaneously in composition technology, repeat no more.
Said method is only for the specific implementation method of TFT-LCD array base-plate structure manufacture method of the present invention, under the guiding theory with layer formation, also can there be other technological process to form required array base-plate structure with public electrode wire and drain electrode, source electrode and data line.
It should be noted that at last: above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and scope of technical solution of the present invention.
Claims (12)
1. TFT-LCD array base-plate structure, comprise the grid line and the data line that are formed on the substrate, form pixel electrode in the pixel region that described grid line and data line limit, and at infall formation thin film transistor (TFT), described thin film transistor (TFT) comprises gate electrode, gate insulation layer, active layer, source-drain electrode layer and passivation layer, it is characterized in that, also comprise being interrupted and be arranged between the described data line and form the public electrode wire of memory capacitance with described pixel electrode, described public electrode wire and described source-drain electrode layer are provided with layer, and interconnect by connection electrode.
2. TFT-LCD array base-plate structure according to claim 1, it is characterized in that, described public electrode wire offers passivation layer via hole near the passivation layer on the end position of data line, described connection electrode is formed on the described passivation layer, and by described passivation layer via hole adjacent public electrode wire is interconnected.
3. TFT-LCD array base-plate structure according to claim 1 is characterized in that, also comprises the shield bars that be arranged in parallel with described data line, and described shield bars and described grid line layer together are provided with, or described shield bars and the layer setting together of described public electrode wire.
4. according to the described TFT-LCD array base-plate structure of arbitrary claim in the claim 1～3, it is characterized in that described public electrode wire is arranged between adjacent two grid lines.
5. according to the described TFT-LCD array base-plate structure of arbitrary claim in the claim 1～3, it is characterized in that described public electrode wire is provided with on the described grid line.
6. a TFT-LCD array base-plate structure manufacture method is characterized in that, comprising:
Step 1, on substrate deposition grid metal level, form gate electrode and grid line figure by composition technology;
Step 2, deposit gate insulation layer on the substrate of completing steps 1, and form active layer, drain electrode, source electrode, data line and public electrode line graph, wherein public electrode wire is interrupted and is formed between two data lines;
Step 3, on the substrate of completing steps 2 deposit passivation layer, form first passivation layer via hole by composition technology in the drain electrode position, form second passivation layer via hole at public electrode wire near the end position of data line;
Step 4, on the substrate of completing steps 3 the deposit transparent conductive layer, form the pixel electrode figure and form the connection electrode figure at pixel region by composition technology at the end regions of public electrode wire, make pixel electrode pass through first passivation layer via hole and be connected, make connection electrode interconnect public electrode wire by second passivation layer via hole with drain electrode.
7. TFT-LCD array base-plate structure manufacture method according to claim 6 is characterized in that described step 2 is specially:
Step 21, on the substrate of completing steps 1 successive sedimentation gate insulation layer and active layer, form active layer pattern by composition technology;
Step 22, sedimentary origin leaks metal level on the substrate of completing steps 21, forms drain electrode, source electrode, data line and public electrode line graph by composition technology, and wherein public electrode wire is interrupted and is formed between two data lines.
8. TFT-LCD array base-plate structure manufacture method according to claim 6, it is characterized in that, described step 2 is specially: metal level is leaked in successive sedimentation gate insulation layer, active layer and source on the substrate of completing steps 1, form active layer, drain electrode, source electrode, data line and public electrode line graph by shadow tone or the semi-transparent composition technology of crossing, wherein the public electrode wire interruption is formed between two data lines.
9. TFT-LCD array base-plate structure manufacture method according to claim 7, it is characterized in that, described step 22 is specially: sedimentary origin leaks metal level on the substrate of completing steps 21, form drain electrode, source electrode, data line, public electrode wire and shield bars figure by composition technology, wherein the public electrode wire interruption is formed between two data lines, and shield bars is set in parallel in a side or two sides of data line.
10. TFT-LCD array base-plate structure manufacture method according to claim 6 is characterized in that described step 1 is specially: deposition grid metal level on substrate forms gate electrode, grid line and shield bars figure by composition technology.
11. according to the described TFT-LCD array base-plate structure of arbitrary claim manufacture method in the claim 6～9, it is characterized in that described public electrode wire is interrupted to be formed between two data lines and is specially: described public electrode wire is interrupted and is formed between two data lines and between adjacent two grid lines.
12. according to the described TFT-LCD array base-plate structure of arbitrary claim manufacture method in the claim 6～9, it is characterized in that described public electrode wire interruption is formed between two data lines and is specially: described public electrode wire interruption is formed between two data lines and is positioned on the described grid line.
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