CN101408688B - Wiring circuit board, manufacturing method for the wiring circuit board, and circuit module - Google Patents

Wiring circuit board, manufacturing method for the wiring circuit board, and circuit module Download PDF

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Publication number
CN101408688B
CN101408688B CN200810169136XA CN200810169136A CN101408688B CN 101408688 B CN101408688 B CN 101408688B CN 200810169136X A CN200810169136X A CN 200810169136XA CN 200810169136 A CN200810169136 A CN 200810169136A CN 101408688 B CN101408688 B CN 101408688B
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China
Prior art keywords
circuit board
projection
wired circuit
wiring layer
face
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Expired - Fee Related
Application number
CN200810169136XA
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Chinese (zh)
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CN101408688A (en
Inventor
饭岛朝雄
远藤仁誉
池永和夫
大平洋
三成尚人
加藤贵
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Tessera Inc
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Tessera Interconnect Materials Inc
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Publication date
Priority claimed from JP2003289319A external-priority patent/JP2005045191A/en
Priority claimed from JP2003307897A external-priority patent/JP2004343030A/en
Application filed by Tessera Interconnect Materials Inc filed Critical Tessera Interconnect Materials Inc
Publication of CN101408688A publication Critical patent/CN101408688A/en
Application granted granted Critical
Publication of CN101408688B publication Critical patent/CN101408688B/en
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

An object of the present invention is to reduce the number of steps necessary for connecting between a wiring circuit board and a printed circuit board and to achieve a low-cost wiring circuit board. A wiring circuit board (2) includes an insulating film (4), a bump (6), an etching barrier layer (8), and a wiring layer (10). The bump (6) is made of copper and formed to penetrate through the insulating film (4). A top face of the bump (6) is exposed at a surface of the insulating film (4) flush therewith. The etching barrier layer (8) is made of nickel (Ni) and formed underneath the bump (6). The bump (6) is connected to the wiring layer (10) through the etching barrier layer (8). A solder ball (12) is formed on the top face of the bump (6). A printed circuit board (14) as a rigid board is connected to the wiring circuit board (2). A wiring layer (16) is connected to the bump (6) through the solder ball (12) to thereby mount the wiring circuit board (2) to the printed circuit board (14).

Description

The manufacture method of wired circuit board, wired circuit board and circuit module
The application is be on March 31st, 2004, application number the applying date for " 200410031894.7 ", denomination of invention divides an application for the application for a patent for invention of " manufacture method of wired circuit board, wired circuit board and circuit module ".
Technical field
The present invention relates to for example be used for installing the wired circuit board of electronic equipments such as IC, LSI.Be particularly related to the wired circuit board that can carry out high-density installation, the manufacture method of this wired circuit board and the circuit module that possesses this wired circuit board.
Background technology
The progress of semiconductor fabrication in recent years is very noticeable, because trickle figure such as mask process technology and etching technique forms the progress that leaps of technology, has realized the granular of semiconductor element.So, highly integrated in order to make circuit board, must make the circuit board multiple stratification, and fine form the connection between the wiring membrane up and down with high reliability.
The applicant is as the manufacturing technology of multilayer wiring circuit board, developed by come metal films such as etching Copper Foil by dry-etching from a face side, form vertical sectional shape and be roughly trapezoidal projection, and should projection as the wired circuit board of interlayer film conductor parts.And developed by suitably processing this wired circuit board, made the technology of multilayer wiring circuit board.
Now, by the method shown in Figure 13 A～Figure 13 I, realize connecting the method for the wiring layer of the projection of such wired circuit board and other tellites via soldered ball.At this, with reference to Figure 13 A～Figure 13 I, illustrate wired circuit board of the prior art manufacturing process and with the method for attachment of other tellites.Figure 13 A～Figure 13 I is the sectional view of substrate of showing the manufacture method of existing wired circuit board with process sequence.
As shown in FIG. 13A, stacked conducting plate 20 has been described.This stacked conducting plate 20 is by constituting with the lower part: be about 12～30[μ m by thickness] the wiring layer that constitutes of Copper Foil form and use metal level 20c; Stacked thereon, be about 0.5～2.0[μ m by thickness] the etch stop layer 20b that constitutes of Ni (nickel); Stacked more thereon, be about 80～150[μ m by thickness] convexing to form of constituting of Copper Foil use metal level 20a.
Then, on convexing to form, smear resist with metal level 20a.Then, use the exposed mask that has formed a plurality of circular patterns to expose, and then develop, thereby shown in Figure 13 B, form mask 5 against corrosion.
Then, shown in Figure 13 C, mask against corrosion 5 as mask, is convexed to form by etching and to carry out figure with metal level 20a and form, form the conducting projection 6 of the interlayer film conducting parts between wiring layer up and down.This projection 6 is a cone shape.
Illustrate in greater detail the shape of this projection 6.Mask 5 against corrosion is owing to having circular pattern, so the shape of cross section of projection 6 is circular.In addition, owing to the etching of carrying out based on Wet-type etching, so convex to form with metal level 20a isotropically etched.Thereby, the following etching solution that also entered of mask 5 against corrosion, with longitudinal direction side by side transverse direction also carry out etching (edge etching).Consequently the vertical sectional shape of projection 6 almost becomes trapezoidal.In addition, in this etching, etch stop layer 20b has prevented that wiring layer forms with metal level 20c etched when convexing to form the etching of using metal level 20a.
So shown in Figure 13 D, after peeling off mask 5 against corrosion, shown in Figure 13 E, as mask, etching is also removed etch stop layer 20b with projection 6.At this moment, use between the metal level 20c across etch stop layer 20b in projection 6 and wiring layer formation.
Then, shown in Figure 13 F, the dielectric film 4 that embedding is made of films such as resins above projection 6.Then, be formed on dielectric films 4 above the projection 6, form open pore 12a by etching selectively.Perhaps, by insulation course 4 irradiating lasers above being formed on projection 6, form open pore 12a.
Then, on dielectric film 4, form the metal level of the sandwich construction that constitutes by copper, nickel, gold etc. by electrochemical plating.Then, by this metal level of etching selectively, shown in Figure 13 C, form soldered ball basalis 12b at open pore 12a.And then, shown in Figure 13 H, form by etching wiring layer selectively and use metal level 20c, formation wiring layer 10.Then, on soldered ball basalis 12b, form soldered ball 12.
Then, each electrodes of semi-conductor chips such as LSI (not shown) is connected to each wiring layer 10, semi-conductor chip is installed on the wired circuit board.
In the prior art, after having formed dielectric film 4 on the wired circuit board, needed process number is a lot of till form soldered ball 12, and the high problem of manufacturing cost is arranged.According to prior art, carry out following a lot of operation: after having formed insulation course 4, form open pore 12a by selectively carrying out etching.Then, form the soldered ball basalis 12b of multilayer by electrochemical plating.Then, selectively carry out etching and form figure, make that the soldered ball basalis 12b that is connected with each projection 6 is independent.Then, form soldered ball 12.
Summary of the invention
The present invention is exactly the invention that addresses the above problem, and its objective is to reduce to connect the step of projection as wired circuit board He other tellites of interlayer link, consequently seeks to reduce the cost of wired circuit board.
In addition,, just not can fully not engage so do not handle between projection 6 and the dielectric film resin because dielectric film 4 uses the film of the solid shape that is made of resin etc., must be by the stacked dielectric film 4 of hot pressing.So, the device that needs hot pressing to use, in addition, owing to must carry out hot pressing by spended time, so the low problem of the production efficiency of wired circuit board is arranged.
On the other hand, following method is arranged: not via soldered ball 12, stacked other wiring layer forms and uses metal level on insulation course 4, forms wiring layer on the end face of projection 6.In this case, at insulation course 4 upper strata laying up lines formation metal levels, flatten projection 6 by pressurization, will connect up to form is connected on the dielectric film 4 with metal laminate, and projection 6 and wiring formation are coupled together with metal level.Then, form figure with metal level, on the end face of projection 6, form other wiring layer by this wiring formation of etching.
In such method, for example the thickness of the dielectric film after will making crimping 4 (projection 6 height) is about 50[μ m] the situation of wired circuit board under, form and use metal level owing to flatten protruding 6 crimping wiring membranes, be about 100[μ m so must be pre-formed height] projection 6.But, if form for example high 100[μ m that is about by Wet-type etching] projection 6, the etched influence in edge is then also arranged, being necessary to make the distance of 6 of adjacent projectioies is about 300～350[μ m].Trickle figure can not be formed, highly integrated wired circuit board can not be made.And then, can not make the highly integrated multi-layer wire substrate that has utilized wired circuit board.
The invention that the present invention still addresses the above problem provides the manufacture method of following wired circuit board: by using liquid insulating material, do not need hot pressing process when forming dielectric film, can enhance productivity.In addition, provide the manufacture method of following highly integrated wired circuit board: when the end face of projection forms wiring layer, form the operation that flattens projection with metal level by not carrying out the crimping wiring layer, and must not make projection with the above height of necessity.And then, also, provide highly integrated multi-layer wire substrate by stacked wired circuit board of the present invention.
The 1st invention is a circuit module, it is characterized in that: by constituting: on the surface of wiring layer with the lower part, directly or via etch stop layer ground form a plurality of projectioies, in the formation of above-mentioned wiring layer on the protruding face, form a wired circuit board of dielectric film in the part that does not form above-mentioned projection; Become the substrate of liquid crystal cell, liquid-crystal apparatus transparency carrier with transparent wiring membrane, the projection of a wherein above-mentioned wired circuit board directly or via the wiring layer on the end face that is formed on above-mentioned projection is connected with soldered ball ground with the pairing part of above-mentioned projection of above-mentioned liquid-crystal apparatus with the transparent wiring membrane of transparency carrier, constitutes liquid-crystal apparatus.
The 2nd invention is in the 1st inventive circuit module, and it is characterized in that: the end face of the projection of an above-mentioned wired circuit board forms concave spherical surface, directly forms soldered ball on this end face.
According to the 1st invention, can draw the transparent wiring membrane of liquid-crystal apparatus by wired circuit board of the present invention.
According to the 2nd invention, because the end face of projection forms the concave spherical surface shape, on its end face, directly form soldered ball, so can make the connection area bigger, make strength of joint stronger.Thereby can improve the reliability of circuit module, life-saving.
Description of drawings
Fig. 1 is the sectional view of the relevant wired circuit board of embodiment 1.
Fig. 2 A～Fig. 2 F is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 1 is relevant with process sequence.
Fig. 3 A～Fig. 3 B is the sectional view of displaying to the substrate of the example of wired circuit board installation semi-conductor chip.
Fig. 4 is the sectional view of the relevant wired circuit board of embodiment 2.
Fig. 5 A～Fig. 5 C is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 2 is relevant with process sequence.
Fig. 6 A～Fig. 6 E is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 3 is relevant with process sequence.
Fig. 7 is the sectional view of the relevant wired circuit board of embodiment 4.
Fig. 8 A～Fig. 8 D is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 4 is relevant with process sequence.
Fig. 9 is the sectional view of the relevant wired circuit board of embodiment 4.
Figure 10 A～Figure 10 C is the sectional view of the relevant circuit module of embodiment 5.
Figure 11 is the sectional view of the relevant circuit module of embodiment 6.
Figure 12 is the sectional view of the relevant circuit module of embodiment 7.
Figure 13 A～Figure 13 I is the sectional view with the substrate of the manufacture method of the relevant wired circuit board of process sequence displaying prior art.
Figure 14 A～Figure 14 G is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 8 is relevant with process sequence.
Figure 15 A～Figure 15 E is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 8 is relevant with process sequence.
Figure 16 A～Figure 16 F is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 9 is relevant with process sequence.
Figure 17 A～Figure 17 F is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 9 is relevant with process sequence.
Figure 18 A～Figure 18 E is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 10 is relevant with process sequence.
Figure 19 A～Figure 19 E is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 10 is relevant with process sequence.
Figure 20 A～Figure 20 D is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 11 is relevant with process sequence.
Figure 21 A～Figure 21 D is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 12 is relevant with process sequence.
Figure 22 A～Figure 22 C is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 13 is relevant with process sequence.
Figure 23 A～Figure 23 D is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 14 is relevant with process sequence.
Figure 24 A～Figure 24 F is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 15 is relevant with process sequence.
Figure 25 A～Figure 25 E is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 15 is relevant with process sequence.
Figure 26 A～Figure 26 C is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 16 is relevant with process sequence.
Figure 27 A～Figure 27 B is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 17 is relevant with process sequence.
Figure 28 A～Figure 28 D is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 18 is relevant with process sequence.
Figure 29 A～Figure 29 E is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 18 is relevant with process sequence.
Figure 30 A～Figure 30 E is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 19 is relevant with process sequence.
Figure 31 A～Figure 31 F is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 19 is relevant with process sequence.
Figure 32 A～Figure 32 E is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 20 is relevant with process sequence.
Figure 33 A～Figure 33 F is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 20 is relevant with process sequence.
Embodiment
The present invention is as the wired circuit board that is used for circuit module etc. substantially, the surface portion that is provided at wiring layer directly or via etch stop layer forms a plurality of projectioies, the part that does not form projection at this wiring layer forms dielectric film, on the end face of projection, directly or via making dielectric film surface and the projection wired circuit board of the wiring layer ground formation soldered ball of formation with being connected.This is superior for electric conductivity and physical strength.In addition, form projection, and the technology of using as the interlayer link is the established technology of the applicant with copper.
A suitable embodiment of wired circuit board of the present invention is: the protruding non-formation zone that convexes to form zone, formation projection that has formed projection is set on wired circuit board, with the non-formation zone design of projection is flexible zone, and will convex to form zone design is unbending zone.In addition, another embodiment that is fit to is: from flattening the end face of projection, increase the area of this end face before forming dielectric film.If increased the area of this end face, then can increase the area of projection and soldered ball, strengthen strength of joint, improve reliability.
In addition, for example by being etched in the end face that forms projection on the concave spherical surface, directly the situation at its end face formation soldered ball also is good embodiment.This is because because increase is protruding and the area that is connected of soldered ball, and soldered ball is formed on the substrate, so can further strengthen strength of joint.Consequently, can further improve the reliability of wired circuit board, life-saving.
In addition, on concave spherical surface, form the end face of projection, can be applicable to that the end face in projection directly forms all embodiment of soldered ball.
[embodiment 1]
As shown in Figure 1, embodiment 1 relevant wired circuit board 2 is made of dielectric film 4, projection 6, etch stop layer 8, wiring layer 10.Dielectric film 4 is made of polyimide resin.Projection 6 is made of copper, forms and runs through dielectric film 4.In addition, projection 6 is a cone shape.Illustrate in greater detail, the shape of cross section of projection 6 is circular, and the longitudinal section is roughly trapezoidal.In addition, the trapezoidal shape of the longitudinal section of projection 6 is more convenient in explanation, and its hypotenuse also has curvilinear situation.In addition, vertical sectional shape also can be the essentially rectangular shape, and projection 6 shape also can be roughly cylindrical shape being roughly beyond the cone shape.Even under these circumstances, hypotenuse also has curvilinear situation.In addition, the end face of each projection 6 exposes from dielectric film 4, forms on the surperficial same plane that is positioned at dielectric film 4.
Etch stop layer 8 is made of Ni (nickel), is formed on the bottom surface of projection 6.Wiring layer 10 is made of copper.Each projection 6 is connected with wiring layer 10 via etch stop layer 8.In addition, wiring layer 10 also can be at surface coverage gold, silver, rhodium, tin, chromium or the aluminium etc. of copper.In addition, not shown, the electrode of semi-conductor chip or the IC (flip-chip) with soldered ball directly or via welding lead are connected with wiring layer 10.For this type of attachment, describe with reference to Fig. 3 later on.
Soldered ball 12 is formed on the end face of each projection 6.Tellite 14 is unbending substrates, is connected with wired circuit board 2.Wiring layer 16 is formed on the surface of tellite 14.
Each wiring layer 16 is connected via soldered ball 12 with each projection 6, thereby wired circuit board 2 is installed on the tellite 14.Like this, make the circuit module that constitutes by wired circuit board 2 and tellite 14.With respect to wired circuit board 2 are the flexible substrates that approach, and tellite 14 is unbending, thereby this circuit module has been installed unbending tellite 14 and flexible wired circuit board 2.So, for example can access the circuit module of deriving the electrode of unbending tellite 14 or terminal etc. from wired circuit board 2 electricity.
The wired circuit board 2 relevant according to present embodiment owing to directly form soldered ball 12 on the end face of each projection 6 of exposing from the surface of dielectric film 4, needn't form the soldered ball basilar memebrane as the substrate of soldered ball troublesomely.Consequently, compared with prior art, can cut down and make wired circuit board 2 necessary worker ordinal numbers.
Then, with reference to Fig. 2 A～Fig. 2 H, the manufacturing process of the wired circuit board that embodiment 1 is correlated with is described.Fig. 2 A～Fig. 2 H is the substrate sectional view of the manufacture method of the wired circuit board of showing that embodiment 1 is relevant.
Shown in Fig. 2 A, prepare stacked conducting plate 20.This stacked conducting plate 20 is by constituting with the lower part: the wiring layer that constitutes by copper that is layered in thickness and is 12～30 μ m form with on the metal level 20c, thickness is the etch stop layer 20b that is made of Ni of 0.5～2.0 μ m; Stacked more thereon, thickness be 20～80 μ m use metal level 20a by convexing to form of constituting of copper.
Then, on convexing to form, smear resist, use the exposed mask be formed with a plurality of circular patterns to expose and develops formation Etching mask (not shown) with metal level 20a.Shown in Fig. 2 B, this Etching mask convexed to form as mask etching use metal level 20a, thereby form projection 6.
Then, shown in Fig. 2 C, as mask, 20b removes by the etching etch stop layer with projection 6, makes lobed substrate 21.At this moment, use between the metal level 20c across etch stop layer 8 in projection 6 and wiring layer formation.
Then, shown in Fig. 2 D, by curtain formula semar technique, scraper semar technique, strip semar technique, silk screen print method etc., smear the aqueous insulating material that constitutes by polyimide or epoxy resin that is in the precursor state to the face that has formed projection 6.
In the present embodiment, make the height of insulating material smear insulating material than the height highland of projection 6 a little.Then, aqueous insulating material is solidified, form dielectric film 4 by drying to handle.Under the situation of polyimide, improve temperature gradually, finally under 400 ℃, dry processing, thereby carry out imidization.Under the situation of epoxy resin, also improve temperature gradually, finally under 180 ℃, dry processing.In addition, in Fig. 2 D, showed by oven dry and handled the dielectric film 4 that forms.
Then, shown in Fig. 2 E, till the end face that exposes each projection 6 at least fully, grind the surface portion of dielectric film 4, make wired circuit board 22.By grinding in this wise, the film thickness of dielectric film 4 and the height of projection 6 are equated.At this, can expose the end face of projection 6 fully, also can expose further grinding dielectric film 4 of back continuation.
In addition, except polyimide or epoxy resin, insulating material also can use thermoplastic resin.This thermoplastic resin uses liquid crystal polymer, PEEK, PES, PPS or PET etc., is shaped by the T die methods.This T die methods is following such method: extruder with heat fusing resin extrude, begin to smear from the T mould of front end, the material (resin) that directly will become the liquid state is applied on the lobed substrate 21, makes it to solidify by cooling.Use this T die methods to thermoplastic resins such as substrate baste crystalline polymers, make it to solidify, form dielectric film 4 by cooling.
Then, on wiring layer forms with metal level 20c, smear resist, expose and develop formation Etching mask (not shown).For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.In the present embodiment, the resist between each projection 6 is exposed.Then by development treatment, remove the resist that has exposed, only on the bottom surface of each projection 6, form Etching mask (not shown).Then, shown in Fig. 2 F, this Etching mask formed as the mask etching wiring layer use metal level 20c, thus formation wiring layer 10.Each wiring layer 10 is connected with projection 6 via etch stop layer 8.Like this, make the wired circuit board 2 that embodiment 1 is correlated with.
In addition, before the formation of wiring layer 10 or after forming, shown in 2 dotted line, for example, form the obstruct 18 that constitutes by the soldered ball resist, also can seek the soldered ball composition surface evenly, prevent to fall into the short circuit that causes because of pressing.
Then, will be configured in as the spherical scolder of soldered ball on the end face of each projection 6 of exposing from dielectric film 4.Then, wired circuit board is carried out air-dry processing, form and projection 6 soldered balls of fixedlying connected 12 by using heating furnace.In Fig. 2 G, showed the state after the air-dry processing.
In addition, also can carry out the configuration of spherical soldered ball with following method.At first, preparation can keep the smelting tool of spherical scolder by vacuum attraction.Then, Yi Bian remain spherical scolder, Yi Bian this smelting tool is configured in the top of each projection 6.Then, stop the vacuum attraction of smelting tool, the deadweight by each spherical scolder drops on the end face of each projection 6 each spherical scolder.Then, can form soldered ball 12 by carrying out air-dry processing.
In addition, also scolder oil can be printed on the end face of projection 6, form soldered ball by heating air-dry processing.
According to the manufacture method of such wired circuit board 2, can on the end face of each projection 6 of exposing from the surface of dielectric film 4, directly form soldered ball 12.So, do not need to form soldered ball basilar memebrane, the manufacturing process that can cut down wired circuit board 2 as the substrate of soldered ball 12.
And then, shown in Fig. 2 H, can be on tellite 14 installation wiring circuit substrate 2.Generally, before installing, for example semi-conductor chip etc. is installed, but in Fig. 2 H, has been omitted the diagram of this semi-conductor chip to wired circuit board 2 to printed circuit board.In addition, with reference to Fig. 3 A～Fig. 3 B, the installation example of semi-conductor chip is described.
Fig. 3 A～Fig. 3 B shows the sectional view that the example of semi-conductor chip is installed to wired circuit board 2.In Fig. 1, showed installation example, but shown in Fig. 3 A～Fig. 3 B, can directly semi-conductor chip be installed to wired circuit board 2 to the tellite 14 of the rigidity shown in 2 pecked lines.
In Fig. 3 A, showed the example that is connected that carries out the wiring layer 10 of the electrode of semi-conductor chip 24 and wired circuit board 2 by wire-bonded.In Fig. 3 B, showed by directly the electrode 24a of semi-conductor chip 24 and the wiring layer 10 of wired circuit board 2 being coupled together, thereby semi-conductor chip 24 has been installed in example on the wired circuit board 2.
The installation example of wire-bonded has been used in explanation with reference to Fig. 3 A.As shown in Figure 3A, by chips welding knitting layer 26 semi-conductor chips such as LSI 24 are fixed on the wired circuit board 2.Welding lead 28 by being made of metal wire etc. couples together the wiring layer 10 of wired circuit board 2 and the electrode of semi-conductor chip 24.So, each electrode by welding lead 28 and wiring layer 10 with protruding 6 be connected arbitrarily.Projection 6 is owing to is connected with soldered ball 12, so each electrode is connected and the electric derivation of quilt with soldered ball 12 by projection 6.In addition, with resin 30 semi-conductor chip 24 is sealed.This resin 30 uses the cast potting resin that is made of epoxy resin.
The installation example of the IC of flip-chip type is described with reference to Fig. 3 B.On semi-conductor chips such as IC or LSI 24, be formed with by scolder or the gold-plated electrode 24a that constitutes.After being installed to semi-conductor chip 24 on the wired circuit board 2, injecting sealing resin 26 as required and make it sclerosis.In addition, also can on semi-conductor chip 24, form the columnar projections of metal, engage with wired circuit board 2 via anisotropic conductive bond agent (not shown).After the installation, by resin 26 with fixing seal between semiconductor 24 and the wired circuit board 2.
[embodiment 2]
Then, with reference to Fig. 4 the wired circuit board that this clearly demarcated embodiment 2 is correlated with is described.Fig. 4 is the sectional view of the wired circuit board of showing that embodiment 2 is relevant.The wired circuit boards that embodiment 2 is relevant have wired circuit board much at one the formation relevant with embodiment shown in Figure 11, but form difference on the concave spherical surface this point at the end face 6a of each projection 6.So, on this concave spherical surface, form soldered ball 12.
Like this, the wired circuit board 2 ' relevant according to embodiment 2, owing on concave spherical surface, form the end face 6a of each projection 6, so increased the area that is connected of end face 6a and soldered ball 12.Consequently, can increase strength of joint, improve the reliability of wired circuit board, seek long lifetime.
In order on concave spherical surface, to form the end face 6a of each projection 6, between operation shown in Fig. 2 F in the operation that can in embodiment 1, illustrate and the operation shown in Fig. 2 G, the operation of fast-etching copper is set.
At this,, the operation, the operation before and after it that form this concave spherical surface are described with reference to Fig. 5 A～Fig. 5 C.Fig. 5 A～Fig. 5 C is a sectional view of showing the substrate of the operation that forms concave spherical surface with process sequence.By the wired circuit board 20c shown in the etch figures(s) 2E selectively, form the wiring layer 10 shown in Fig. 5 A.In addition, form wiring layer 10 before or after, can form obstruct 18 shown in 2 pecked lines, that for example constitute by the scolder resist, seek to prevent the short circuit that causes because of the homogenising of solder bonds face and the angle of collapsing.
Then, shown in Fig. 5 B, the end face 6a by each projection 6 of Wet-type etching forms the concave spherical surface shape with end face 6a.Then, shown in Fig. 5 C, will be configured in the end face 6a of each projection 6 as the spherical scolder of soldered ball.Then, by carrying out air-dry processing, on the end face 6a of each projection 6, form directly and projection 6 soldered balls that are connected and fixed 12 with heating furnace.
Like this, by the Wet-type etching operation shown in the appended drawings 5B, can access the wired circuit board 2 ' that embodiment shown in Figure 42 is correlated with.In addition, the end face 6a with each projection 6 forms the installation example that the concave spherical surface shape also goes for semi-conductor chip shown in Figure 3.And then, can also be applicable to all embodiment that directly on projection 6, form soldered ball 12.In addition, be illustrated with the example that is etched to of the end face 6a of the etching of carrying out wiring layer 10 in different respectively operations and projection 6, but also can carry out Wet-type etching simultaneously, efficient is higher like this.
[embodiment 3]
The manufacture method of the wired circuit board that embodiments of the invention 3 are correlated with then, is described with reference to Fig. 6 A～Fig. 6 E.Fig. 6 A～Fig. 6 E is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 3 is relevant with process sequence.The manufacture method of the wired circuit board that this embodiment 3 is relevant is the method that the part of the manufacture method of the relevant wired circuit board of embodiment 1 has been carried out change.
As shown in Figure 6, prepare on wiring layer forms with the face of metal level 20c, to have formed the lobed substrate 21 of projection 6 via etch stop layer 20b.Make this substrate by the operation shown in Fig. 2 A～Fig. 2 C of embodiment 1.At this, the manufacture method of the substrate shown in Fig. 6 A is described simply.
At first, prepare on wiring layer forms with the face of metal level 20c, to have formed the stacked conducting plate 20 that convexes to form with metal level 20a via etch stop layer 20b.Then, selectively etching convexes to form and uses sheet metal 20a, forms projection 6.Then, with projection 6 as mask etching and remove etch stop layer 20b.Like this, obtain the lobed substrate 21 shown in Fig. 6 A.
Then, by simultaneously to each projection 6 pressurization and flatten, thereby shown in Fig. 6 B, enlarge the diameter of the end face of each projection 6.The diameter that enlarges the end face of each projection 6 is in order to strengthen the soldered ball that is formed in the operation in the back on its end face and the strength of joint of projection, to make to be difficult to take off projection from soldered ball.
Since the tendency of the thin spaceization of the wiring layer of wired circuit board, the number of poles increase of IC, LSI etc. etc., and require to improve protruding configuration density.Consequently restricted the increase of protruding size.So, produced as projection and the diameter of its end face must have been formed situation about 70 μ m.
But, in fact,, then be difficult to fully improve the strength of joint of soldered ball and projection if the diameter of protruding end face is not about at least 100 μ m.So, fully improve soldered ball and the projection the reliability that is connected and be not easy.
So, in order to improve the strength of joint of soldered ball and projection, will increase the area of protruding end face, and simultaneously to each projection 6 pressurizations and pressing.Like this, can be in fact with the diameter of the end face of each projection 6 from for example increasing to more than the 100 μ m about 70 μ m.
Then, shown in Fig. 6 C, form the dielectric film 4 that covers each projection 6.The operation that forms this dielectric film 4 is identical with operation shown in Fig. 2 D of embodiment 1.Then, shown in Fig. 6 D, grind the surface portion of dielectric film 4 till exposing fully at least to the end face of each projection 6.By grinding in this wise, the film thickness of dielectric film 4 becomes and equates with the height of projection 6.
Then, shown in Fig. 6 E, form by etching wiring layer selectively and to form wiring layer 10 (identical) with the operation shown in Fig. 2 F with metal level 20c.Then, the end face in projection 6 forms soldered ball 12 (identical with the operation shown in Fig. 2 G).
In addition, also can before or after forming wiring layer 10, form the obstruct that constitutes by for example scolder resist, seek to prevent the short circuit that causes because of the homogenising of scolder joint face and the angle of collapsing.
Like this, manufacture method according to wired circuit board shown in Figure 6, since have by from last to each projection 6 pressurization and flatten, increase the operation of diameter of the end face of projection 6, so can be with the diameter of the end face of each projection 6 from for example increasing to more than the 100 μ m about 70 μ m.Consequently can easily fully strengthen the strength of joint of each soldered ball 12 and each projection 6.
In addition, in the present embodiment, in etching behind the etch stop layer 20b, to each projection 6 pressurization and flatten, but also can be to projection 6 pressurizations before etching.
In addition, also can be after the operation shown in Fig. 6 D, the same with embodiment 2 before the operation shown in Fig. 6 E, by Wet-type etching the end face 6a of each projection 6 is formed the concave spherical surface shape.Thus, the area that is connected of projection 6 and soldered ball 12 can be increased, strength of joint can be further strengthened.Consequently, can seek to improve the reliability and the life-saving of wired circuit board.
[embodiment 4]
Then, with reference to Fig. 7 the wired circuit board that embodiments of the invention are relevant is described.Fig. 7 is the sectional view of the wired circuit board of showing that embodiment 4 is relevant.The wired circuit board that present embodiment is relevant is characterised in that: on the two sides wiring layer is set.Embodiment 12 relevant of wired circuit boards form wiring layer 10 on the face of the opposition side of the face that has formed soldered ball 12, do not form wiring layer on the face that has formed soldered ball 12.
On the relevant wired circuit board 2a of present embodiment, as shown in Figure 7, on the face that has formed soldered ball 12, also form wiring layer 11.Can be directly at the end face formation soldered ball 12 of projection 6, also the wiring layer 11 (in Fig. 7, representing with 2 pecked lines) that can join via the end face with projection 6 forms soldered ball 12.
The manufacture method of the wired circuit board 2a that embodiment 4 is correlated with then, is described with reference to Fig. 8 A～Fig. 8 D.Fig. 8 A～Fig. 8 D is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 4 is relevant with process sequence.
Shown in Fig. 8 A, prepare wired circuit board 22 and form usefulness metal level 19 by the wiring layer that copper constitutes.Then, shown in Fig. 8 B, folded wiring layer forms with metal level 19 on wired circuit board 22 upper stratas.
Then, shown in Fig. 8 C, by simultaneously selectively the etching wiring layer form with metal level 20c and wiring layer and form with metal level 19, form wiring layer 10 and wiring layer 11.Like this, make the wired circuit board 2a that the two sides has formed wiring layer.Then, shown in Fig. 8 D, on the wiring layer 11 that has connected projection 6, form soldered ball 12.In addition, shown in Fig. 8 D, can on the wiring layer 11 that has connected projection 6, form soldered ball 12, but also can on projection 6, not form wiring layer 11, directly on the end face of projection 6, form soldered ball 12.That is, selectively the etching wiring layer forms with the metal level 19 feasible wiring layers 11 that do not form on projection 6, only forms wiring layer 11 between the end face of each projection 6.
Fig. 9 has showed the sectional view that has directly formed the wired circuit board 2b of soldered ball 12 at the end face of each projection 6.As shown in Figure 9, in wired circuit board 2b, the end face in projection 6 does not form wiring layer 11, and directly forms soldered ball 12 at the end face of each projection 6.
[embodiment 5]
Then, as embodiments of the invention 5, utilized the circuit module of wired circuit board with reference to Figure 10 A～Figure 10 C explanation.Figure 10 A～Figure 10 C is the sectional view of the relevant circuit module of embodiment 5.
The circuit module that present embodiment is relevant has used flexible wired circuit board.Shown in Figure 10 A～Figure 10 C, in wired circuit board 2, be provided with the zone (hereinafter referred to as convexing to form zone 42) that forms projection 6, the zone (hereinafter referred to as the non-formation of projection zone 40) that does not form projection 6.Then, make the non-formation of projection zone 40 flexible.Come crooked wired circuit board 2 by this flexible part, semi-conductor chips such as LSI 24 are connected on the wired circuit board 2.
Like this, being provided with on wired circuit board 2 can non-formations of lobe zone 40, by making the circuit module of bending arbitrarily, can dispose semi-conductor chips 24 such as LSI three-dimensionally.Thus, can in the finite space, dispose many semi-conductor chips 24 to high-density.In addition, in the present embodiment, also can use projection 6 end face 6a to form the wired circuit board 2 ' of concave spherical surface shape.
[embodiment 6]
Then, as embodiments of the invention 6, the circuit module that has utilized wired circuit board is described with reference to Figure 11.Figure 11 is the sectional view of the relevant circuit module of embodiment 6.
As shown in figure 11, the circuit module that present embodiment is relevant is made of wired circuit board 2 and another wired circuit board 50.Wired circuit board 2 is connected via soldered ball 12 with another wired circuit board 50.Wired circuit board 50 forms the wiring layer 54 that is made of copper on a face of dielectric film 52, form the wiring layer 60 that is made of copper on the face of opposition side.Then, connect dielectric film 52 ground and form projection 56, connecting wiring layer 54 and wiring layer 60.In addition, between projection 56 bottom surface and wiring layer 54, form etch stop layer 58.So projection 56 is via etch stop layer 58 connecting wiring layers 54.In addition, under the state that the end face with projection 56 is connected, form at least a portion wiring layer 60.
With forming wired circuit board 50 with wired circuit board 2 essentially identical methods.The different of wired circuit board 50 and wired circuit board 2 are: only form wiring layer 10 in wired circuit board 2, but form wiring layer 54 and wiring layer 60 on a face of dielectric film 4 in wired circuit board 50 on the two sides.
Wired circuit board 2 is connected via soldered ball 12 with wired circuit board 50, the forming circuit module.In addition, wired circuit board 2 and wired circuit board 50 use flexible substrate, thus, can easily make the circuit module that couples together between the flexible wired circuit board.
[embodiment 7]
Then, as embodiments of the invention 7, another circuit module that has utilized wired circuit board is described with reference to Figure 12.Figure 12 is the sectional view of another circuit module (liquid-crystal apparatus).
The circuit module that present embodiment is relevant is the liquid-crystal apparatus that has connected the relevant wired circuit board 2 of embodiment 1 on unbending glass circuit board.In with figure, liquid-crystal apparatus 70 (circuit module) is provided with relative glass plate 76 across membrane material 78 on glass circuit board 72.In addition, between glass circuit board 72 and relative glass plate 76, be sealed with liquid crystal 80.Form the transparent wiring 74 that constitutes by ITO (sclerosis indium tin) film on the surface of glass circuit board 72.Also can form metal (for example copper, aluminium, titanium, nickel, tin or silver) film on the surface of ITO film again.Wired circuit board 2 is connected with glass circuit board 72 via soldered ball 12.Soldered ball 12 is connected with transparency electrode 74.
The end of the transparent wiring 74 by glass circuit board 72 and the projection 6 of wired circuit board 2 are connected via soldered ball 12, and glass circuit board 72 and wired circuit board 2 are coupled together.
Like this, by wired circuit board 2 is connected on the glass circuit board 72, can be provided for from the liquid-crystal apparatus of flexible wired circuit board 2 extraction electrodes.In addition, the wired circuit board 2 ' that also end face of projection can be formed the concave spherical surface shape is used for the relevant volume of present embodiment and reaches circuit module.In addition, the circuit module that has more than illustrated has been to use an example of the circuit module of wired circuit board of the present invention, and the present invention has more than and be limited to the circuit module that above embodiment is correlated with.
Then, the wired circuit board that soldered ball 12 is not set is described.
[embodiment 8]
Manufacture method with reference to Figure 14 A～Figure 14 G and Figure 15 A～wired circuit board that Figure 15 E explanation embodiment 8 is correlated with.Figure 14 A～Figure 14 G and Figure 15 A～Figure 15 E are the sectional views with the substrate of the manufacture method of the wired circuit board of process sequence displaying embodiment 8.
Shown in Figure 14 A, prepare stacked conducting plate 20.This stacked conducting plate 20 is by constituting with the lower part: at thickness is 12～30[μ m] the wiring layer that constitutes by copper form that to go up stacked, thickness with metal level 20c be 0.5～2.0[μ m] the etch stop layer 20b that constitutes by Ni; Stacked thereon again, thickness is 20～80[μ m] use metal level 20a by convexing to form of constituting of copper.
Then, on convexing to form, smear resist, use the exposed mask formed a plurality of circular patterns to expose and develops formation Etching mask (not shown) with metal level 20a.Then, as shown in Figure 14B, use metal level 20a, form projection 6 by this Etching mask is convexed to form as mask etching.
Then, shown in Figure 14 C, with projection 6 as mask by etching and remove etch stop layer 20b, make lobed substrate 21.At this moment, projection 6 and wiring layer form and use between the metal level 20c across etch stop layer 8.
Then, shown in Figure 14 D, by curtain formula semar technique, scraper semar technique, strip semar technique, silk screen print method etc., smear the aqueous insulating material that constitutes by polyimide or epoxy resin that is in the precursor state to the face that has formed projection 6.In the present embodiment, make the height of insulating material smear insulating material than the height highland of projection 6 a little.Then, aqueous insulating material is solidified, form dielectric film 4 by drying to handle.Under the situation of polyimide, improve temperature gradually, finally under 400 ℃, dry processing.Under the situation of epoxy resin, also improve temperature gradually, finally under 180 ℃, dry processing.In addition, in Figure 14 D, showed by oven dry and handled the dielectric film 4 that forms.
Then, shown in Figure 14 E, till the end face that exposes each projection 6 at least fully, grind the surface portion of dielectric film 4, make wired circuit board 22.By grinding in this wise, the film thickness of dielectric film 4 and the height of projection 6 are equated.At this, can expose the end face of projection 6 fully, also can expose further grinding dielectric film 4 of back continuation.
In addition, except polyimide or epoxy resin, insulating material also can use thermoplastic resin.This thermoplastic resin uses liquid crystal polymer, PEEK, PES, PPS or PET etc., is shaped by the T die methods.This T die methods is following such method: extruder with heat fusing resin extrude, begin to smear from the T mould of front end, the material (resin) that directly will become the liquid state is applied on the lobed substrate 21, makes it to solidify by cooling.Use this T die methods to thermoplastic resins such as substrate baste crystalline polymers, make it to solidify, form dielectric film 4 by cooling.
Then, shown in Figure 14 F, by electrochemical plating, formation is the alloy formation protrusion 13 of major component by Cu (copper), Au (gold), silver (Ag), Ni (nickel), Pb (lead), Pt (platinum) or Sn metals such as (tin) or with above-mentioned metal on the end face of each projection 6, forms wired circuit board 23.
Then, on wiring layer forms with metal level 20c, smear resist, expose and develop formation Etching mask (not shown).For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.In the present embodiment, the resist between each projection 6 is exposed.Then by development treatment, remove the resist that has exposed, only on the bottom surface of each projection 6, form Etching mask (not shown).Then, shown in Figure 14 G, this Etching mask formed as the mask etching wiring layer use metal level 20c, thus formation wiring layer 10.Each wiring layer 10 is connected with projection 6 via etch stop layer 8.Like this, form wired circuit board 2c.
According to above method, when forming dielectric film 4, do not need to carry out the hot pressing of prior art.Consequently the device that does not need hot pressing to use needn't carry out hot pressing by spended time, thereby can improve the throughput rate of wired circuit board.
And then, owing to do not need to flatten on one side projection 6 yet, on one side folded wiring layer forms and use metal level on protruding 6 upper stratas, so needn't increase protruding 6 height.Consequently owing to the thickness of height that makes projection 6 and dielectric film 4 is approximate, so needn't carry out increasing of unnecessary projection 6.So, high-quality etching can be carried out, thereby the distance of 6 of adjacent projectioies can be shortened, can make highly integrated wired circuit board.For example, in the prior art, must make projection 6 height be about 80～150[μ m], but owing to do not need to flatten, so, can will highly be reduced to about 20～80[μ m] according to the selection of the thickness of dielectric film 4 yet.Consequently, in the prior art, the distance that projection is 6 must be about 250～400[μ m], but in the present invention, can be about 60～200[μ m], can make wired circuit board highly integrated.
In addition, under the situation of carrying out electrolysis energising plating, have the following advantages:, can confirm whether the exposed portions serve of each projection 6 is electrically connected by observing the plating of separating out from the end face of projection 6.
In addition, in the present embodiment, shown in Figure 14 D, make the height of dielectric film 4 form dielectric film 4 than the height highland of projection 6 a little, make highly equal then by grinding.But the present invention has more than and is limited to this, also can make the height of dielectric film 4 form dielectric film 4 than the height lowland of projection 6 a little.Below, with reference to Figure 15 A～Figure 15 E this method is described.
Shown in Figure 15 A, prepare lobed substrate 21.Then, shown in Figure 15 B, by curtain formula semar technique, scraper semar technique, strip semar technique, silk screen print method etc., smear the aqueous insulating material that constitutes by polyimide or epoxy resin that is in the precursor state to the face that has formed projection 6.At this moment, make the height of insulating material smear insulating material than the height lowland of projection 6 a little.At this moment, because aqueous hardening of resin shrinks, the volatilization of volatile matter, shown in Figure 15 B, at the also residual some insulating material of end face of projection 6.Then, aqueous insulating material is solidified, form dielectric film 4 by drying to handle.Consequently, on projection 6, also form dielectric film 4.In Figure 15 B, showed by oven dry and handled the dielectric film 4 that forms.In addition, as mentioned above, insulating material also can use thermoplastic resins such as liquid crystal polymer, PET.Under the situation of using thermoplastic resin, do not need to dry processing.
Then, shown in Figure 15 C, till the end face that exposes each projection 6 at least fully, grind the dielectric film 4 on the projection 6, make wired circuit board 22a.Because it is low to be formed on the height of aspect ratio projection 6 of dielectric film 4 of 6 of projectioies, so do not grind.By grinding like this, make the height of aspect ratio projection 6 of dielectric film 4 low.
Then, shown in Figure 15 D,, on the end face of each projection 6, form the protrusion 13 that constitutes by metal, form wired circuit board 23a by electrochemical plating.Then, shown in Figure 15 E, form with metal level 20c and form figure, formation wiring layer 10 by the etching wiring layer.Form wired circuit board 2d like this.
In addition, in the present embodiment, forming protrusion 13 back formation wiring layers 10, but also can form wiring layer 10 earlier, and then forming protrusion 13.
[embodiment 9]
Then, with reference to the manufacture method of the relevant wired circuit board of Figure 16 A～Figure 16 F and Figure 17 A～Figure 17 F explanation embodiments of the invention 9.Figure 16 A～Figure 16 F and Figure 17 A～Figure 17 F are the sectional views of substrate of showing the manufacture method of the wired circuit board that embodiment 9 is relevant with process sequence.
Shown in Figure 16 A, prepare lobed substrate 21.Then, shown in Figure 16 B, by curtain formula semar technique, scraper semar technique, strip semar technique, silk screen print method etc., smear the aqueous insulating material that constitutes by polyimide or epoxy resin etc. that is in the precursor state to the face that has formed projection 6.In the present embodiment, make the height of insulating material smear insulating material than the height highland of projection 6 a little.Then, aqueous insulating material is solidified, form dielectric film 4 by drying to handle.In addition, in Figure 16 B, showed by oven dry and handled the dielectric film 4 that forms.
Then, shown in Figure 16 C, on dielectric film 4, smear resist, expose and develop, form Etching mask 7.For example, smear the resist of positive type, use exposed mask that the resist on each projection 6 is exposed with compulsory figure.Then,, remove the resist on each projection 6, only between each projection 6, form Etching mask 7 then by carrying out development treatment.
Then, shown in Figure 16 D, as mask, etching is formed on the dielectric film 4 on each projection 6 till the end face that exposes each projection 6 fully with Etching mask 7.Then, peel off Etching mask 7 and make wired circuit board 22b.At this moment, the film thickness of dielectric film 4 is thicker than the height of projection 6.
Then, shown in Figure 16 E, by electrochemical plating, formation is the alloy formation protrusion 13 of major component by Cu (copper), Au (gold), silver (Ag), Ni (nickel), Pb (lead), Pt (platinum) or Sn metals such as (tin) or with above-mentioned metal on the end face of each projection 6, forms wired circuit board 23b.
Then, on wiring layer forms with metal level 20c, smear resist, expose and develop formation Etching mask (not shown).For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.In the present embodiment, the resist between each projection 6 is exposed.Then by development treatment, remove the resist that has exposed, only on the bottom surface of each projection 6, form Etching mask (not shown).Then, shown in Figure 16 F, this Etching mask formed as the mask etching wiring layer use metal level 20c, thus formation wiring layer 10.Each wiring layer 10 is connected with projection 6 via etch stop layer 20b.Like this, form wired circuit board 2e.
According to above method, the device that does not need hot pressing to use can improve the throughput rate of wired circuit board.In addition, owing to the distance that can shorten between the projection 6, so can make highly integrated wired circuit board.And then, according to the manufacture method of present embodiment, there is no need to expose for the end face that makes projection 6, and mask insulating film 4.If grind the dielectric film 4 that constitutes by resin, then low amounts of resin is remained on the substrate, and make processing thereafter become complicated owing to eliminate insufficient meeting.But, according to the method for present embodiment owing to remove dielectric film by etching, so on the end face of projection 6 cull not, can alleviate processing thereafter.
In addition, in the present embodiment, shown in Figure 16 B, the height that makes dielectric film 4 forms dielectric film 4 than the height highland of projection 6 a little, removes dielectric film 4 on the projection 6 by grinding then.But the present invention has more than and is limited to this, also can make the height of dielectric film 4 form dielectric film 4 than the height lowland of projection 6 a little.Below, with reference to Figure 17 A～Figure 17 F this method is described.
Shown in Figure 17 A, prepare lobed substrate 21.Then, shown in Figure 17 B, by curtain formula semar technique, scraper semar technique, strip semar technique, silk screen print method etc., smear the aqueous insulating material that constitutes by polyimide or epoxy resin that is in the precursor state to the face that has formed projection 6.At this moment, make the height of insulating material smear insulating material than the height lowland of projection 6 a little.At this moment, because aqueous hardening of resin shrinks, the volatilization of volatile matter, shown in Figure 17 B, at the also residual some insulating material of end face of projection 6.Then, aqueous insulating material is solidified, form dielectric film 4 by drying to handle.Consequently, on projection 6, also form dielectric film 4.In Figure 17 B, showed by oven dry and handled the dielectric film 4 that forms.
Then, shown in Figure 17 C, on dielectric film 4, smear resist, expose and develop, form Etching mask 7.For example, smear the resist of positive type, use exposed mask that the resist on each projection 6 is exposed with compulsory figure.Then,, remove the resist on each projection 6, only between each projection 6, form Etching mask 7 then by carrying out development treatment.
Then, shown in Figure 17 D, with Etching mask 7 as mask, etching and remove the dielectric film 4 that is formed on each projection 6 till the end face that exposes each projection 6 fully.Then, peel off Etching mask 7 and make wired circuit board 22c.At this moment, the film thickness of dielectric film 4 is lower than the height of projection 6.
Then, shown in Figure 17 E, by electrochemical plating, formation constitutes protrusion 13 by metal on the end face of each projection 6, forms wired circuit board 23c.Then, shown in Figure 17 F, form with metal level 20c and form figure, form wiring layer 10 by the etching wiring layer.Like this, make wired circuit board 2f.
In addition, the same with embodiment 8 in the present embodiment, except polyimide or epoxy resin, insulating material also can use thermoplastic resins such as liquid crystal polymer, PET.In addition, forming protrusion 13 back formation wiring layers 10, but also can form wiring layer 10 earlier, and then forming protrusion 13 by electroless plating or printing conductive stickup film.
[embodiment 10]
Then, with reference to the manufacture method of the relevant wired circuit board of Figure 18 A～Figure 18 E and Figure 19 A～Figure 19 E explanation embodiments of the invention 10.Figure 18 A～Figure 18 E and Figure 19 A～Figure 19 E are the sectional views of substrate of showing the manufacture method of the wired circuit board that embodiment 10 is relevant with process sequence.
Shown in Figure 18 A, prepare lobed substrate 21.Then, shown in Figure 18 B, by curtain formula semar technique, scraper semar technique, strip semar technique, silk screen print method etc., smear the aqueous insulating material that constitutes by polyimide or epoxy resin etc. that is in the precursor state to the face that has formed projection 6.In the present embodiment, make the height of insulating material smear insulating material than the height highland of projection 6 a little.Then, aqueous insulating material is solidified, form dielectric film 4 by drying to handle.In addition, in Figure 18 B, showed by oven dry and handled the dielectric film 4 that forms.
Then, shown in Figure 18 C, till the end face that exposes each projection 6 at least fully, etching and remove dielectric film 4 all sidedly, thus make wired circuit board 22d.At this moment, the thickness of dielectric film 4 is almost equal with the height of projection 6.At this, can expose the end face of projection 6 fully, also can expose further grinding dielectric film 4 of back continuation, in this case, the film thickness of dielectric film 4 is thinner than the height of projection 6.
Then, shown in Figure 18 D, by electrochemical plating, formation is the alloy formation protrusion 13 of major component by Cu (copper), Au (gold), silver (Ag), Ni (nickel), Pb (lead), Pt (platinum) or Sn metals such as (tin) or with above-mentioned metal on the end face of each projection 6, makes wired circuit board 23d.In addition, also can the protrusion that conduction is pasted film be set by print process.
Then, on wiring layer forms with metal level 20c, smear resist, expose and develop formation Etching mask (not shown).For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.In the present embodiment, the resist between each projection 6 is exposed.Then by development treatment, remove the resist that has exposed, only on the bottom surface of each projection 6, form Etching mask (not shown).Then, shown in Figure 18 E, this Etching mask formed as the mask etching wiring layer use metal level 20c, thus formation wiring layer 10.Each wiring layer 10 is connected with projection 6 via etch stop layer 20b.Like this, form wired circuit board 2g.
According to above method, the device that does not need hot pressing to use can improve the throughput rate of wired circuit board.In addition, because the height of projection 6 and the thickness of dielectric film 4 are similar to, so needn't carry out increasing of unnecessary projection 6.Consequently, owing to the distance that can shorten between the projection 6, so can make highly integrated wired circuit board.
According to the method for present embodiment, owing to there is no need to grind dielectric film 4 for projection 6 end face is exposed, so on the end face of projection 6 cull not, can alleviate processing thereafter.And then, because etching and remove dielectric film 4 all sidedly, so there is no need to form Etching mask, thereby can cut down the process number of making Etching mask.
In addition, in the present embodiment, shown in Figure 18 B, make the height of dielectric film 4 form dielectric film 4 than the height highland of projection 6 a little, remove dielectric film 4 by etching then.But the present invention has more than and is limited to this, also can make the height of dielectric film 4 form dielectric film 4 than the height lowland of projection 6 a little.Below, with reference to Figure 19 A～Figure 19 E this method is described.
Shown in Figure 19 A, prepare lobed substrate 21.Then, shown in Figure 19 B,, smear the aqueous insulating material that is in the precursor state to the face that has formed projection 6 by curtain formula semar technique, scraper semar technique, strip semar technique, silk screen print method etc.At this moment, make the height of insulating material smear insulating material than the height lowland of projection 6 a little.At this moment, because aqueous hardening of resin shrinks, the volatilization of volatile matter, shown in Figure 19 B, at the also residual some insulating material of end face of projection 6.Then, aqueous insulating material is solidified, form dielectric film 4 by drying to handle.In addition, in Figure 19 B, showed by oven dry and handled the dielectric film 4 that forms.
Then, shown in Figure 19 C, till the end face that exposes each projection 6 at least fully, remove dielectric film 4, make wired circuit board 22e by etching.At this moment, the dielectric film 4 between each projection 6 of an etching is than the thin film thickness before the etching.At this, can expose the end face of projection 6 fully, also can expose the further etching dielectric film 4 of back continuation.
Then, shown in Figure 19 D,, on the end face of each projection 6, form the protrusion 13 that constitutes by metal, form wired circuit board 23e by electrochemical plating.Then, shown in Figure 19 E, form with metal level 20c and form figure, formation wiring layer 10 by the etching wiring layer.Form wired circuit board 2h like this.
In addition, the same with embodiment 8 in the present embodiment, except polyimide or epoxy resin, insulating material also can use thermoplastic resins such as liquid crystal polymer, PET.In addition, forming protrusion 13 back formation wiring layers 10, but also can form wiring layer 10 earlier, and then forming protrusion 13.
In addition, in embodiment 8 to 10, remove insulating material, but the present invention has more than and be limited to this, also can remove by Laser Processing by mask means or etching method.In Laser Processing, use carbonic acid gas laser, excimer laser, YAG laser or semiconductor laser etc.Then, only to dielectric film 4 irradiating lasers that are formed on the projection 6, till exposing fully, removes the end face to protruding 6 dielectric film 4 on the projection 6.Like this, by dielectric film 4 irradiating lasers on projection 6 only, can only remove the dielectric film 4 on the projection 6.So, there is no need to form Etching mask, and then, since on substrate cull not, so can cut down thereafter processing.In addition, the film thickness that makes dielectric film 4 than projection 6 high or thin, thick can.
In addition, can make insulating resin attenuation on the projection 6, residual resin after can easily removing by using cylinder.For example, make substrate by between 2 cylinders that keep the configuration of certain distance ground.Make the distance between this cylinder shorter a little,, make the insulating material on the projection 6 smooth by making it by between these 2 cylinders than the thickness of substrate.
If make insulating material smooth by cylinder, residual some insulating material on projection 6 end face then.Then, till the end face that exposes each projection 6 at least fully, etching and remove dielectric film 4 all sidedly, thus make wired circuit board.At this moment, the thickness of dielectric film 4 is almost equal with the height of projection 6.At this, can expose the end face of projection 6 fully, also can expose further grinding dielectric film 4 of back continuation, in this case, the film thickness of dielectric film 4 is thinner than the height of projection 6.In addition, use alkali lye or hydrazine liquid in the etching.In addition, also can be by plasma-aging or the UV dielectric film 4 of removing such as aging.And then, can remove dielectric film 4 by polishing or laser processing method.In addition, the film thickness that makes dielectric film 4 than the height of projection 6 high or thin, thick can.
And then, can also make by method in addition.Can implement to resist the processing of aqueous insulating material to the end face that is formed on the projection 6 on the lobed substrate 21.For example, smear mode by mode of stampping or cylinder, only the end face in projection 6 forms silicones and fluorine compounds.
At this, the mode of stampping is following method: the beater that will be attached with silicones etc. only is pressed on the end face of projection 6, makes silicones etc. only on the end face attached to projection 6.In addition, the cylinder mode of smearing is following method: the cylinder rotation that is attached with silicones etc. is made contact with the end face of projection 6, make silicones etc. attached on protruding 6 the end face.
Then, by curtain formula semar technique, scraper semar technique, strip semar technique, silk screen print method etc., smear the aqueous insulating material that constitutes by polyimide or epoxy resin that is in the precursor state to the face that has formed projection 6.At this moment, make the height of insulating material smear insulating material than the height lowland of projection 6 a little.Owing to be attached with silicones etc. on the end face of projection 6, aqueous insulating material is removed not remaining insulating material on the end face of projection 6 by the end face from projection 6.
Then, aqueous insulating material is solidified, form dielectric film 4 by drying to handle.Remove silicones etc. by the end face that grinds projection 6.Perhaps, also can use the solvent of dissolves silicon resin etc. to remove.In addition, also can remove by physical methods such as plasma-aging, UV are aging.
In addition, can also remove dielectric film 4 with the method for sandblasting.For example, fine-powders such as glass, aluminium oxide, steel, silica sand, tri-iron tetroxide, silit are used as abrasive substance (being referred to as blasting materials), itself and water under high pressure or pressurized air etc. are sprayed to the surface of dielectric film 4 simultaneously the surface of grinding dielectric film 4 till exposing fully to the end face of projection 6 by its impulsive force with fast state.
[embodiment 11]
The manufacture method of the wired circuit board that embodiments of the invention 11 are correlated with then, is described with reference to Figure 20 A～Figure 20 D.In embodiment 8 to 10, use polyimide etc. as insulating material, form the dielectric film 4 of one deck.But the present invention has more than and is limited to this, also can form by the dielectric film 4 that constitutes more than 2 layers or 3 layers.Structure and manufacture method thereof with reference to the such dielectric film 4 of Figure 20 A～Figure 20 D explanation.Figure 20 A～Figure 20 D is the sectional view of substrate of method that show to form the dielectric film 4 of sandwich construction.
Shown in Figure 20 A, prepare lobed substrate 21.Then, shown in Figure 20 B, smear by being dissolved in the insulating material that thermoplasticity polyimide in the solvent or heat fusing polyimide constitute, by at about 100[℃ to the face that has formed projection 6]～200[℃] under heat, form dielectric film 4a.At this moment, make the height of dielectric film 4a form dielectric film 4a than the height lowland of projection 6 a little.
Then, shown in Figure 20 C,, on dielectric film 4a, smear the insulating material that the precursor state by polyimide resin constitutes by curtain formula semar technique, scraper semar technique, strip semar technique, silk screen print method etc., by at about 350[℃]～400[℃] under heat, form dielectric film 4b.At this moment, make the total film thickness of dielectric film 4a and dielectric film 4b form dielectric film than the height unfertile land of projection 6 a little.
Then, shown in Figure 20 D, on dielectric film 4b, smear the insulating material that constitutes by the thermoplasticity polyimide that is dissolved in the solvent, by at about 100[℃]～200[℃] under heat, form dielectric film 4c.The film thickness of dielectric film 4 that makes final formation than projection 6 height thick or thin can.Then, till the end face at least to protruding 6 exposes, remove dielectric film 4, form wiring layer 10 etc. then by polishing, etching method or laser processing method etc.
Dielectric film 4 by forming this spline structure can access following effect.Owing to thermoplastic resin generation becomes bonding agent with wiring layer, so by on wired circuit board the most surperficial, forming the insulating material that constitutes by thermoplastic resin, can easily stacked other wired circuit boards and wiring layer form with metal level etc.And then, with the connecting airtight property of other wired circuits etc.
In addition, form the dielectric film 4 that is made of the thermoplasticity polyimide by the orlop at dielectric film 4, it is better with the connecting airtight property of metal level 20c that dielectric film 4 and wiring layer are formed.
And then, precursor as polyimide resin uses polyamic acid, if but owing to use this polyamic acid then react with forming with metal level 20c by the wiring layer that constitutes with Copper Foil, so that dielectric film 4 and wiring layer form the connecting airtight property deterioration with metal level 20c, the situation (generation is peeled off) that has dielectric film 4 to peel off.But, by across the insulating material that constitutes by thermoplastic resin, can improve the connecting airtight property of dielectric film 4 and wiring layer formation with metal level 20c, can prevent the generation of peeling off.
More than, in embodiment 8 to 11, the manufacture method of the wired circuit board that has used aqueous insulating material has been described.In following embodiment, the wired circuit board that used this wired circuit board and the manufacture method of multilayer wiring circuit board are described.
[embodiment 12]
Then, as embodiments of the invention 12, used the manufacturing process of the multi-layer wire substrate of the wired circuit board of making by the manufacture method of embodiment 8 to 11 with reference to Figure 21 A～21D explanation.Figure 21 A～Figure 21 D is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 12 is relevant with process sequence.
At first, shown in Figure 21 A, prepare bonding film 31, wired circuit board 23, another wired circuit board.Welding film 31 makes and is used for bonding cloth line circuit substrate 23 and another wired circuit board, is made of thermoplasticity polyimide or denaturation loop epoxy resins etc.
At this, the manufacture method of the wired circuit board by embodiment 8 is made wired circuit board 23.In addition, another wired circuit board forms projection 6 via etch stop layer 20b on wiring layer forms with metal level 20c, form wiring layer 11 on projection 6.Then, between individual protruding 6, form the dielectric film 4 that equates with the height of projection 6.
With respect to exposing of wired circuit board 22 face of projection 6 end face, in crimping wiring layer form with behind the metal level (not shown), form by this wiring layer of etching partly and to form wiring layer 11, thereby make this another wired circuit board with metal level.For example, on this wiring layer forms with metal level, smear the resist of positive type, use exposed mask that the resist between each projection 6 is exposed with compulsory figure.Then,, remove the resist between each projection 6, only on the end face of each projection 6, form Etching mask (not shown) then by carrying out development treatment.Then, this Etching mask formed as the mask etching wiring layer use metal level, thus formation wiring layer 11.
Then, shown in Figure 21 B,, make multi-layer wire substrate while heat crimping via 31 pairs of wired circuit boards of bonding film and another wired circuit board.At this moment, to carrying out crimping between the wired circuit board, make the protrusion 13 of wired circuit board 23 and the wiring layer 11 of another wired circuit board contact.
Then, smear resist, expose and develop, form Etching mask (not shown) to the upper and lower surface of multi-layer wire substrate.For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.Then by development treatment, remove the resist that has exposed, form Etching mask (not shown).Then, shown in Figure 21 C, with the wiring layer formation metal level 20c of this Etching mask as the mask etching two sides, thereby at two sides formation wiring layer 10.Wiring layer 10 is connected with projection 6 via etch stop layer 8.Like this, be connected with wiring layer, thereby projection is as interlayer coupling part performance function by projection.
Then, shown in Figure 21 D,, form Etching mask 9 by exposing and developing in order to protect the face that is formed with wiring layer 10 and, to smear the welding resist to a face in order to prevent attached solder.Then, for example by electroplating, form on the wiring layer 10 on the face by the gold-plated metal 20f that forms fast being formed on.In addition, on another face, cover cover film 20g.Cover film 20g is a film of having smeared bonding agent on a face of Kapton.Certainly, also can replace cover film 20g to be suitable for the welding resist.
As mentioned above, be the wired circuit board of irreducible minimum by the distance between stacked projection, can make highly integrated multi-layer wire substrate.
In addition, in the present embodiment, utilize the wired circuit board of making by the manufacture method of embodiment 8 23 to make multi-layer wire substrate, but the present invention have more than and is limited to this.For example, can utilize other substrates such as wired circuit board 23a and wired circuit board 23b, make multi-layer wire substrate.
In addition, in the present embodiment, use the wired circuit board 23 and the bonding film 31 that have formed the protrusion 13 that constitutes by metal to make multi-layer wire substrate, but do not use these also can make multi-layer wire substrate.For example, by using the wired circuit board 22a of embodiment 8, do not use bonding film 31 can make multi-layer wire substrate yet.Wired circuit board 22a is owing to the film thickness height of the aspect ratio dielectric film 4 of projection 6, so the end face of projection 6 is outstanding from dielectric film 4.So, form the protrusion 13 that constitutes by gold by electrochemical plating separately, by using the insulating resin and the thermoplastic resin of unhardened state, not via bonding film 31, make it to contact by the end face of direct crimping projection 6 and the wiring layer 11 of another wired circuit board, also can form multi-layer wire substrate.
[embodiment 13]
Then, as embodiments of the invention 13, used the manufacturing process of the multi-layer wire substrate of the wired circuit board of making by the manufacture method of embodiment 8 to 11 with reference to Figure 22 A～22C explanation.Figure 22 A～Figure 22 C is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 13 is relevant with process sequence.
At first, shown in Figure 22 A, prepare 2 wired circuit boards 23 and wired circuit board 2a.Wired circuit board 2a is the substrate of making by the manufacture method of the relevant wired circuit board of embodiment 1.In addition, wired circuit board 23 is substrates of making by the manufacture method of the relevant wired circuit board of embodiment 8.
With respect to exposing of wired circuit board 22 face of projection 6 end face, in crimping wiring layer form with behind the metal level (not shown), wiring layer by etching upper and lower surface partly forms and forms wiring layer 10 and wiring layer 11 with metal level, thereby makes this wired circuit board 2a.For example, on this wiring layer forms with metal level, smear the resist of positive type, use exposed mask that resist is exposed with compulsory figure.Then, the resist by having carried out development treatment, removed exposing forms Etching mask (not shown) then.Then, this Etching mask formed as the mask etching wiring layer use metal level, thus formation wiring layer 10 and wiring layer 11.
Then, shown in Figure 22 B,, make multi-layer wire substrate while on the two sides of wired circuit board 2a, heat crimping wired circuit board 23.At this moment, wired circuit board 2a and 23 is carried out crimping, make the protrusion 13 of wired circuit board 23 and the wiring layer 10 of wired circuit board 2a contact.In addition, wired circuit board 2a and wired circuit board 23 are carried out crimping, make the protrusion 13 of another wired circuit board 23 and the wiring layer 11 of wired circuit board 2a contact.
Then, smear resist,, form Etching mask (not shown) by exposing and developing to the upper and lower surface of multi-layer wire substrate.For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.Then by development treatment, remove the resist that has exposed, form Etching mask.Then, shown in Figure 22 C, with the wiring layer formation metal level 23c of this Etching mask as the upper and lower surface of mask etching multilayer wiring circuit board, thereby at two sides formation wiring layer 10.Wiring layer 10 is connected with projection 6 via etch stop layer 8.Like this, be connected with wiring layer, thereby projection is as interlayer coupling part performance function by projection.
As mentioned above, be the wired circuit board of irreducible minimum by the distance between stacked projection, can make highly integrated multi-layer wire substrate.
In addition, in the present embodiment, utilize the wired circuit board of making by the manufacture method of embodiment 8 23 to make multi-layer wire substrate, but the present invention have more than and is limited to this.For example, can utilize other substrates such as wired circuit board 23a and wired circuit board 23b, make multi-layer wire substrate.
In addition, in the present embodiment, use the wired circuit board 23 that has formed protrusion 13 to make multi-layer wire substrate, but do not use these also can make multi-layer wire substrate.For example, can use the wired circuit board 22a etc. of embodiment 8.Wired circuit board 22a is owing to the film thickness height of the aspect ratio dielectric film 4 of projection 6, so the end face of projection 6 is outstanding from dielectric film 4.So, not forming protrusion 13, the end face by direct crimping projection 6 makes it to contact with wiring layer 11 with the wiring layer 10 of wired circuit board 2a, also can form multi-layer wire substrate.
[embodiment 14]
Then, as embodiments of the invention 14, used the manufacturing process of another multi-layer wire substrate of the wired circuit board of making by the manufacture method of embodiment 8 to 11 with reference to Figure 23 A～23D explanation.Figure 23 A～Figure 23 D is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 14 is relevant with process sequence.
At first, shown in Figure 23 A, prepare wired circuit board 22.Then, on wiring layer forms with metal level 20c, smear resist,, form Etching mask (not shown) by exposing and developing.For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.Then by development treatment, remove the resist that has exposed, form Etching mask (not shown).Then, shown in Figure 23 B, this Etching mask as mask etching wiring layer formation metal level 20c, is formed wiring layer 10a and wiring layer 10b.Mutual configuration ground forms wiring layer 10 and wiring layer 11.In addition, wiring layer 10a is connected with projection 6 via etch stop layer 20b.
Then, paste the electromagnetic shielding film 32 that constitutes by Copper Foil, alumina foil, iron foil, SUS paper tinsel etc. and bonding agent to the face of the end face that has exposed projection 6.Electromagnetic shielding film 32 has following function: shielding prevents the misoperation that causes because of the unnecessary electromagnetic wave from the outside simultaneously from the electromagnetic wave that wired circuit board produces.In the present embodiment, on whole, be pasted with electromagnetic shielding film 32, but also can with projection 6 end face mutually ground connection partly paste.Then, shown in Figure 23 D,, smear resist, make wired circuit board with electromagnetic screen to the face that has formed wiring layer 10a and wiring layer 10b in order to protect wiring layer 10a and wiring layer 10b.
In the present embodiment, wiring layer 10a is owing to being connected with electromagnetic shielding film 32 via protruding 6, so as ground wire performance function.On the other hand, wiring layer 10b brings into play function as signal line.In addition, wiring layer 10a and wiring layer 10b are owing to being configured alternately, so can reduce the crosstalk that produces between the wiring layer 10b that adjoins each other.In addition, be the wired circuit board of irreducible minimum, can make highly integrated wired circuit board with electromagnetic screen by utilizing the distance between projection.
In addition, can paste electromagnetic shielding film on the two sides of wired circuit board.This structure has can be as the effect of HF link with the strip transmission line use.And then, in the present embodiment, at each signal wire (a wiring membrane 10b) configuration ground wire, but also can be not at each signal wire configuration ground wire.
In addition, in the present embodiment, utilize the wired circuit board of making by the manufacture method of embodiment 8 22, make wired circuit board, but the present invention has more than and is limited to this with electromagnetic screen.Also can use and smear or the method for printing conductive bonding agent and sintering, form electro-magnetic screen layer.In addition, also can utilize wired circuit board 22a that the manufacture method by embodiment 8 makes etc., make wired circuit board with electromagnetic screen.
[embodiment 15]
Then, as embodiments of the invention 15, used the manufacturing process of another wired circuit board of the wired circuit board of making by the manufacture method of embodiment 8 to 11 with reference to Figure 24 A～24F explanation.Figure 24 A～Figure 24 F is the sectional view of substrate of showing the manufacture method of the wired circuit board that embodiment 15 is relevant with process sequence.
Shown in Figure 24 A, prepare wired circuit board 22.Then, shown in Figure 24 B,, form the electrically conducting adhesive 34 that constitutes by metals such as gold, silver or copper on the ground, face top of the end face that has exposed projection 6 by methods such as ink-jet method, silk screen print method or harmonic methods.The end face of the part of electrically conducting adhesive 34 and projection 6 joins.
Then, on wiring layer forms with metal level 20c, smear resist,, form Etching mask (not shown) by exposing and developing.For example, on wiring layer forms with metal level 20c, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.Then by development treatment, remove the resist that has exposed, form Etching mask (not shown).Then, shown in Figure 24 C, this Etching mask as mask etching wiring layer formation metal level 20c, is formed wiring layer 10.This wiring layer 10 is connected with projection 6 via etch stop layer 20b.
Then, shown in Figure 24 D,, between the electrically conducting adhesive 34 that adjoins each other, form resistance bonding agent 35 by methods such as ink-jet method, silk screen print method or harmonic methods.Then, shown in Figure 24 E,, on the electrically conducting adhesive 34 that the end face with projection 6 joins, form electrically conducting adhesive 36 by methods such as ink-jet method, silk screen print method or harmonic methods.Then, shown in Figure 24 F, on electrically conducting adhesive 36, form electrically conducting adhesive 34.Like this, by clipping electrically conducting adhesive 36, form capacity cell with electrically conducting adhesive 34.
As mentioned above, can form polymerization build thick film circuit, form circuit by on another face, forming the wiring membrane that constitutes by copper simultaneously by formation resistance bonding agent or capacity cell on a face of wired circuit board.In addition, because the height of projection 6 and the thickness of dielectric film 4 are similar to, so just there is no need to have increased the height of unnecessary projection 6.In addition, be the wired circuit board of irreducible minimum, can form the signal circuit that has formed weak current to high-density and need the wired circuit board of the circuit of the contour electric current of power supply by utilizing the distance between projection.
In addition, in the present embodiment, form wiring layers 10 forming electrically conducting adhesive 34 back, but the present invention has more than and is limited to this.Also can before forming electrically conducting adhesive 34, form wiring layer 10.In addition, also can be after having formed capacity cell, etching also forms wiring layer 10.
In addition, in the present embodiment,, form electrically conducting adhesive, resistance bonding agent and dielectric bonding agent and make capacity cell, but the present invention has more than and is limited to this by methods such as ink-jet method, silk screen print method or harmonic methods.For example, also can on a face of wired circuit board, form the film of conductive material, resistance material and dielectric substance, form figure, thereby form conducting film, resistive film and dielectric film by etching by gunite, CVD method or vapour deposition method.Because can be by formation films such as gunitees, so can on polymeric films, make thin film circuit.
In addition, conductive material uses metals such as Cu, Au, Ag, Al, Ni, Ti, Cr, NiCr, Nb or V, and resistance material uses NiCr, Ta 2N, RuO 2Or SnO etc., dielectric substance uses SrTiO 3, BaTiO 3Or TiO etc.
In addition, in the present embodiment, on a face of wired circuit board, form thick film or thin film circuit, but also can on the two sides, form thick film or thin film circuit.With reference to Figure 25 A～Figure 25 E this method is described.Figure 25 A～Figure 25 E is the sectional view with the substrate of the manufacture method of process sequence displaying wired circuit board.
Shown in Figure 25 A, prepare to be provided with the wired circuit board of projection 6 at the internal run-through of dielectric film 4.By etching all sidedly and remove the wiring layer that is arranged on wired circuit board 22 and form and use metal level 20c, make this wired circuit board.Then, shown in Figure 25 B,, form the electrically conducting adhesive 34 that constitutes by gold, silver or copper on the ground, upper and lower surface top of this wired circuit board by methods such as ink-jet method, silk screen print method or harmonic methods.
Then, shown in Figure 25 C,, between the electrically conducting adhesive 34 that adjoins each other, form resistance bonding agent 35 by methods such as ink-jet methods.Then, shown in Figure 25 D,, on the electrically conducting adhesive 34 that the end face with projection 6 joins, form electrically conducting adhesive 36 by methods such as ink-jet methods.Then, shown in Figure 25 E, on electrically conducting adhesive 36, form electrically conducting adhesive 34.Like this, by clipping electrically conducting adhesive 36, form capacity cell with electrically conducting adhesive 34.
As mentioned above, can form thick film circuit by formation resistance bonding agent or capacity cell on two faces of wired circuit board.In addition, because the height of projection 6 and the thickness of dielectric film 4 are similar to, so just there is no need to have increased the height of unnecessary projection 6.In addition, by utilizing the short wired circuit board of distance between projection, can form the wired circuit board that has formed signal circuit to high-density.In addition, also can replace ink-jet method etc., form the film of conductive material etc. by gunite.Owing to can form film by gunite, so can make trickleer thin film circuit.
In addition, in the present embodiment, utilize the wired circuit board of making by the manufacture method of embodiment 8 22 to make wired circuit board, but the present invention have more than and is limited to this.Also can utilize the wired circuit board 22a that makes by the manufacture method of embodiment 8, make wired circuit board.
[embodiment 16]
Then, as embodiments of the invention 16, used the manufacturing process of the multilayer wiring circuit board of the wired circuit board of making by the manufacture method of embodiment 8 to 11 with reference to Figure 26 A～26C explanation.Figure 26 A～Figure 26 C is the sectional view of substrate of showing the manufacture method of the multi-layer wire substrate that embodiment 16 is relevant with process sequence.
Shown in Figure 26 A, prepare wired circuit board 2 and wired circuit board 22.Wired circuit board 2 is substrates of making by embodiment 1 relevant manufacture method.Wired circuit board 22 is substrates of making by embodiment 8 relevant manufacture methods.
Then, shown in Figure 26 B, wired circuit board 2 and wired circuit board 22 are carried out crimping, make the end face of projection 6 of wired circuit board 22 contact, make multi-layer wire substrate with the wiring layer 10 of wired circuit board 2.Like this, by projection 6 and wiring layer 10 are coupled together, projection 6 is as interlayer coupling part performance function.
Then, shown in Figure 26 C, partly the wiring layer of etching multi-layer wire substrate forms and forms wiring layer 10 with metal level 20c.This wiring layer 10 is connected with projection 6 via etch stop layer 20b.
As mentioned above, be the wired circuit board of irreducible minimum by the distance between stacked projection, can make highly integrated multi-layer wire substrate.In addition, in the multi-layer wire substrate of present embodiment, the end face owing to protruding 6 exposes from dielectric film 4, so the enough scolders of energy etc. directly are installed to parts (element) on its end face securely.And then, owing on figure, there is not installing component (element), the situation of taking off parts (element) so do not have also that figure is stripped from.In addition and since projection 6 be insulated film 4 round, so dielectric film 4 has and has formed the firm same effect of welding resist.
In addition, in the present embodiment, utilize the wired circuit board of making by the manufacture method of embodiment 8 22 to make multi-layer wire substrate, but the present invention have more than and is limited to this.Also can utilize the wired circuit board 22a that makes by the manufacture method of embodiment 8, make multi-layer wire substrate.
[embodiment 17]
Then, as embodiments of the invention 17, used the manufacturing process of the multi-layer wire substrate of the wired circuit board of making by the manufacture method of embodiment 8 to 11 with reference to Figure 27 A～27B explanation.Figure 27 A～Figure 27 B is the sectional view of substrate of showing the manufacture method of the multi-layer wire substrate that embodiment 17 is relevant with process sequence.
At first, shown in Figure 27 A, prepare 2 wired circuit boards 2, be provided with another wired circuit board of projection 6 at the internal run-through of dielectric film 4.Wired circuit board 2 is substrates of making by the manufacture method of the relevant wired circuit board of embodiment 1.In addition, the wiring layer of the wired circuit board of making by embodiment 8 relevant manufacture methods by etching partly 22 forms and forms wiring layer 10 with metal level 20c, makes.In addition, another wired circuit board is to form the substrate of making of metal level 20c by the wiring layer that all wired circuit boards 22 are removed in etching.
Then, to carrying out crimping between the wired circuit board 2, make the end face of projection 6 of the wiring layer 10 of a wired circuit board 2 and another wired circuit board 2 contact.And then, wired circuit board 2 and another wired circuit board are carried out crimping, make the bottom surface of projection 6 of the wiring layer 10 of wired circuit board 2 and another wired circuit board contact.Like this, by projection and wiring layer are coupled together, projection is as interlayer coupling part performance function.
As mentioned above, be the wired circuit board of irreducible minimum by the distance between stacked projection, can make highly integrated multi-layer wire substrate.In addition, in the multi-layer wire substrate of present embodiment, the end face owing to protruding 6 exposes from dielectric film 4, so parts (element) directly can be installed on its end face.And then, because not via electroplating installing component (element), so also do not have the situation of being stripped from and taking off parts (element) of electroplating.In addition and since projection 6 be insulated film 4 round, so dielectric film 4 has and has formed the firm same effect of welding resist.
In addition, in the present embodiment, utilize the wired circuit board of making by the manufacture method of embodiment 8 22 to make multi-layer wire substrate, but the present invention have more than and is limited to this.Also can utilize the wired circuit board 22a that makes by the manufacture method of embodiment 8, make multi-layer wire substrate.
[embodiment 18]
Then, as embodiments of the invention 18, used the manufacturing process of another wired circuit board of the wired circuit board of making by the manufacture method of embodiment 8 to 11 with reference to Figure 28 A～28D and Figure 29 A～29E explanation.Figure 28 A～28D and Figure 29 A～29E are the sectional views of substrate of showing the manufacture method of the multi-layer wire substrate that embodiment 18 is relevant with process sequence.
Shown in Figure 28 A, prepare wired circuit board 22.Wired circuit board 22 is substrates of making by embodiment 8 relevant manufacture methods.Then, shown in Figure 28 B, by metalliding, the end face at protruding 6 forms the film 20d that is made of copper from the face that dielectric film 4 exposes.
Then, shown in Figure 28 C,, on film 20d, form the metal film 20e that constitutes by copper by metalliding.Then, on metal film 20e, smear resist,, form Etching mask (not shown) by exposing and developing.For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.In the present embodiment, the resist between each projection 6 is exposed.Then by development treatment, remove the resist that has exposed, only on the end face of each projection 6, form Etching mask (not shown).
Then, shown in Figure 28 D, this Etching mask as mask etching film 20d and metal film 20e, is formed the wiring layer 11a of the figure with regulation, make wired circuit board.
In the present embodiment, form film, and then form wiring layer 11a, thereby make wired circuit board by metalliding by metalliding.But, also can make this wired circuit board by additive method.With reference to Figure 29 A～29E this method is described.
Shown in Figure 29 A, prepare wired circuit board 22.Then, shown in Figure 29 B, by metalliding, the end face at protruding 6 forms the film 20d that is made of copper from the face that dielectric film 4 exposes.
Then, shown in Figure 29 C, on film 20d, smear resist,, between each projection 6, form Etching mask 9 by exposing and developing.For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.In the present embodiment, the resist on the end face that spreads upon each projection 6 is exposed.Then by development treatment, remove the resist that has exposed, between each projection 6, form Etching mask 9.By such formation Etching mask 9, on each projection 6, do not form Etching mask 9.
Then, shown in Figure 29 D,, on film 20d, separate out the metal film 20e that constitutes by copper by electrochemical plating.At this moment, only on the part of having removed resist, separate out copper, on the part that has formed Etching mask 9, do not separate out copper.Then, when removing Etching mask 9,, form wiring layer 11a by carrying out comprehensive etching, remove being formed on the film 20d between the metal film 20e.A part that has reamed wiring layer 11a by this etching is surperficial, but because the film thickness of wiring layer 11a is thicker than the film thickness of film 20d, so even removed film 20d fully, also can not remove wiring layer 11a.
In addition, in the present embodiment, form film 20d by metalliding, but also can replace it, form film 20d by gunite.In addition, utilize the wired circuit board of making by the manufacture method of embodiment 8 22 to make another wired circuit board, but the present invention have more than and is limited to this.Also can utilize the wired circuit board 22a that makes by the manufacture method of embodiment 8, make another wired circuit board.
[embodiment 19]
Then, as embodiments of the invention 19, used the manufacturing process of the multi-layer wire substrate of the wired circuit board of making by the manufacture method of embodiment 8 to 11 with reference to Figure 30 A～30E and Figure 31 A～31F explanation.Figure 30 A～30E and Figure 31 A～31F are the sectional views of substrate of showing the manufacture method of the multi-layer wire substrate that embodiment 19 is relevant with process sequence.
Shown in Figure 30 A, prepare wired circuit board 2.Then, stacked dielectric film 4d on the face that has formed wiring layer 10, shown in Figure 30 B, perforate forms through hole 15 on dielectric film 4d.For example, can form this through hole 15 by a part of irradiating laser to dielectric film 4d.In addition, except by the laser beam drilling, can also carry out perforate by the part of etching dielectric film 4d.
Then, shown in Figure 30 C,, on dielectric film 4d, form the film 20d that constitutes by copper by metalliding.In through hole 15, also form film 20d, contact with wiring layer 10.Then, shown in Figure 30 D, on film 20d, form metal film 20e by metalliding.
Then, on metal film 20e, smear resist, by exposing and develop, around the inwall of through hole 15 and through hole 15, form Etching mask (not shown).For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.In the present embodiment, the resist that spreads upon through hole 15 part is in addition exposed.Then by development treatment, remove the resist that has exposed, around the inwall of through hole 15 and through hole 15, form Etching mask (not shown).
Then, shown in Figure 30 E, this Etching mask as mask etching film 20d and metal film 20e, is formed the wiring layer 10a of the figure with regulation.
In the present embodiment, form film 20d, and then form wiring layer 10a, thereby make wired circuit board by metalliding by metalliding.But, also can make this multi-layer wire substrate by additive method.With reference to Figure 31 A～31F this method is described.
Shown in Figure 31 A, prepare wired circuit board 2.Then, stacked dielectric film 4d on the face that has formed wiring layer 10, shown in Figure 31 B, perforate forms through hole 15 on dielectric film 4d.Then, shown in Figure 31 C,, on dielectric film 4d, form the film 20d that constitutes by copper by metalliding.In through hole 15, also form film 20d, contact with wiring layer 10.
Then, shown in Figure 31 D, smear resist on film 20d, by exposing and developing, the part beyond through hole 15 forms Etching mask 9.For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.In the present embodiment, exposed in the inside that spreads upon through hole 15 and resist on every side thereof.Then by development treatment, remove the inside that is formed on through hole 15 and resist on every side thereof.
Then, shown in Figure 31 E,, on film 20d, separate out the metal film 20e that constitutes by copper by electrochemical plating.At this moment, only on the part of having removed resist, separate out copper, on the part that has formed Etching mask 9, do not separate out copper.Then, when removing Etching mask 9, remove the film 20d that is formed on through hole 15 part in addition, shown in Figure 31 F, form wiring layer 10a by etching.Reamed the part of wiring layer 10a by this etching, but because the film thickness of wiring layer 10a is thicker than the film thickness of film 20d, so even removed film 20d fully, also can not remove wiring layer 10a.
In addition, in the present embodiment, form film 20d by metalliding, but also can replace it, form film 20d by gunite.In addition, utilize the wired circuit board of making by the manufacture method of embodiment 8 22 to make multi-layer wire substrate, but the present invention have more than and is limited to this.Also can utilize wired circuit board 22a that the manufacture method by embodiment 8 makes etc.
[embodiment 20]
Then, as embodiments of the invention 20, used the manufacturing process of another wired circuit board of the wired circuit board of making by the manufacture method of embodiment 8 to 11 with reference to Figure 32 A～32E and Figure 33 A～33F explanation.Figure 32 A～32E and Figure 33 A～33F are the sectional views of substrate of showing the manufacture method of the wired circuit board that embodiment 20 is relevant with process sequence.
Shown in Figure 32 A, prepare wired circuit board 22.Wired circuit board 22 is substrates of making by embodiment 8 relevant manufacture methods.Then, shown in Figure 32 B, perforate forms through hole 15 on dielectric film 4.For example, can form this through hole 15 by a part of irradiating laser to dielectric film 4.In addition, except by the laser beam drilling, can also carry out perforate by the part of etching dielectric film 4.
Then, shown in Figure 32 C,, on dielectric film 4, form the film 20d that constitutes by copper by metalliding.In through hole 15, also form film 20d, contact with wiring layer 10.Then, shown in Figure 32 D, on film 20d, form metal film 20e by metalliding.
Then, on metal film 20e, smear resist,, on the inwall and protruding 6 of through hole 15, form Etching mask (not shown) by exposing and developing.For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.In the present embodiment, the resist that spreads upon on through hole 15 and projection 6 part is in addition exposed.Then by development treatment, remove the resist that has exposed, on the inwall of through hole 15 and projection 6, form Etching mask (not shown).Then, shown in Figure 32 E, this Etching mask as mask etching film 20d and metal film 20e, is formed the wiring layer 11a of the figure with regulation.
In the present embodiment, form film 20d, and then form wiring layer 11a, thereby make wired circuit board by metalliding by metalliding.But, also can make this wired circuit board by additive method.With reference to Figure 33 A～33F this method is described.
Shown in Figure 33 A, prepare wired circuit board 22.Then, shown in Figure 33 B, perforate forms through hole 15 on dielectric film 4.Then, shown in Figure 33 C,, on dielectric film 4, form the film 20d that constitutes by copper by metalliding.Inside at through hole 15 also forms film 20d, forms with wiring layer to contact with metal level 20c.
Then, shown in Figure 33 D, on film 20d, smear resist,, on the part beyond through hole 15 and the projection 6, form Etching mask 9 by exposing and developing.For example, smear the resist of positive type, use exposed mask, resist is exposed according to this figure with compulsory figure.In the present embodiment, the resist on the inside and protruding 6 that spreads upon through hole 15 is exposed.By development treatment, remove the resist on the inside and protruding 6 that is formed on through hole 15 then.
Then, shown in Figure 33 E,, on film 20d, separate out the metal film 20e that constitutes by copper by electrochemical plating.At this moment, only on the part of having removed resist, separate out copper, on the part that has formed Etching mask 9, do not separate out copper.Then, when removing Etching mask 9, remove the film 20d that is formed on through hole 15 and projection 6 part in addition, shown in Figure 33 F, form wiring layer 11a by etching.Reamed the part of wiring layer 11a by this etching, but because the film thickness of wiring layer 11a is thicker than the film thickness of film 20d, so even removed film 20d fully, also can not remove wiring layer 10a.
In addition, in the present embodiment, form film 20d by metalliding, but also can replace it, form film 20d by gunite.In addition, utilize the wired circuit board of making by the manufacture method of embodiment 8 22 to make wired circuit board, but the present invention have more than and is limited to this.Also can utilize wired circuit board 22a that the manufacture method by embodiment 8 makes etc., make wired circuit board.
The present invention for example can be applicable to that electronic equipment such as IC, LSI is installed and use wired circuit board, particularly can carry out high-density installation wired circuit board, its manufacture method, possess the circuit module of this wired circuit board.Object lesson as circuit module is enumerated liquid-crystal apparatus, but the present invention has more than and be limited to this, also can use in other modules.

Claims (2)

1. circuit module is characterized in that comprising:
A wired circuit board, described wired circuit board comprises: a plurality of projectioies that on the surface of wiring layer, form, each projection comprises etch stop layer; And in the formation of above-mentioned wiring layer on the protruding face, the dielectric film that forms in the part that does not form above-mentioned projection, and
Liquid-crystal apparatus transparency carrier with transparent wiring membrane, wherein
Interconnecting via described etch stop layer and soldered ball of above-mentioned projection and above-mentioned transparent wiring membrane with the corresponding part of above-mentioned projection,
The end face of each above-mentioned projection exposes from the surface of above-mentioned dielectric film.
2. according to 1 described circuit module, it is characterized in that:
The end face of the projection of an above-mentioned wired circuit board forms concave spherical surface,
On this end face, directly form soldered ball.
CN200810169136XA 2003-03-31 2004-03-31 Wiring circuit board, manufacturing method for the wiring circuit board, and circuit module Expired - Fee Related CN101408688B (en)

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JP2003192192 2003-07-04
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JP2003289319A JP2005045191A (en) 2003-07-04 2003-08-07 Manufacturing method for wiring circuit board and for multi-layer wiring board
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KR101167429B1 (en) * 2010-10-11 2012-07-19 삼성전기주식회사 Method for manufacturing the semiconductor package
CN104703399A (en) * 2013-12-06 2015-06-10 富葵精密组件(深圳)有限公司 Circuit board and production method thereof
CN104599978B (en) * 2014-12-31 2017-08-01 广州兴森快捷电路科技有限公司 The preparation method of high salient point tin ball is prepared between a kind of spacing small on flip chip base plate
JP7007882B2 (en) * 2017-12-08 2022-01-25 新光電気工業株式会社 Wiring board and its manufacturing method
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1241815A (en) * 1998-06-29 2000-01-19 现代电子产业株式会社 Chip size package and method of fabricating the same
CN1288528A (en) * 1999-01-20 2001-03-21 时至准钟表股份有限公司 Structure for mounting semiconductor device on liquid crystal display, and semiconductor device
CN1292635A (en) * 1999-10-12 2001-04-25 株式会社能洲 Wiring circuit substrate and manufacturing method thereof
US6432748B1 (en) * 2001-09-24 2002-08-13 Phoenix Precision Technology Corp. Substrate structure for semiconductor package and manufacturing method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1241815A (en) * 1998-06-29 2000-01-19 现代电子产业株式会社 Chip size package and method of fabricating the same
CN1288528A (en) * 1999-01-20 2001-03-21 时至准钟表股份有限公司 Structure for mounting semiconductor device on liquid crystal display, and semiconductor device
CN1292635A (en) * 1999-10-12 2001-04-25 株式会社能洲 Wiring circuit substrate and manufacturing method thereof
US6432748B1 (en) * 2001-09-24 2002-08-13 Phoenix Precision Technology Corp. Substrate structure for semiconductor package and manufacturing method thereof

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