CN101404277A - 多芯片模块 - Google Patents

多芯片模块 Download PDF

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CN101404277A
CN101404277A CNA2008101688916A CN200810168891A CN101404277A CN 101404277 A CN101404277 A CN 101404277A CN A2008101688916 A CNA2008101688916 A CN A2008101688916A CN 200810168891 A CN200810168891 A CN 200810168891A CN 101404277 A CN101404277 A CN 101404277A
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chip module
electronic component
conductor
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substrate
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樱井祥嗣
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H05K2203/04Soldering or other types of metallurgic bonding
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    • HELECTRICITY
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Abstract

提供一种具有其上安装了电子元件的模块基板2、电连接到形成在模块基板2上的焊盘12的导体8、覆盖电子元件3和导体8的模压树脂6、以及连续形成在模压树脂6和从模压树脂6中暴露出来的导体8上的导电薄膜7的多芯片模块。

Description

多芯片模块
技术领域
本发明涉及能将由电子元件产生的电磁波封入的多芯片模块。
背景技术
JP-B-3941634(第3-6页和图2,下文称为“专利文献1”)和JP-A-2002-343923(第8-15页和图1,下文称为“专利文献2”)中公开了具有其上安装了多个电子元件且被屏蔽罩覆盖的模块基板的多芯片模块。图3是示出专利文献1中所描述的多芯片模块的外形的侧视图。多芯片模块20具有其中安装了多个电子元件的模块基板2。电子元件3分别由半导体芯片等等组装而成,且一起构成电路。
金属屏蔽罩外壳4通过焊料5附着到模块基板上以覆盖电子元件3。屏蔽罩外壳4将由电子元件3产生的电磁波封入。
在上述多芯片模块20中,焊盘(未示出)在组件衬底2上形成用于将屏蔽罩外壳4焊接到模块基板2上。这样的焊盘需要很大面积以确保屏蔽罩外壳4牢固附着。此外,需要在电子元件3和屏蔽罩外壳4之间留出足够的空间以防止它们之间接触。这不合需要地导致多芯片模块1尺寸的增大。
图4是示出专利文献2中所描述的多芯片模块的外形的侧视图。在多芯片模块21中,形成在模块基板2上的电子元件3封装在模压树脂6中。在模压树脂6上,形成由金属等等制成的导电薄膜7。导电薄膜7将由电子元件3产生的电磁波封入。
上述多芯片模块21消除了用于屏蔽罩4附着的对焊盘的需要。此外,因为通过使用真空印刷等等方法能高精度地控制模压树脂6的厚度,所以有可能减小电子元件3和导电薄膜7之间的距离。这使多芯片模块21的最小化成为可能。
然而,因为导电薄膜7没有接地,所以专利文献2中公开的上述多芯片模块21遭受不稳定的电压。这不便地使得不可能获得充分的屏蔽效率。
发明内容
本发明的一个目的是提供能实现最小化并获得改善的屏蔽效率的多芯片模块。
为实现上述目的,根据本发明的一个方面,一种多芯片模块设置有:其上安装了电子元件的模块基板;电连接到形成在该模块基板上的焊盘的导体;覆盖该电子元件和该导体的模压树脂;连续形成在该模压树脂和从该模压树脂中暴露出来的该导体上的导电薄膜。
在该结构中,电子元件安装在模块基板上,且该模块基板设置有形成为导电图形的焊盘。该导体例如焊接到该焊盘上以电连接到其上。电子元件和导体被封装在模压树脂中,使得导体的表面暴露在模压树脂外。在模压树脂和暴露于模压树脂外的导体的表面上,通过电镀等方法连续形成导电薄膜。因此,使形成在模压树脂上的导电薄膜与焊盘电连通,且导电薄膜将由电子元件产生的电磁波封入。
这样通过将焊盘接地有可能保持导电薄膜处于接地电压。这有助于稳定导电薄膜的电压,并给予该多芯片模块改善的屏蔽效率。
因为能高精度地控制模压树脂的厚度,所以有可能减小电子元件和导电薄膜之间的空间。此外,因为连接到焊盘的导体由模压树脂支撑,所以有可能使焊盘面积更小。这些因素使多芯片模块的最小化成为可能。
在如上所述的多芯片模块中,优选使导体比电子元件高。这使导体更容易从压模树脂中暴露出来,并更容易提供导体和导电薄膜之间的连通。
优选还将具有形成在模块基板上的迹线提供给如上所述构造的多芯片模块,该迹线连接到电子元件。在这里,焊盘与该迹线无关地形成。
以这种结构,电子元件通过与焊盘无关地形成的迹线连接到母板等以接收信号等。这有可能确保导电薄膜和迹线之间的绝缘并获得稳定屏蔽效率。
在如上所述的多芯片模块中,优选该导体包括设置在电子元件周围的多个导体。以这种结构,设置在电子元件周围的多个导体将电子元件产生的电磁波封入。这有可能进一步改善屏蔽效率。
在如上所述构造的多芯片模块中,优选该导体是焊球。这使该导体更容易连接到焊盘,并有可能降低该多芯片模块的成本。
在如上所述构造的多芯片模块中,优选该模块基板是多层线路基板。这有助于在更小面积内构成复杂的和更高密度的布线,有助于多芯片模块的进一步最小化。
在如上所述构造的多芯片模块中,优选该模块基板是陶瓷基板。这样有可能获得具有改善散热的高可靠性多芯片模块。
在如上所述构造的多芯片模块中,优选该模块基板是树脂基板。这样有可能获得高密度布线,有可能使该多芯片模块进一步最小化。
在如上所述构造的多芯片模块中,优选电子元件由半导体芯片、电阻、电感、电容器、晶体振荡器、和滤波器的任一个或任意组合组装成。这样有可能使用薄的电子元件,使该多芯片模块更薄。
附图说明
图1是示出根据本发明实施例的多芯片模块的俯视图;
图2是示出根据本发明实施例的多芯片模块的侧截面图;
图3是示出常规多芯片模块的侧截面图;以及
图4是示出常规多芯片模块的侧截面图。
具体实施方式
以下将参考附图描述本发明的实施例。图1和图2是分别示出实施例的多芯片模块的俯视图和侧截面图。为方便起见,也能在图3和图4所示的上述常规示例中找到的这样的部分在这些图中将以相同的参考标记标识。多芯片模块1具有其中安装了多个电子元件的模块基板2。
将模块基板2形成为陶瓷基板或树脂基板。陶瓷基板的热膨胀率较低,散热率高,且能提供优异的电绝缘。因此,通过将模块基板2形成为陶瓷基板,有可能提供具有改善的散热性能的多芯片模块1。此外,这样做有助于减少膨胀和收缩以及由电子元件3产生的热引起的绝缘击穿,有可能实现高可靠性的多芯片模块1。
另一方面,将模块基板2形成为树脂基板,有可能实现高密度布线。这允许通过使用倒装焊实现来安装芯片,有可能使多芯片模块1最小化。而且,还优选将模块基板2形成为多层线路基板。这样做有助于在更小面积中形成复杂的和高密度布线。这有助于多芯片模块1的进一步最小化。
电子元件3分别由半导体芯片、电阻、电感、电容器、晶体振荡器、滤波器的任一个或任意组合一起构成电路。能使这些电子元件3更薄。使用这些薄电子元件3有可能使该多芯片模块1更薄。
模块基板2具有形成在其上的迹线9和10。迹线9和10分别具有位于模块基板2边缘的连接件部分11,该连接件部分11通过连接件连接到母板等等。电子元件3连接到迹线10。迹线10通过连接件部分11分别连接到母板等等用于接收电能或信号到每个电子元件3。
在所形成的与迹线10无关的迹线9上,形成了多个焊盘12。迹线9通过连接件部分11连接到母板等等的地电位。
将由金属等组成的导体8例如焊接到焊盘12以与之电连接。将焊球用作导体8容易实现焊接,且它的多用性和低价格有助于减少多芯片模块1的成本。将电子元件3和导体8通过真空印刷等封装在模压树脂6中。使导体8比电子元件3高,并形成模压树脂6使得每个导体8的上表面从中暴露出来。
在模压树脂6和从模压树脂6中暴露出来的导体8上,通过电镀、气相沉积等连续形成由金属等组成的导电薄膜7。因此,使形成在模压树脂6上的导电薄膜7通过导体8与焊盘12电连通。
在如上所述构造的多芯片模块1中,迹线9连接到母板等的地电压,而焊盘12、导体8以及导电薄膜7保持在地电压。这有可能用处于地电压的导电薄膜7将由电子元件3产生的电磁波封入。
根据该实施例,因为形成在覆盖电子元件3的模压树脂6上的导电薄膜7连续形成在与焊盘12电连通的导体8上,有可能通过将焊盘12接地而将导电薄膜7保持在地电压。这有助于稳定导电薄膜7的电压,并给予该多芯片模块1改善的屏蔽效率。
因为通过使用真空印刷等等方法能够高精度地控制模压树脂6的厚度,所以有可能减少电子元件3和导电薄膜7之间的距离。此外,因为连接到焊盘12的导体8由模压树脂6支撑,所以有可能使焊盘12的面积更小。这些因素使多芯片模块1的最小化成为可能。
应当注意的是,只要导体8的上表面从模压树脂6中暴露出来,就可使导体8低于电子元件3。不过,像本实施例中一样使导体8高于电子元件3,使导体8更容易从模压树脂6中暴露出来,并更容易在导体8和导电薄膜7之间提供连通。
而且,因为所形成的焊盘12和迹线9与连接到电子元件3的迹线10无关,所以有可能确保导电薄膜7和迹线10之间的绝缘并获得稳定的屏蔽效率。
在该实施例中,只要连接到导体8的焊盘12的至少一个连接到母板等的地电压,就有可能通过导电薄膜7将导体8保持在相同的电压。在其中安装了产生强电磁波的电子元件3的情况下,自然有必要以包围电子元件3的方式设置多个导体8。这有可能进一步改善屏蔽效率。
本发明能应用于将由电子元件产生的电磁波封入的多芯片模块。

Claims (9)

1.一种多芯片模块,包括:
其上安装了电子元件的模块基板;
电连接到形成在所述模块基板上的焊盘的导体;
覆盖所述电子元件和所述导体的模压树脂;以及
连续形成在所述模压树脂和从所述模压树脂中暴露出来的所述导体上的导电薄膜。
2.如权利要求1所述的多芯片模块,其特征在于,
所述导体被制成高于所述电子元件。
3.如权利要求1所述的多芯片模块,还包括:
形成在所述模块基板上的迹线,所述迹线连接到所述电子元件,
其中所述焊盘与所述迹线无关地形成。
4.如权利要求1所述的多芯片模块,其特征在于,
所述导体包括设置在所述电子元件周围的多个导体。
5.如权利要求1所述的多芯片模块,其特征在于,
所述导体是焊球。
6.如权利要求1所述的多芯片模块,其特征在于,
所述模块基板是多层线路基板。
7.如权利要求1所述的多芯片模块,其特征在于,
所述模块基板是陶瓷基板。
8.如权利要求1所述的多芯片模块,其特征在于,
所述模块基板是树脂基板。
9.如权利要求1所述的多芯片模块,其特征在于,
所述电子元件由半导体芯片、电阻、电感、电容器、晶体振荡器、和滤波器的任一个或任一组合组装成。
CNA2008101688916A 2007-10-03 2008-09-27 多芯片模块 Pending CN101404277A (zh)

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JP2007260116A JP2009094095A (ja) 2007-10-03 2007-10-03 マルチチップモジュール
JP2007260116 2007-10-03

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