CN101292334A - 源极区和漏极区之间具有box层的应变硅mos器件 - Google Patents
源极区和漏极区之间具有box层的应变硅mos器件 Download PDFInfo
- Publication number
- CN101292334A CN101292334A CNA2006800390839A CN200680039083A CN101292334A CN 101292334 A CN101292334 A CN 101292334A CN A2006800390839 A CNA2006800390839 A CN A2006800390839A CN 200680039083 A CN200680039083 A CN 200680039083A CN 101292334 A CN101292334 A CN 101292334A
- Authority
- CN
- China
- Prior art keywords
- oxide
- drain region
- source area
- region
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims description 37
- 229910052710 silicon Inorganic materials 0.000 title claims description 37
- 239000010703 silicon Substances 0.000 title claims description 35
- 238000000034 method Methods 0.000 claims description 32
- 229910000676 Si alloy Inorganic materials 0.000 claims description 28
- 238000005530 etching Methods 0.000 claims description 21
- 239000000463 material Substances 0.000 claims description 18
- 229910052751 metal Inorganic materials 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 15
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 12
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 claims description 12
- 238000005516 engineering process Methods 0.000 claims description 11
- 239000003989 dielectric material Substances 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 7
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 7
- 230000000630 rising effect Effects 0.000 claims description 7
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 7
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- 239000004411 aluminium Substances 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 230000006835 compression Effects 0.000 claims description 5
- 238000007906 compression Methods 0.000 claims description 5
- 229910044991 metal oxide Inorganic materials 0.000 claims description 5
- 150000004706 metal oxides Chemical class 0.000 claims description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 4
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 claims description 4
- 229910052787 antimony Inorganic materials 0.000 claims description 4
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 claims description 4
- 229910052785 arsenic Inorganic materials 0.000 claims description 4
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 4
- 229910052796 boron Inorganic materials 0.000 claims description 4
- 238000011065 in-situ storage Methods 0.000 claims description 4
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 claims description 4
- 229910052698 phosphorus Inorganic materials 0.000 claims description 4
- 239000011574 phosphorus Substances 0.000 claims description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 4
- IATRAKWUXMZMIY-UHFFFAOYSA-N strontium oxide Chemical compound [O-2].[Sr+2] IATRAKWUXMZMIY-UHFFFAOYSA-N 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 239000010936 titanium Substances 0.000 claims description 4
- 229920000620 organic polymer Polymers 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims description 2
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims description 2
- WUNIMIODOAGQAW-UHFFFAOYSA-N [O-2].[Ba+2].[Ti+4] Chemical compound [O-2].[Ba+2].[Ti+4] WUNIMIODOAGQAW-UHFFFAOYSA-N 0.000 claims description 2
- PXNDALNSUJQINT-UHFFFAOYSA-N [Sc].[Ta] Chemical compound [Sc].[Ta] PXNDALNSUJQINT-UHFFFAOYSA-N 0.000 claims description 2
- ILCYGSITMBHYNK-UHFFFAOYSA-N [Si]=O.[Hf] Chemical compound [Si]=O.[Hf] ILCYGSITMBHYNK-UHFFFAOYSA-N 0.000 claims description 2
- JIMUOUDLWPNFAY-UHFFFAOYSA-N [Si]=O.[Hf].[N] Chemical compound [Si]=O.[Hf].[N] JIMUOUDLWPNFAY-UHFFFAOYSA-N 0.000 claims description 2
- 229910052454 barium strontium titanate Inorganic materials 0.000 claims description 2
- 229910017052 cobalt Inorganic materials 0.000 claims description 2
- 239000010941 cobalt Substances 0.000 claims description 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 239000010949 copper Substances 0.000 claims description 2
- 229910052735 hafnium Inorganic materials 0.000 claims description 2
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 2
- 229910000464 lead oxide Inorganic materials 0.000 claims description 2
- 150000001247 metal acetylides Chemical class 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- YEXPOXQUZXUXJW-UHFFFAOYSA-N oxolead Chemical compound [Pb]=O YEXPOXQUZXUXJW-UHFFFAOYSA-N 0.000 claims description 2
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 claims description 2
- 229910052763 palladium Inorganic materials 0.000 claims description 2
- 229910052697 platinum Inorganic materials 0.000 claims description 2
- 229910052707 ruthenium Inorganic materials 0.000 claims description 2
- 229910001925 ruthenium oxide Inorganic materials 0.000 claims description 2
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 claims description 2
- CZXRMHUWVGPWRM-UHFFFAOYSA-N strontium;barium(2+);oxygen(2-);titanium(4+) Chemical compound [O-2].[O-2].[O-2].[O-2].[Ti+4].[Sr+2].[Ba+2] CZXRMHUWVGPWRM-UHFFFAOYSA-N 0.000 claims description 2
- 229910052715 tantalum Inorganic materials 0.000 claims description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 2
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 2
- 229910001936 tantalum oxide Inorganic materials 0.000 claims description 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 2
- 229910052721 tungsten Inorganic materials 0.000 claims description 2
- 239000010937 tungsten Substances 0.000 claims description 2
- -1 yittrium oxide Chemical compound 0.000 claims description 2
- 229910052725 zinc Inorganic materials 0.000 claims description 2
- 239000011701 zinc Substances 0.000 claims description 2
- 229910052726 zirconium Inorganic materials 0.000 claims description 2
- GFQYVLUOOAAOGM-UHFFFAOYSA-N zirconium(iv) silicate Chemical compound [Zr+4].[O-][Si]([O-])([O-])[O-] GFQYVLUOOAAOGM-UHFFFAOYSA-N 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 claims 4
- 238000000576 coating method Methods 0.000 claims 4
- 230000007547 defect Effects 0.000 abstract description 7
- 230000003071 parasitic effect Effects 0.000 abstract description 7
- 125000006850 spacer group Chemical group 0.000 abstract description 5
- 206010010144 Completed suicide Diseases 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 16
- 230000008569 process Effects 0.000 description 13
- 239000002019 doping agent Substances 0.000 description 8
- 238000000151 deposition Methods 0.000 description 6
- 230000000873 masking effect Effects 0.000 description 4
- 229910001092 metal group alloy Inorganic materials 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 208000002925 dental caries Diseases 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910000323 aluminium silicate Inorganic materials 0.000 description 1
- 238000000231 atomic layer deposition Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- HNPSIPDUKPIQMN-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Al]O[Al]=O HNPSIPDUKPIQMN-UHFFFAOYSA-N 0.000 description 1
- 201000006549 dyspepsia Diseases 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 229940104869 fluorosilicate Drugs 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- QKCGXXHCELUCKW-UHFFFAOYSA-N n-[4-[4-(dinaphthalen-2-ylamino)phenyl]phenyl]-n-naphthalen-2-ylnaphthalen-2-amine Chemical compound C1=CC=CC2=CC(N(C=3C=CC(=CC=3)C=3C=CC(=CC=3)N(C=3C=C4C=CC=CC4=CC=3)C=3C=C4C=CC=CC4=CC=3)C3=CC4=CC=CC=C4C=C3)=CC=C21 QKCGXXHCELUCKW-UHFFFAOYSA-N 0.000 description 1
- 229910021334 nickel silicide Inorganic materials 0.000 description 1
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 description 1
- 229960000909 sulfur hexafluoride Drugs 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys
- H01L29/165—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66628—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation recessing the gate by forming single crystalline semiconductor material at the source or drain location
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66636—Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7848—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the source/drain region, e.g. SiGe source and drain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78639—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a drain or source connected to a bulk conducting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78684—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
- H01L29/78687—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys with a multilayer structure or superlattice structure
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
一种MOS器件包括:栅极叠层,其包括设置于栅极电介质上的栅电极;形成于栅极叠层的横向相对侧上的第一间隔体和第二间隔体;邻接第一间隔体的源极区;邻接第二间隔体的漏极区;以及位于栅极叠层下方且设置在源极区和漏极区之间的沟道区。本发明的MOS器件还包括位于沟道区下方且设置在源极区和漏极区之间的掩埋氧化物(BOX)区域。该BOX区域使得能够形成更深的源极区和漏极区以减小晶体管电阻并使尖峰缺陷自毁,同时防止栅极边缘结寄生电容。
Description
背景技术
半导体衬底上集成电路器件,例如晶体管、电阻器和电容器增强的性能通常是设计、制造和操作这些器件期间考虑的主要因素。例如,在设计和制造金属氧化物半导体(MOS)晶体管器件,例如用在互补金属氧化物半导体(CMOS)中的金属氧化物半导体晶体管器件时,常常希望提高N型MOS器件(NMOS)沟道中电子的迁移率,并且提高P型MOS器件(PMOS)沟道中带正电的空穴的迁移率。
一种用于提高MOS晶体管中电子和空穴迁移率的技术在晶体管的沟道区中使用了应变硅。沟道中的硅原子被整齐包裹在点阵结构中。拉伸该点阵结构,使得硅原子比它们的自然状态分隔得更远,这使得NOMS晶体管切换得更快。类似地,压缩点阵结构使得PMOS晶体管切换得更快。这种拉伸和压缩被称为硅的应变。
为了使沟道区中的硅发生应变,蚀刻MOS晶体管的源极区和漏极区并用点阵结构与轻掺杂硅沟道区不同的硅合金来进行替代。蚀刻工艺除去了源极/漏极区并对与晶体管栅极叠层相邻的间隔体进行底割(undercut)。图1和2中示出了这种情况。图1示出了构建于体硅衬底102上的MOS晶体管100。用硅合金108填充晶体管100升高的源极区104和升高的漏极区106,该硅合金108给沟道区110带来了应变。如图所示,底割112容许硅合金108填入一对间隔体114下方的区域中,该对间隔体114形成于晶体管栅极叠层116的横向相对侧上。
图2示出了已经形成于绝缘体上硅(SOI)衬底200上的相似的MOS晶体管100。SOI衬底200包括夹置在薄硅器件层204和体硅层206之间的掩埋氧化物层202。这里所示的晶体管100包括被硅合金108填充的源极区104和漏极区106,该硅合金108给沟道区110带来应变。同样,底割112容许硅合金108填入间隔体114下方的区域中。
基于性能和短沟道效应(SCE)之间的折衷来选择底割深度。太深的底割可能会劣化SCE,因为源极区和漏极区之间的间隔变得非常小,导致表面穿通泄漏电流增大。此外,由于在沟道区两侧上形成的垂直壁较长,深的底割会增大栅极边缘结寄生电容。
不过,深底割是有益的,因为它们容许增大硅应变并降低电阻。电阻更低是因为在浅底割中电流在从接触被收集之前几乎没有空间散布,造成非常高的电阻。深的底割还防止了自对准多晶硅化物的尖峰(spike)缺陷,在底割深度浅于相邻浅沟槽隔离(STI)结构中的剩余氧化物时可能发生这种缺陷。图3示出了会出现自对准多晶硅化物尖峰缺陷的常规配置。如图所示,晶体管300形成于SOI衬底302上。晶体管300包括浅底割区域304,该浅底割区域304在掩埋氧化物层308顶部留下硅薄层306。相邻的STI结构310通常由于处理的原因具有浅高度,这使得硅薄层306能够与接下来淀积的镍金属层312接触。硅薄层302和镍金属层312之间的接触可能会导致自对准多晶硅化物尖峰缺陷。
因此,100nm以下的应变硅MOS器件需要一种改进的设计,这种设计能够减小源极区和漏极区之内的电阻并减小栅极边缘寄生电容,同时提高迁移率增益并针对表面下穿通进行保护。
附图说明
图1示出了构建于体硅衬底上的常规MOS晶体管。
图2示出了构建于SOI衬底上的常规MOS晶体管。
图3示出了具有硅化物尖峰缺陷的常规MOS晶体管。
图4为形成根据本发明实施例的晶体管的方法。
图5到9示出了在执行图4的方法时形成的结构。
具体实施方式
这里描述的是形成源极区和漏极区之间包括掩埋氧化物层的MOS晶体管的***和方法。在下述说明中,将使用本领域技术人员通用的将他们的工作实质传达给本领域其他技术人员的术语描述例示实施例的各方面。不过,对于本领域的技术人员来说显然本发明可以仅利用所述各方面中的一些来加以实践。出于解释的目的,阐述了具体的数目、材料和构造,以提供对例示实施例的透彻理解。不过,对于本领域技术人员而言,显然可以不用特定细节实践本发明。在其他情况下,省略或简化公知的特征以免让例示实施例难以理解。
将会把各种操作描述为多个分立的操作,同时也以最有助于理解本发明的方式加以描述,不过,不应将描述顺序视为暗指这些操作一定是取决于次序的。具体而言,这些操作不必按照说明的次序执行。
本发明的实施例提供了用于在升高的源极区和漏极区之间包括掩埋氧化物(BOX)层的单轴向应变MOS晶体管的***和方法。在源极区和漏极区之间形成BOX层就能够使用深底割,同时使与常规深底割相关的问题最小化。具体而言,在源极区和漏极区之间包括BOX层就能够使用深底割,以减小源极/漏极电阻并防止自对准多晶硅化物尖峰缺陷,同时抑制可能会导致栅极边缘寄生电容的耗尽层的形成。
图4示出了用于形成根据本发明一个实施例的MOS晶体管的方法400。图5到9示出了在执行方法400时形成的结构。以下的说明将参考图5到9以进一步解释和阐明方法400的各处理阶段。
首先,提供完全耗尽的绝缘体上硅(SOI)衬底(图4的402)。本领域公知,SOI晶片一般包括硅薄层和体硅衬底之间的绝缘层,例如氧化硅(SiO2)层。因此该绝缘层是“掩埋”在硅之内的,可以被称为掩埋氧化物(BOX)层。在备选实施例中,可以使用除SiO2之外的BOX层,包括但不限于掺碳氧化物(CDO)、有机聚合物、全氟环丁烷(PFCB)、氮氧化物和氟硅酸盐玻璃(FSG)。在一些实施例中,BOX层可以掺有诸如氮的掺杂剂。
图5示出了硅薄层504和体硅衬底506之间形成有BOX层502的常规SOI晶片500。可以在硅薄层504上形成一个或多个集成电路器件,例如晶体管。BOX层502的存在通常减小了电容,因此通常减少了在开关操作期间每个晶体管必须要移动的电荷量,使得晶体管速度更快并使其能以更少能量进行切换。在很多情况下,构建于SOI晶片上的集成电路可以更快,并使用比常规CMOS集成电路更少的功率。SOI晶片500还可以包括STI结构508,以对将要形成的器件,如晶体管进行电隔离。
在本发明的实施例中,优选使用利用氧注入分隔(SIMOX)工艺形成的SOI衬底,即所谓的SIMOX晶片,以避免在后面的外延生长期间发生任何可能的晶格失配问题。如本领域公知的,其他SOI晶片,例如Smart Cut SOI晶片,即使在它们具有相同晶体取向时也可能在BOX层和硅主体之间具有横向偏移。
然后在SOI晶片顶部形成MOS器件,如PMOS和/或NMOS器件的晶体管栅极叠层以及任何必要的间隔体(404)。在常规CMOS处理中,PMOS和NOMS晶体管都是形成于同一硅晶片上的。因此,将使用一些栅极叠层构建PMOS晶体管,而用其他栅极叠层构建NOMS晶体管。图6示出了已经在SOI晶片500顶部、STI结构508之间形成的一个晶体管栅极叠层600。如本领域所公知的,每个晶体管栅极叠层600至少包括栅电极602和栅极电介质604。通常在晶体管栅极叠层600的横向相对侧上形成一对间隔体606。
在一些实施例中,栅极电介质604可以由外延生长的二氧化硅(SiO2)形成。可以通过淀积并蚀刻多晶硅层形成栅电极602。可以使用常规光刻技术来构图多晶硅以形成栅电极602。在该实施例中,晶体管栅极叠层600还可以包括多晶硅栅电极顶部的硅化物层(未示出)。例如,可以在晶体管栅极叠层600上淀积镍层并退火来形成硅化镍层。可以利用常规的金属淀积工艺,例如溅射淀积工艺来淀积镍层。
在其他实施例中,栅极电介质604可以由高k介电材料形成,并且可以用金属或金属合金形成栅电极602。这种晶体管被称为高k/金属栅极晶体管。可以用作栅极电介质604的高k介电材料包括但不限于氧化铪、氧化铪硅、氮氧化铪硅、氧化镧、氧化锆、氧化锆硅、氧化钽、氧化钛、氧化钡锶钛、BST、氧化钡钛、氧化锶钛、氧化钇、氧化铝、氧化铅钪钽、铌酸铅锌和PZT,以及其他铪(Hf)基或锆(Zr)基材料。在一些实施例中,高k介电材料可以经过退火。可以用作栅电极602的金属或金属合金包括但不限于铜、钌、钯、铂、钴、镍、氧化钌、钨、铝、钛、钽、氮化钛、氮化钽、铪、锆、金属碳化物或导电金属氧化物。
在一些实施例中,可以通过首先形成间隔体来形成高k/金属栅极晶体管栅极叠层。然后在间隔体之间淀积高k介电材料层并退火。最后,在高k介电材料顶部淀积金属或金属合金层并进行平坦化以形成金属栅电极。可以用常规的化学机械抛光(CMP)工艺来对淀积的金属进行平坦化。
在其他实施例中,可以通过首先向SOI晶片上淀积高k介电材料并对高k介电材料退火来形成高k/金属栅极晶体管栅极叠层。然后可以蚀刻高k介电材料以形成栅极电介质。可以在栅极电介质的横向相对边缘上形成一对间隔体,并且可以在高k介电材料顶部淀积金属或金属合金层。然后可以通过例如CMP对金属层进行平坦化以形成金属栅电极。
可以利用诸如氮化硅的材料形成间隔体606。不论晶体管栅极叠层600是由SiO2/多晶硅构成还是由高k/金属构成,间隔体材料可以是相同的。
在一些实施例中,任选地,可以向硅薄层504与间隔体606相邻的区域中注入掺杂剂来形成源极区和漏极区(未示出)。可用来形成源极区和漏极区的掺杂剂是本领域公知的,例如用于形成N型区域的砷、磷和/或锑,以及用于形成P型区域的硼和/或铝。可以使用高温退火工艺来激活掺杂剂以完成源极区和漏极区的形成。虽然如本领域公知的,掺杂源极区和漏极区的形成不是必须的,但高掺杂源极区和漏极区的存在可以辅助后续蚀刻工艺。
在形成晶体管栅极叠层和间隔体之后,用掩模遮蔽一组栅极叠层,使其在下述的后续蚀刻和淀积工艺中不被暴露(406)。根据本发明,构建PMOS晶体管所需的蚀刻和淀积工艺不同于构建NOMS晶体管所需的蚀刻和淀积工艺。例如,如果已经形成了源极区和漏极区,PMOS晶体管中使用的掺杂剂不同于NMOS晶体管中使用的掺杂剂,因此可能需要不同的蚀刻工艺。此外,将在PMOS晶体管中用于赋予压缩应变的硅合金不同于将在NOMS晶体管用于赋予拉伸应变的硅合金。因此,如果根据本发明的实施例形成PMOS晶体管,则利用掩蔽材料遮挡住用于NOMS晶体管的晶体管栅极叠层。类似地,如果根据本发明的实施例形成NMOS晶体管,则利用掩蔽材料遮挡住用于POMS晶体管的晶体管栅极叠层。
可用于掩蔽一组晶体管的材料包括但不限于氧化物、氮化物、氮氧化物及其他类似材料。在本发明的实施例中,可以在SOI晶片上淀积掩蔽材料,并且可以用常规光刻技术对掩蔽材料构图以暴露适当的晶体管栅极叠层。
然后进行各向同性蚀刻工艺以除去硅薄层与间隔体相邻的、并对应于将要形成源极区和漏极区的区域的至少一部分(408)。在本发明的实施例中,各向同性蚀刻工艺除去硅,直至SOI晶片的BOX层。各向同性蚀刻工艺还在间隔体下方形成底割区域。这些底割区域可以在横向上靠近晶体管栅极叠层的边缘。
在本发明的一些实施例中,可以利用六氟化硫(SF6)和/或三氟化氮(NF3)用干法蚀刻工艺执行各向同性蚀刻工艺。在备选实施例中,可以使用采用诸如四甲基氢氧化铵(TMAH)的材料的湿法蚀刻工艺。如本领域的技术人员所认识到的,这里也可以使用其他各向同性蚀刻工艺。
图7示出了具有蚀刻后的源极区和漏极区的SOI晶片500。如图所示,向下直到BOX层502形成第一空腔区域700,其包括间隔体606之一下方的底割区域702。底割区域702的内边缘在横向上靠近晶体管栅极叠层600的边缘704。类似地,向下直到BOX层502形成第二空腔区域706,其包括另一个间隔体606下方的底割区域708。底割区域708的内边缘在横向上靠近晶体管栅极叠层600的边缘710。保留的硅薄层504的部分形成MOS晶体管的沟道区。现在将把该区域称为沟道区712。
接下来,执行各向异性刻蚀工艺,以除去在各向同性蚀刻工艺期间形成于空腔区域下方的BOX层部分(410)。在本发明的实施例中,各向异性刻蚀工艺除去BOX层,向下直至SOI晶片的体硅衬底。在一个实施例中,可以利用采用C5F8气体的干法蚀刻工艺执行各向异性刻蚀工艺。如本领域的技术人员所认识到的,这里也可以使用其他各向异性蚀刻工艺。
图8示出了具有蚀刻后的BOX层502的SOI晶片500,以下将该蚀刻后的BOX层称为BOX区域800。如图所示,现在第一空腔区域700和第二空腔区域706包括了蚀刻BOX层502留下的空洞。因为用于除去BOX层502的蚀刻工艺是各向异性工艺,因此基本未除去沟道区712下方的BOX层502的部分(即,BOX区域800)。此外,如图8所示,除去部分BOX层502的各向异性刻蚀工艺还可以除去STI结构508的部分。
然后执行淀积工艺,用能够为晶体管上的沟道区赋予应变的适当的硅合金(例如SixYz)填充第一空腔和第二空腔(412)。淀积的硅合金形成了MOS晶体管的源极区和漏极区。在一个实施例中,可以用外延淀积工艺来用硅合金填充第一和第二空腔。在其他实施例中,可以用诸如物理气相淀积、化学气相淀积或原子层淀积的备选淀积工艺来向空腔中淀积硅合金。在其他实施例中,可以使用能够充当源极区和漏极区并且能够在沟道区上带来应变的非硅合金材料。
如果正在形成PMOS晶体管,淀积到第一和第二空腔中的硅合金可以是为晶体管的沟道区上带来压缩应变的材料。在一些实施例中,可以使用硅锗(SiGe)合金。可以与硅合金淀积一起执行现场掺杂工艺以将诸如硼或铝的掺杂剂引入硅合金中,从而形成P掺杂区域。
如果正在形成NMOS晶体管,淀积到第一和第二空腔中的硅合金可以是为晶体管的沟道区上带来拉伸应变的材料。在一些实施例中,可以使用碳化硅(SiC)合金。同样,可以在硅合金淀积期间执行现场掺杂工艺,以向硅合金中引入诸如砷、磷和/或锑的掺杂剂,从而形成N掺杂区域。
在本发明的实施例中,硅合金的淀积可以持续到形成了升高的源极区和漏极区为止。升高的源极区和漏极区在本领域中是公知的,由顶表面与沟道区的顶表面不共面的硅合金区域构成。升高的源极区和漏极区通常延伸到沟道区的顶表面之上,由此使得源极区和漏极区除了从与沟道区平齐的方向施加应变之外,还能够从沟道区之上施加应变。
图9示出了升高的源极区900和升高的漏极区902。如上所述,通过向之前未被填充的第一和第二空腔区域700/708中淀积硅合金形成源极区和漏极区900/902。对于PMOS晶体管而言,源极区和漏极区900/902通常由SiGe材料构成。对于NOMS晶体管而言,源极区和漏极区900/902通常由SiC材料构成。如图所示,相对于沟道区712的顶表面906升高源极区和漏极区900/902的顶表面904。淀积完升高的源极区和漏极区,就基本形成了成品MOS晶体管908。如本领域的技术人员所认识到的,可以形成其他元件以使MOS晶体管908可以完全工作起来,例如形成通向源极和漏极区900/902的电触点。
本发明的源极区和漏极区900/902相对于常规源极区和漏极区提供若干优点。由于除去了部分BOX层502,因此源极区和漏极区900/902除了延伸到沟道区712之上以外还延伸到沟道区712下方。这使得本发明的源极区和漏极区900/902能够从沟道区712上方、平齐方向和下方施加应变,由此改善了总共施加的应变。并且因为源极区和漏极区900/902向下延伸到体硅衬底506,所以它们比常规源极区和漏极区相对较大。这使得本发明的源极区和漏极区900/902能够为电流提供更大空间,由此减小了MOS晶体管908的总电阻。
此外,如图9所示,本发明的源极区和漏极区900/902提供了靠近晶体管栅极叠层600边缘的浅深度,但仍然提供了与STI结构508相邻的大深度。靠近晶体管栅极叠层600边缘的浅深度防止在底割区域702/708的垂直边缘上形成耗尽层,由此减小了栅极边缘寄生结电容并改善了SCE。源极区900和漏极区902之间存在BOX区域800有助于减小栅极边缘结寄生电容,因为在BOX区域800上无法形成耗尽层。换言之,虽然底割很深,但在沟道区712的任一侧上都没有形成能有利于栅极边缘结寄生电容的长垂直壁。同时,与STI结构508相邻的大深度使自对准多晶硅化物尖峰缺陷的风险最小化。
因此,本领域的技术人员将认识到,提供靠近晶体管栅极叠层600的浅深度并提供与STI结构508相邻的大深度这样的能力提供了额外的自由度,以独立地优化源极/漏极串联电阻、电子/空穴迁移率和SCE,同时仍针对自对准多晶硅化物尖峰缺陷加以保护。这样就能够制造栅极长度相对较小的高性能MOS器件。一旦根据本发明的实施例形成了MOS晶体管908,之后就可以使用标准的CMOS流程了。
以上对本发明例示实施例的描述,包括在摘要中描述的内容,并不意在穷举或将本发明限制在所公开的精确形式。尽管为了例示的目的本文描述了本发明的特定实施例和范例,但是如本领域的技术人员将认识到的,在本发明的范围内,各种等效的变型都是可能的。
可以根据以上详细说明做出本发明的这些变型。不应将以下权利要求中所用的术语视为将本发明限制到说明书和权利要求中公开的特定实施例。相反,本发明的范围完全由以下权利要求确定,将依照权利要求法律解释的既定法条解释本发明的范围。
Claims (21)
1、一种设备,包括:
栅极叠层,其包括设置于栅极电介质上的栅电极;
形成于所述栅极叠层的横向相对侧上的第一间隔体和第二间隔体;
邻接所述第一间隔体的源极区;
邻接所述第二间隔体的漏极区;
在所述栅极叠层下方并且被所述源极区和所述漏极区夹持的沟道区;以及
在所述沟道区下方并且被所述源极区和所述漏极区夹持的掩埋氧化物区域。
2、根据权利要求1所述的设备,其中所述栅电极包括如下材料中的至少一种:铜、钌、钯、铂、钴、镍、氧化钌、钨、铝、钛、钽、氮化钛、氮化钽、铪、锆、金属碳化物和导电金属氧化物。
3、根据权利要求2所述的设备,其中所述栅极电介质包括从以下材料构成的组中选出的高k介电材料:氧化铪、氧化铪硅、氮氧化铪硅、氧化镧、氧化锆、氧化锆硅、氧化钽、氧化钛、氧化钡锶钛、BST、氧化钡钛、氧化锶钛、氧化钇、氧化铝、氧化铅钪钽、铌酸铅锌和PZT。
4、根据权利要求1所述的设备,其中所述源极区和所述漏极区包括升高的源极区和升高的漏极区。
5、根据权利要求1所述的设备,其中所述源极区和所述漏极区包括硅锗。
6、根据权利要求1所述的设备,其中所述源极区和所述漏极区包括碳化硅。
7、根据权利要求5或6所述的设备,其中所述源极区和所述漏极区掺有硼、铝、砷、磷和锑中的至少一种。
8、根据权利要求1所述的设备,其中所述源极区和所述漏极区包括能够在所述沟道区上赋予压缩应变的硅合金。
9、根据权利要求1所述的设备,其中所述源极区和所述漏极区包括能够在所述沟道区上赋予拉伸应变的硅合金。
10、根据权利要求1所述的设备,其中所述源极区包括位于所述第一间隔体下方并沿横向邻接所述栅极叠层侧面的第一底割区域,且其中所述漏极区包括位于所述第二间隔体下方并沿横向邻接所述栅极叠层侧面的第二底割区域。
11、根据权利要求1所述的设备,其中所述掩埋氧化物区域包括从以下材料构成的组中选择的氧化物:二氧化硅、掺碳氧化物、有机聚合物、PFCB、氮氧化物和FSG。
12、根据权利要求11所述的设备,其中所述掩埋氧化物区域可以掺有氮。
13、一种方法,包括:
提供SOI衬底,所述SOI衬底包括设置于第一硅层和第二硅层之间的氧化物层;
在所述第一硅层上形成晶体管栅极叠层;
在所述晶体管栅极叠层的横向相对侧上形成一对间隔体;
各向同性地蚀刻所述第一硅层与所述一对间隔体相邻的暴露部分,直到暴露出部分的所述氧化物层,其中所述各向同性蚀刻形成了所述晶体管栅极叠层下方的沟道区;
各向异性地蚀刻所述氧化物层的暴露部分,直到暴露部分的所述第二硅层,其中所述各向异性蚀刻形成了所述沟道区下方的掩埋氧化物区域;以及
在所述第二硅层的暴露部分上淀积硅合金以形成源极区和漏极区。
14、根据权利要求13所述的方法,其中所述各向同性蚀刻形成位于所述一对间隔体下方且在横向上邻接所述晶体管栅极叠层侧面的一对底割区域。
15、根据权利要求13所述的方法,其中所述氧化物层包括从以下材料构成的组中选择的氧化物:二氧化硅、掺碳氧化物、有机聚合物、PFCB、氮氧化物和FSG。
16、根据权利要求13所述的方法,其中所述源极区和所述漏极区被所述沟道区和所述掩埋氧化物区域隔开。
17、根据权利要求13所述的方法,其中淀积所述硅合金包括淀积硅锗。
18、根据权利要求17所述的方法,其中淀积硅锗包括现场掺杂工艺以用硼和铝中的至少一种对所述硅锗进行掺杂。
19、根据权利要求13所述的方法,其中淀积所述硅合金包括淀积碳化硅。
20、根据权利要求19所述的方法,其中淀积所述碳化硅包括现场掺杂工艺以用砷、磷和锑中的至少一种对所述碳化硅进行掺杂。
21、根据权利要求17或19所述的方法,其中淀积所述硅合金以形成升高的源极区和升高的漏极区。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/304,351 US7422950B2 (en) | 2005-12-14 | 2005-12-14 | Strained silicon MOS device with box layer between the source and drain regions |
US11/304,351 | 2005-12-14 | ||
PCT/US2006/047139 WO2007102870A2 (en) | 2005-12-14 | 2006-12-06 | Strained silicon mos device with box layer between the source and drain regions |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101292334A true CN101292334A (zh) | 2008-10-22 |
CN101292334B CN101292334B (zh) | 2012-04-25 |
Family
ID=38139923
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2006800390839A Expired - Fee Related CN101292334B (zh) | 2005-12-14 | 2006-12-06 | 源极区和漏极区之间具有box层的应变硅mos器件 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7422950B2 (zh) |
JP (1) | JP5122476B2 (zh) |
KR (1) | KR101124920B1 (zh) |
CN (1) | CN101292334B (zh) |
DE (1) | DE112006003402B4 (zh) |
TW (1) | TWI327777B (zh) |
WO (1) | WO2007102870A2 (zh) |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011134301A1 (zh) * | 2010-04-27 | 2011-11-03 | 中国科学院微电子研究所 | 半导体器件及其制造方法 |
CN102412204A (zh) * | 2011-11-30 | 2012-04-11 | 上海华力微电子有限公司 | 单晶体管dram及其制备方法 |
CN102543882A (zh) * | 2011-11-08 | 2012-07-04 | 上海华力微电子有限公司 | 形成绝缘体上碳硅-锗硅异质结1t-dram结构的方法及形成结构 |
CN102637687A (zh) * | 2011-10-17 | 2012-08-15 | 上海华力微电子有限公司 | 基于埋层n型阱的异质结1t-dram结构及其制备方法 |
WO2013000268A1 (zh) * | 2011-06-20 | 2013-01-03 | 中国科学院微电子研究所 | 一种半导体结构及其制造方法 |
CN102931092A (zh) * | 2012-10-26 | 2013-02-13 | 哈尔滨工程大学 | 一种自对准soi fd mosfet形成方法 |
CN103227205A (zh) * | 2013-05-17 | 2013-07-31 | 电子科技大学 | 具有深槽结构的图形化应变pmos器件及其制作方法 |
CN103681499A (zh) * | 2012-09-12 | 2014-03-26 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
CN103779219A (zh) * | 2012-10-22 | 2014-05-07 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件及半导体器件的制造方法 |
CN106449650A (zh) * | 2015-08-10 | 2017-02-22 | 瑞萨电子株式会社 | 半导体装置及其制造方法 |
CN110620142A (zh) * | 2013-11-20 | 2019-12-27 | 台湾积体电路制造股份有限公司 | 源极和漏极上具有不同硅化物的纳米线mosfet |
CN112542456A (zh) * | 2019-09-23 | 2021-03-23 | 格芯(美国)集成电路科技有限公司 | 具有独立调谐的阈值电压的场效应晶体管 |
CN112765922A (zh) * | 2020-12-31 | 2021-05-07 | 中国科学院上海微***与信息技术研究所 | 采用soi衬底的射频晶体管的仿真模型 |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7465972B2 (en) * | 2005-01-21 | 2008-12-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | High performance CMOS device design |
US7422950B2 (en) | 2005-12-14 | 2008-09-09 | Intel Corporation | Strained silicon MOS device with box layer between the source and drain regions |
US7323392B2 (en) * | 2006-03-28 | 2008-01-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | High performance transistor with a highly stressed channel |
US7422960B2 (en) | 2006-05-17 | 2008-09-09 | Micron Technology, Inc. | Method of forming gate arrays on a partial SOI substrate |
KR100725376B1 (ko) * | 2006-07-31 | 2007-06-07 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
DE102008049733B3 (de) * | 2008-09-30 | 2010-06-17 | Advanced Micro Devices, Inc., Sunnyvale | Transistor mit eingebettetem Si/Ge-Material mit geringerem Abstand zum Kanalgebiet und Verfahren zur Herstellung des Transistors |
US8384145B2 (en) * | 2009-02-03 | 2013-02-26 | International Business Machines Corporation | Non-volatile memory device using hot-carrier injection |
US8242559B2 (en) * | 2009-04-13 | 2012-08-14 | Globalfoundries Singapore Pte. Ltd. | Integrated circuit system with a floating dielectric region and method of manufacture thereof |
US20100279479A1 (en) * | 2009-05-01 | 2010-11-04 | Varian Semiconductor Equipment Associates, Inc. | Formation Of Raised Source/Drain On A Strained Thin Film Implanted With Cold And/Or Molecular Carbon |
US8106456B2 (en) * | 2009-07-29 | 2012-01-31 | International Business Machines Corporation | SOI transistors having an embedded extension region to improve extension resistance and channel strain characteristics |
US8283217B2 (en) * | 2010-03-04 | 2012-10-09 | International Business Machines Corporation | Prevention of oxygen absorption into high-K gate dielectric of silicon-on-insulator based finFET devices |
US8389300B2 (en) * | 2010-04-02 | 2013-03-05 | Centre National De La Recherche Scientifique | Controlling ferroelectricity in dielectric films by process induced uniaxial strain |
US8716798B2 (en) | 2010-05-13 | 2014-05-06 | International Business Machines Corporation | Methodology for fabricating isotropically recessed source and drain regions of CMOS transistors |
US8431995B2 (en) * | 2010-05-13 | 2013-04-30 | International Business Machines Corporation | Methodology for fabricating isotropically recessed drain regions of CMOS transistors |
CN102856197A (zh) * | 2011-06-27 | 2013-01-02 | 中国科学院微电子研究所 | 一种半导体结构及其制造方法 |
KR101865754B1 (ko) * | 2011-07-01 | 2018-06-12 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
FR3025941A1 (fr) * | 2014-09-17 | 2016-03-18 | Commissariat Energie Atomique | Transistor mos a resistance et capacites parasites reduites |
FR3040538A1 (fr) * | 2015-08-24 | 2017-03-03 | St Microelectronics Crolles 2 Sas | Transistor mos et son procede de fabrication |
US9893060B2 (en) * | 2015-12-17 | 2018-02-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and manufacturing method thereof |
US9853127B1 (en) | 2016-06-22 | 2017-12-26 | International Business Machines Corporation | Silicidation of bottom source/drain sheet using pinch-off sacrificial spacer process |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100246602B1 (ko) * | 1997-07-31 | 2000-03-15 | 정선종 | 모스트랜지스터및그제조방법 |
US6495402B1 (en) * | 2001-02-06 | 2002-12-17 | Advanced Micro Devices, Inc. | Semiconductor-on-insulator (SOI) device having source/drain silicon-germanium regions and method of manufacture |
US6515335B1 (en) * | 2002-01-04 | 2003-02-04 | International Business Machines Corporation | Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same |
JP4446690B2 (ja) * | 2003-06-27 | 2010-04-07 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
US7132338B2 (en) * | 2003-10-10 | 2006-11-07 | Applied Materials, Inc. | Methods to fabricate MOSFET devices using selective deposition process |
US7303949B2 (en) * | 2003-10-20 | 2007-12-04 | International Business Machines Corporation | High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture |
US7195963B2 (en) * | 2004-05-21 | 2007-03-27 | Freescale Semiconductor, Inc. | Method for making a semiconductor structure using silicon germanium |
US7306997B2 (en) * | 2004-11-10 | 2007-12-11 | Advanced Micro Devices, Inc. | Strained fully depleted silicon on insulator semiconductor device and manufacturing method therefor |
US7091071B2 (en) * | 2005-01-03 | 2006-08-15 | Freescale Semiconductor, Inc. | Semiconductor fabrication process including recessed source/drain regions in an SOI wafer |
US7518196B2 (en) * | 2005-02-23 | 2009-04-14 | Intel Corporation | Field effect transistor with narrow bandgap source and drain regions and method of fabrication |
WO2007034553A1 (ja) * | 2005-09-22 | 2007-03-29 | Fujitsu Limited | 半導体装置およびその製造方法 |
DE102005052055B3 (de) * | 2005-10-31 | 2007-04-26 | Advanced Micro Devices, Inc., Sunnyvale | Eingebettete Verformungsschicht in dünnen SOI-Transistoren und Verfahren zur Herstellung desselben |
US7422950B2 (en) | 2005-12-14 | 2008-09-09 | Intel Corporation | Strained silicon MOS device with box layer between the source and drain regions |
-
2005
- 2005-12-14 US US11/304,351 patent/US7422950B2/en active Active
-
2006
- 2006-12-06 KR KR1020087014260A patent/KR101124920B1/ko not_active IP Right Cessation
- 2006-12-06 JP JP2008545707A patent/JP5122476B2/ja not_active Expired - Fee Related
- 2006-12-06 DE DE112006003402T patent/DE112006003402B4/de not_active Expired - Fee Related
- 2006-12-06 CN CN2006800390839A patent/CN101292334B/zh not_active Expired - Fee Related
- 2006-12-06 WO PCT/US2006/047139 patent/WO2007102870A2/en active Application Filing
- 2006-12-08 TW TW095146039A patent/TWI327777B/zh not_active IP Right Cessation
Cited By (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011134301A1 (zh) * | 2010-04-27 | 2011-11-03 | 中国科学院微电子研究所 | 半导体器件及其制造方法 |
US8466500B2 (en) | 2010-04-27 | 2013-06-18 | Institute of Microelectronics, Chinese Academy of Sciences | Semiconductor device and method for manufacturing the same |
WO2013000268A1 (zh) * | 2011-06-20 | 2013-01-03 | 中国科学院微电子研究所 | 一种半导体结构及其制造方法 |
CN102637687A (zh) * | 2011-10-17 | 2012-08-15 | 上海华力微电子有限公司 | 基于埋层n型阱的异质结1t-dram结构及其制备方法 |
CN102543882A (zh) * | 2011-11-08 | 2012-07-04 | 上海华力微电子有限公司 | 形成绝缘体上碳硅-锗硅异质结1t-dram结构的方法及形成结构 |
CN102543882B (zh) * | 2011-11-08 | 2015-01-21 | 上海华力微电子有限公司 | 形成绝缘体上碳硅-锗硅异质结1t--dram结构的方法及形成结构 |
CN102412204A (zh) * | 2011-11-30 | 2012-04-11 | 上海华力微电子有限公司 | 单晶体管dram及其制备方法 |
CN103681499A (zh) * | 2012-09-12 | 2014-03-26 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
CN103681499B (zh) * | 2012-09-12 | 2017-08-01 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
CN103779219A (zh) * | 2012-10-22 | 2014-05-07 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件及半导体器件的制造方法 |
CN102931092A (zh) * | 2012-10-26 | 2013-02-13 | 哈尔滨工程大学 | 一种自对准soi fd mosfet形成方法 |
CN103227205A (zh) * | 2013-05-17 | 2013-07-31 | 电子科技大学 | 具有深槽结构的图形化应变pmos器件及其制作方法 |
CN110620142A (zh) * | 2013-11-20 | 2019-12-27 | 台湾积体电路制造股份有限公司 | 源极和漏极上具有不同硅化物的纳米线mosfet |
CN110620142B (zh) * | 2013-11-20 | 2022-11-04 | 台湾积体电路制造股份有限公司 | 源极和漏极上具有不同硅化物的纳米线mosfet |
CN106449650A (zh) * | 2015-08-10 | 2017-02-22 | 瑞萨电子株式会社 | 半导体装置及其制造方法 |
CN112542456A (zh) * | 2019-09-23 | 2021-03-23 | 格芯(美国)集成电路科技有限公司 | 具有独立调谐的阈值电压的场效应晶体管 |
CN112765922A (zh) * | 2020-12-31 | 2021-05-07 | 中国科学院上海微***与信息技术研究所 | 采用soi衬底的射频晶体管的仿真模型 |
CN112765922B (zh) * | 2020-12-31 | 2024-04-19 | 中国科学院上海微***与信息技术研究所 | 采用soi衬底的射频晶体管的仿真模型 |
Also Published As
Publication number | Publication date |
---|---|
CN101292334B (zh) | 2012-04-25 |
JP5122476B2 (ja) | 2013-01-16 |
DE112006003402B4 (de) | 2010-01-28 |
KR20080069683A (ko) | 2008-07-28 |
US20070134859A1 (en) | 2007-06-14 |
WO2007102870A3 (en) | 2007-12-06 |
KR101124920B1 (ko) | 2012-03-27 |
JP2009519610A (ja) | 2009-05-14 |
DE112006003402T5 (de) | 2008-10-23 |
WO2007102870A2 (en) | 2007-09-13 |
TWI327777B (en) | 2010-07-21 |
US7422950B2 (en) | 2008-09-09 |
TW200742073A (en) | 2007-11-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101292334B (zh) | 源极区和漏极区之间具有box层的应变硅mos器件 | |
US9373695B2 (en) | Method for improving selectivity of epi process | |
US6548361B1 (en) | SOI MOSFET and method of fabrication | |
US7701010B2 (en) | Method of fabricating transistor including buried insulating layer and transistor fabricated using the same | |
US9293376B2 (en) | Apparatus and method for power MOS transistor | |
EP1668706B1 (en) | Method for metal replacement gate of high performance device | |
US8828832B2 (en) | Strained structure of semiconductor device | |
US6268621B1 (en) | Vertical channel field effect transistor | |
US7253484B2 (en) | Low-power multiple-channel fully depleted quantum well CMOSFETs | |
US8084305B2 (en) | Isolation spacer for thin SOI devices | |
US20070228473A1 (en) | ULTRA-THIN Si MOSFET DEVICE STRUCTURE AND METHOD OF MANUFACTURE | |
US20080230844A1 (en) | Semiconductor Device with Multiple Silicide Regions | |
KR20020046208A (ko) | 반도체 장치 및 그 제조 방법 | |
CN107068566A (zh) | 具有金属栅电极的肖特基二极管及其形成方法 | |
US11282705B2 (en) | Semiconductor device and method of forming the same | |
US20090152670A1 (en) | Semiconductor device and method of fabricating the same | |
CN103094217B (zh) | 晶体管制作方法 | |
US20230119077A1 (en) | Semiconductor devices and methods of manufacturing thereof | |
US20070034953A1 (en) | Semiconductor device and method of fabricating same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120425 Termination date: 20211206 |