CN101226902B - Pixel structure of liquid crystal display panel and manufacturing method thereof - Google Patents
Pixel structure of liquid crystal display panel and manufacturing method thereof Download PDFInfo
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Abstract
The invention relates to a pixel structure of a liquid crystal display panel and a manufacturing method. The pixel structure comprises a scanning line, a data line, a thin film transistor, a pixel electrode, an anti-dazzle pattern and a common lead wire, wherein the data line at least includes a first data line segment and a second data line segment, the first data line segment and the second data line segment are respectively composed by a first material layer and a second material layer, and are electrically connected with each other via a plurality of connecting bullet pullers, the pixel electrode is electrically connected with a drain of the thin film transistor, the anti-dazzle pattern is located below the first data line segment and is suspension joint metal. The common lead wire, the anti-dazzle pattern and the second data line segment are composed of the same material layer.
Description
Technical field
The invention relates to a kind of liquid crystal display panel pixel structure and manufacture method thereof, refer to a kind of liquid crystal display panel pixel structure and manufacture method thereof that reduces crosstalk effect especially.
Background technology
In the manufacturing of LCD, the size of pixel aperture ratio directly has influence on the utilance of backlight, also has influence on the display brightness of panel.Influencing the principal element of aperture opening ratio size, promptly is the distance between transparent pixels electrode and the data wire, if desire is pursued bigger aperture opening ratio, must increase the pixel electrode area and shorten distance between transparent pixels electrode and the data wire when layout.Yet, when transparent pixels electrode and data wire too near the time, stray capacitance (the Cpd that it is suffered, capacitance between pixel anddata line) can become big, cause filling on the pixel electrode (pixel electrode) full electric charge before next picture (frame) conversion, can transmit different voltages because of data wire, and produce crosstalk effect (cross talk).In addition, the distance between common electrode and the data wire too near the time, its suffered stray capacitance can become greatly, and also can produce crosstalk effect.
For reducing the effect of stray capacitance, existing many modes are studied, and for example increase the size of storage capacitors, and it can reduce the ratio that stray capacitance accounts for influences all electric capacity of a sub-pixel unit (sub-pixel); In addition, when consistent electric field shielding is arranged between pixel electrode and data wire, can reduce the parasitic capacitance (parasitic capacitance) of data wire to pixel electrode; In addition, OIS (Optical Imaging Systems) also proposes, utilize exposure moulding (photo-imaged) and rotary coating (SOG, spin on glass) organic low dielectric constant dielectric film (the organic insulator film that is coated with of mode, K=2.7～3.5), can reduce the capacity effect between data wire and pixel electrode, pixel electrode can be overlapped onto on the data wire.
Yet aforesaid way can cause some for the harmful effect on display effect or the manufacturing process, and remains further to be improved.For instance, if increase storage capacitors, can influence pixel aperture ratio in the mode that increases area.The organic low dielectric constant dielectric film itself has moisture absorption (water adsorption), yellow (yellowed) and the not good problem of interface tack (interface adhesion), and then influences the manufacturing process yield (yield) and the speed of response (throughput).
Summary of the invention
One of purpose of the present invention is to propose a kind of liquid crystal display panel pixel structure, to reduce crosstalk effect.
For reaching above-mentioned purpose, the invention provides a kind of method of making dot structure, comprising:
One substrate is provided;
Form a ground floor conductive pattern on this substrate, wherein this ground floor conductive pattern comprises one scan line, a grid, and one first data line segment, and wherein this grid is electrically connected at this scan line;
Form an insulating barrier on this ground floor conductive pattern, wherein this insulating barrier have at least a plurality of first the contact holes lay respectively on this first data line segment;
Forming a second layer conductive pattern also inserts on this insulating barrier in those first contact holes simultaneously to form a plurality of first attachment plugs, wherein this second layer conductive pattern comprises one second data line segment, one source pole, a drain electrode, an and light-shielding pattern, wherein this second data line segment is electrically connected at this source electrode and sees through those first attachment plugs and is electrically connected at this first data line segment, and this light-shielding pattern is a suspension joint metal, and overlaps with this first data line segment;
Form a dielectric layer on this second layer conductive pattern; And
Form a pixel electrode on this dielectric layer, wherein this pixel electrode is electrically connected at this drain electrode.
For reaching above-mentioned purpose, the present invention also provides a kind of dot structure, comprising:
One substrate;
One ground floor conductive pattern is arranged on this substrate, and this ground floor conductive pattern comprises that one scan line, a grid are connected in this scan line, and one first data line segment;
One insulating barrier is arranged on this ground floor conductive pattern, and this insulating barrier has a plurality of first contact holes;
One second layer conductive pattern, be arranged on this insulating barrier, this second layer conductive pattern comprises that one second data line segment, one source pole are connected in this second data line segment, a drain electrode, a common line, an and light-shielding pattern, wherein this light-shielding pattern is a suspension joint metal, and overlaps with this first data line segment;
A plurality of first attachment plugs be arranged within a plurality of first contact holes, and this second data line segment electrically connect by those first attachment plugs and this first data line segment;
One pixel electrode is electrically connected at this drain electrode; And
At least one dielectric layer is arranged between this second layer conductive pattern and this pixel electrode.
The present invention also provides a kind of display panels, and described display panels comprises:
One first substrate comprises aforesaid dot structure;
One second substrate is positioned on described first substrate, and wherein said second substrate comprises the position top of a shading matrix pattern corresponding to described source electrode and described drain electrode, and a colored light-filtering units is corresponding to the top, position of described light-shielding pattern; And
One liquid crystal layer is between described first substrate and described second substrate.
For reaching above-mentioned purpose, the present invention proposes a kind of dot structure in addition, comprising:
The one scan line;
One data wire, be staggered with this scan line, at least comprise the first data line segment and the second data line segment, wherein this first data line segment and this second data line segment are made up of one first material layer and one second material layer respectively, and electrically connect by a plurality of attachment plugs;
One thin-film transistor electrically is connected with this scan line and this second data line segment;
One pixel electrode is with a drain electrode electric connection of this thin-film transistor;
One light-shielding pattern be positioned at the top of this first data line segment, and this light-shielding pattern is a suspension joint metal; And
One common line, between this light-shielding pattern and this thin-film transistor and be parallel to this scan line, wherein this common line, this light-shielding pattern and this second data line segment are made up of the same material layer.
The present invention also provides a kind of display panels, and described display panels comprises:
One first substrate comprises aforesaid dot structure;
One second substrate is positioned on described first substrate, and wherein said second substrate comprises the position top of a shading matrix pattern corresponding to described thin-film transistor, and a colored light-filtering units is corresponding to the top, position of described light-shielding pattern; And
One liquid crystal layer is between described first substrate and described second substrate.
Liquid crystal display panel pixel structure of the present invention utilizes the ground floor conductive pattern as the first data line segment, and the distance between the first data line segment and the pixel electrode is relatively large, therefore can effectively reduce parasitic capacitance between the pixel electrode and the first data line segment and the crosstalk effect that is produced thereof.In addition, second layer conductive pattern is provided with light-shielding pattern in the position of the corresponding first data line segment, and one of effect of light-shielding pattern is to cover the light leak of the first data line segment periphery.In addition by adjusting the length and the size of light-shielding pattern, overlapping area between the may command light-shielding pattern and the first data line segment, and be not the ratio of the area of the first overlapping data line segment of light-shielding pattern, and then make parasitic capacitance between the common line and the first data line segment, and first parasitic capacitance between data line segment and the pixel electrode reach balance, to improve display effect.
Description of drawings
Fig. 1 to Fig. 3 is the schematic perspective view of the dot structure of present embodiment.
Fig. 4 is the generalized section along the tangent line AA ' of Fig. 3.
Fig. 5 is the generalized section along the tangent line BB ' of Fig. 3.
Fig. 6 is the schematic layout pattern of ground floor conductive pattern.
Fig. 7 is the schematic layout pattern of second layer conductive pattern.
Fig. 8 is the schematic layout pattern of pixel electrode and shading matrix pattern.
Fig. 9 is the schematic perspective view of the dot structure of another embodiment of the present invention.
Figure 10 is the generalized section of the dot structure of Fig. 9 along tangent line CC '.
Drawing reference numeral:
30 dot structures, 32 substrates
34 insulating barrier 34a, the first contact hole
The 34b first attachment plug 34c second contact hole
34d second attachment plug 35 semiconductor layers
36 dielectric layer 36a the 3rd contact hole
37 ohmic contact layers, 40 ground floor conductive patterns
42 scan lines, 44 grids
46 first data line segments, 48 electrode patterns
50 second layer conductive patterns, 52 second data line segments
56 drain electrodes of 54 source electrodes
58 light-shielding patterns, 59 common lines
60 pixel electrodes, 70 substrates
72 shading matrix patterns, 74 colored light-filtering units
Embodiment
Please refer to Fig. 1 to Fig. 8.Fig. 1 to Fig. 8 is the schematic diagram of the liquid crystal display panel pixel structure of a preferred embodiment of the present invention.The display panels of present embodiment includes a plurality of dot structures, and only shows single dot structure for ease of explanation in the icon.Fig. 1 to Fig. 3 illustrate schematic diagram in three-dimensional mode, and for knowing display pixel structure, Fig. 1 to Fig. 3 does not show upper substrate and liquid crystal layer for the method schematic diagram of the dot structure of making present embodiment.In addition, Fig. 4 is the generalized section along the tangent line AA ' of Fig. 3, and Fig. 5 is the generalized section along the tangent line BB ' of Fig. 3.In addition, Fig. 6 is that schematic layout pattern, Fig. 7 of ground floor conductive pattern are the schematic layout pattern of pixel electrode and shading matrix pattern for schematic layout pattern, Fig. 8 of second layer conductive pattern.
As shown in Figure 1, one substrate (infrabasal plate or first substrate) 32 at first is provided, and on substrate 32, form a ground floor conductive pattern 40, wherein substrate 32 is a transparency carrier, for example glass substrate or quartz base plate, and ground floor conductive pattern 40 is made of first material layer, and it is the good material of conductivity, for example metal.The layout (1ayout) of ground floor conductive pattern 40 in single pixel is as shown in Figure 6, it comprises one scan line 42, a grid 44, one first data line segment 46, an and electrode pattern 48, wherein grid 44 is electrically connected on the scan line 42, and grid 44, the first data line segment 46 and electrode pattern 48 electrically connect each other.In addition, the first data line segment 46 includes three larger-size wide blocks, the wide block that wherein is positioned at two ends is in order to be provided with the contact hole, because the bigger bigger bit errors of size tolerable of wide block is positioned at the first data line segment, 46 middle wide blocks and then has shaded effect.
As Fig. 2, Fig. 4 and shown in Figure 5, then on ground floor conductive pattern 40, form an insulating barrier 34, and in insulating barrier 34, form two first contact hole 34a, correspond respectively to the position of the wide block at the first data line segment, 46 two ends, and one second contact hole 34c is corresponding to electrode pattern 48.Then form semi-conductor layer 35 in the surface of the insulating barrier 34 of grid 44 tops again, wherein the area of semiconductor layer 35 to be to be enough to cover gate 44, and as the usefulness of channel region, and corresponding herein insulating barrier 34 is a gate insulator.On semiconductor layer 35, form an ohmic contact layer 37 subsequently, on ohmic contact layer 37 and insulating barrier 34, form a second layer conductive pattern 50 again.The layout of second layer conductive pattern 50 in single pixel is as shown in Figure 7, it comprises that one second data line segment 52, one source pole 54 are connected in the second data line segment 52, a drain electrode 56, one light-shielding pattern 58, an and common line 59, wherein second layer conductive pattern 50 is made of second material layer, it is the good material of conductivity, metal for example, and the configuration of the relevant position of each pattern of second layer conductive pattern 50 sees also shown in Figure 2.In the step that forms second layer conductive pattern 50, second layer conductive pattern 50 is inserted the first contact hole 34a to form the first attachment plug 34b, and insert the second contact hole 34c to form the second attachment plug 34d, wherein near the first attachment plug 34b of grid 44 be used to connect source electrode 54 and the first data line segment 46 electrically, another first attachment plug 34b then connects the second data line segment 52 electrical of the first data line segment 46 and neighbor.In addition, the second attachment plug 34d is used to connect the electrical of drain electrode 56 and electrode pattern 48.In addition, semiconductor layer 35 joins through ohmic contact layer 37 with drain electrode 56 with the source electrode 54 of second layer conductive pattern 50, and grid 44, semiconductor layer 35, source electrode 54 and drain electrode 56 etc. constitute thin-film transistor by this.
As shown in Figure 3, then on second layer conductive pattern 50, form at least one dielectric layer 36 and cover, and in dielectric layer 36, form at least one the 3rd contact hole 36a.The position of the 3rd contact hole 36a is positioned at the top of electrode pattern 48 and adjacent with the drain electrode 56 and the common line 59 of second conductive pattern 50, wherein common line 59 then has a rescinded angle corresponding to the position of the 3rd contact hole 36a, and the position of corresponding the 3rd contact hole 36a of insulating barrier 34 also has an opening, and the electrode pattern 48 of corresponding by this 3rd contact 36a position, hole can be exposed to the open air.Be formed with a pixel electrode 60 subsequently again in the surface of dielectric layer 36, and pixel electrode 60 is inserted in the 3rd contact hole 36a and with electrode pattern 48 electrically connect, and unlikely and common line 59 short circuits, and because electrode pattern 48 can electrically connect with drain electrode 56 via the second attachment plug 34d, so pixel electrode 60 is able to and drains 56 electrically connect.Dielectric layer 36 also is called protective layer; it is made of the insulation material and viewable design is thought of as a single layer structure dielectric layer or multi-layer compound structure dielectric layer; visual its thickness of the material of dielectric layer 36; the consideration of fabrication process condition or material dielectric constant and be inorganic such as silica or silicon nitride; or be organic material such as epoxy resin; or the multi-layer compound structure that uses inorganic to form; the multi-layer compound structure that organic material is formed; or the multi-layer compound structure of inorganic and organic material composition; and pixel electrode 60 constitutes for the electrically conducting transparent material, for example tin indium oxide.
As Fig. 4, Fig. 5 and shown in Figure 8, another substrate (upper substrate or second substrate) 70 is provided, it comprises that a shading matrix pattern 72 (black matrix pattern) is with a colored light-filtering units 74, combine substrate 32 with substrate 70, and therebetween form a liquid crystal layer 80, to form the liquid crystal display panel pixel structure 30 of present embodiment.What deserves to be explained is that substrate 32 comprises alignment film in addition, and substrate 70 comprises the necessary assembly of display panels such as common electrode and alignment film in addition, by this area tool knows that usually the knowledgeable is known, so do not add to give unnecessary details its effect and production method at this.
The pixel electrode 30 of present embodiment mainly comprises two storage capacitors, wherein common line 59, pixel electrode 60 and the dielectric layer 36 that is arranged at therebetween constitute first storage capacitors, electrode pattern 48, common line 59 then constitute second storage capacitors with the insulating barrier 34 that is arranged at therebetween on the other hand, wherein first storage capacitors is a MII (metal-insulator-ITO) storage capacitors, and second storage capacitors is a MIM (metal-insulator-metal) storage capacitors.
Because the first data line segment, 46 tops are provided with light-shielding pattern 58, so the corresponding thin-film transistor in the position of shading matrix pattern 72, storage capacitors and switch module (as Fig. 4 and shown in Figure 8), and need not be arranged at the position of the corresponding first data line segment 46, therefore avoided shading matrix pattern 72 herein because of the inaccurate problem that produces light leak of contraposition, there is sub-fraction not covered as for the first data line segment 46 by light-shielding pattern 58, then can be by wide block shading.In addition, the position of colored light-filtering units 74 is the viewing area of respective pixel structure 30 then, comprises the top, position (as Fig. 5 and shown in Figure 8) corresponding to light-shielding pattern 58.
One of principal character of liquid crystal display panel pixel structure 30 of the present invention is that the first data line segment 46 is arranged at ground floor conductive pattern 40, but not be arranged at second layer conductive pattern 50, therefore the distance between the first data line segment 46 and the pixel electrode 60 is relatively large, add the shield effectiveness that the light-shielding pattern 58 of second layer conductive pattern 50 provides, therefore can effectively reduce parasitic capacitance between the pixel electrode 60 and the first data line segment 46 and the crosstalk effect that is produced thereof.In addition, second layer conductive pattern 50 is provided with light-shielding pattern 58 in the position of the corresponding first data line segment 46.One of effect of light-shielding pattern 58 is to cover the light leak of the first data line segment, 46 peripheries, and does not need in herein the shading matrix pattern is set, and can increase aperture opening ratio and the inaccurate light leak problem that is produced of the contraposition of avoiding the shading matrix pattern.In addition by adjusting the length and the size of light-shielding pattern 58, overlapping area between the may command light-shielding pattern 58 and the first data line segment 46, and be not the ratio of the area of the first overlapping data line segment 46 of light-shielding pattern 58, and then make parasitic capacitance between the common line 59 and the first data line segment 46, and first parasitic capacitance between data line segment 46 and the pixel electrode 60 reach balance, to improve display effect.
Please refer to Fig. 9 and Figure 10, and in the lump referring to figs. 1 to Fig. 2, Fig. 5 to Fig. 8.Fig. 9 and Figure 10 are the schematic diagram of the liquid crystal display panel pixel structure of another preferred embodiment of the present invention, wherein Fig. 9 is the schematic perspective view of the dot structure of another embodiment of the present invention, Figure 10 is the generalized section of the dot structure of Fig. 9 along tangent line CC ', and other schematic diagram of the dot structure of present embodiment and previous embodiment are as good as, please refer to the schematic diagram of last embodiment, and the identical part use same numeral of two embodiment marks and no longer adds to give unnecessary details.As described in Fig. 9 and Figure 10, present embodiment is different with previous embodiment be in, in the dot structure of present embodiment, the position of the 3rd contact hole 36a is positioned on the drain electrode 56, insert pixel electrode 60 direct and 56 electric connections that drain of the 3rd contact hole 36a by this, so pixel electrode 60 need not see through the electrode pattern 48 and 56 electric connections that drain.Because pixel electrode 60 can directly electrically connect with drain electrode 56, so common line 59 does not need as described above, and embodiment is provided with the setting that rescinded angle provides the 3rd contact hole 36a in addition.Need not be provided with under the situation of rescinded angle, common line 59 can inwardly contract near the border of viewing area and can make common line 59 keep identical overlapping area with electrode pattern 48 and pixel electrode 60, can remain unchanged by first storage capacitors (constituting) and the storage capacitors value that second storage capacitors (being made of with the insulating barrier 34 that is arranged at therebetween electrode pattern 48, common line 59) is provided thus, but can further promote the aperture opening ratio of dot structure by pixel electrode 60, common line 59 and dielectric layer 36 therebetween.
What deserves to be explained is in addition in the present embodiment, also the specification requirement of visual storage capacitors is different and electrode pattern 48 optionally is not set contacts hole 34c with second, and in other words the storage capacitors of the dot structure 30 of present embodiment is only provided by first storage capacitors under this situation.
In sum, in the design of liquid crystal display panel pixel structure of the present invention, data wire is made of ground floor conductive pattern and the cross-over connection of second layer conductive pattern, can reduce under this situation because the data wire that is produced as data wire and pixel electrode hypotelorism by second layer conductive pattern and the parasitic capacitance of pixel electrode.In addition, dot structure of the present invention utilizes the light-shielding pattern of second layer conductive pattern to cover data wire light leak on every side, though produce parasitic capacitance between light-shielding pattern meeting and the data wire, but light-shielding pattern is the parasitic capacitance between maskable pixel electrode and the data wire also, therefore the present invention is by adjusting the length of light-shielding pattern, can average out between the two in the parasitic capacitance between the parasitic capacitance between pixel electrode and data wire and light-shielding pattern and data wire, so that the display effect of display panels reaches optimization.
The above only is preferred embodiment of the present invention, and all equalizations of being done according to claim scope of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (29)
1. method of making dot structure, described method comprises:
One substrate is provided;
Form a ground floor conductive pattern on described substrate, wherein said ground floor conductive pattern comprises one scan line, a grid, and one first data line segment, and wherein said grid is electrically connected at described scan line;
Form an insulating barrier on described ground floor conductive pattern, wherein said insulating barrier has a plurality of first contact holes at least and lays respectively on the described first data line segment;
Forming a second layer conductive pattern also inserts on described insulating barrier in described a plurality of first contact hole simultaneously to form a plurality of first attachment plugs, wherein said second layer conductive pattern comprises one second data line segment, one source pole, a drain electrode, an and light-shielding pattern, the wherein said second data line segment is electrically connected at described source electrode and sees through described a plurality of first attachment plugs and is electrically connected at the described first data line segment, and described light-shielding pattern is a suspension joint metal, and overlaps with the described first data line segment;
Form a dielectric layer on described second layer conductive pattern; And
Form a pixel electrode on described dielectric layer, wherein said pixel electrode is electrically connected at described drain electrode.
2. the method for claim 1, described method are included in addition when forming described second layer conductive pattern and form a common line, and make described common line and described light-shielding pattern have a distance.
3. method as claimed in claim 2, wherein said common line, described pixel electrode and the described dielectric layer that is arranged at therebetween form one first storage capacitors.
4. the method for claim 1, wherein said ground floor conductive pattern comprises an electrode pattern in addition, is electrically connected at described drain electrode.
5. method as claimed in claim 4, wherein said electrode pattern, described common line and the described insulating barrier that is arranged at therebetween form one second storage capacitors.
6. method as claimed in claim 4, wherein said insulating barrier comprises one second contact hole in addition, between described drain electrode and described electrode pattern, and the step that forms described second layer conductive pattern comprises in addition inserts formation one second attachment plug in the described second contact hole with described drain electrode, connects described electrode pattern and described drain electrode with electrode.
7. method as claimed in claim 6, wherein said dielectric layer comprises one the 3rd contact hole in addition, corresponding to described electrode pattern, and the step that forms described pixel electrode comprises in addition described pixel electrode inserted in described the 3rd contact hole and with described electrode pattern and electrically connects, described by this pixel electrode see through described electrode pattern with described second attachment plug and with described drain electrode electric connection.
8. the method for claim 1, wherein said dielectric layer comprises one the 3rd contact hole in addition, on described drain electrode, and the step that forms described pixel electrode comprises in addition and inserts described pixel electrode in described the 3rd contact hole and electrically connect with described drain electrode by this.
9. the method for claim 1, the wherein said first data line segment has a plurality of wide blocks at least, and the described a plurality of first contact holes of tool lay respectively on described a plurality of wide block.
10. a dot structure is characterized in that, described dot structure comprises:
One substrate;
One ground floor conductive pattern is arranged on the described substrate, and described ground floor conductive pattern comprises that one scan line, a grid are connected in described scan line, and one first data line segment;
One insulating barrier is arranged on the described ground floor conductive pattern, and described insulating barrier has a plurality of first contact holes;
One second layer conductive pattern, be arranged on the described insulating barrier, described second layer conductive pattern comprises that one second data line segment, one source pole are connected in the described second data line segment, a drain electrode, a common line, an and light-shielding pattern, wherein said light-shielding pattern is a suspension joint metal, and overlaps with the described first data line segment;
A plurality of first attachment plugs be arranged within a plurality of first contact holes, and the described second data line segment electrically connect by a plurality of first attachment plugs and the described first data line segment;
One pixel electrode is electrically connected at described drain electrode; And
At least one dielectric layer is arranged between described second layer conductive pattern and the described pixel electrode.
11. dot structure as claimed in claim 10 is characterized in that, described common line and described light-shielding pattern have a distance.
12. dot structure as claimed in claim 10 is characterized in that, described common line, described pixel electrode and the described dielectric layer that is arranged at therebetween constitute one first storage capacitors.
13. dot structure as claimed in claim 10 is characterized in that, described ground floor conductive pattern comprises an electrode pattern in addition, is electrically connected at described drain electrode.
14. dot structure as claimed in claim 13 is characterized in that, described electrode pattern, described common line and the described insulating barrier that is arranged at therebetween constitute one second storage capacitors.
15. dot structure as claimed in claim 13, it is characterized in that, described insulating barrier comprises one second contact hole in addition, be arranged between described drain electrode and the described electrode pattern, and one second attachment plug be arranged within the described second contact hole, and described electrode pattern is electrically connected at described drain electrode by described second attachment plug.
16. dot structure as claimed in claim 15, it is characterized in that, described dielectric layer comprises one the 3rd contact hole in addition, corresponding to described electrode pattern, and described pixel electrode is inserted described the 3rd contact hole and is electrically connected with described electrode pattern, described by this pixel electrode see through described electrode pattern with described second attachment plug and with described drain electrode electric connection.
17. dot structure as claimed in claim 10 is characterized in that, described dielectric layer comprises one the 3rd contact hole in addition, and corresponding to described drain electrode, and described pixel electrode is inserted described the 3rd contact hole and electrically connected with described drain electrode by this.
18. dot structure as claimed in claim 10 is characterized in that, described dielectric layer comprises a single layer structure dielectric layer or a multi-layer compound structure dielectric layer.
19. a dot structure is characterized in that, described dot structure comprises:
The one scan line;
One data wire, be staggered with described scan line, at least comprise the first data line segment and the second data line segment, wherein said first data line segment and the described second data line segment are made up of one first material layer and one second material layer respectively, and electrically connect by a plurality of attachment plugs;
One thin-film transistor electrically is connected with described scan line and the described second data line segment;
One pixel electrode is with a drain electrode electric connection of described thin-film transistor;
One light-shielding pattern be positioned at the top of the described first data line segment, and described light-shielding pattern is a suspension joint metal; And
One common line, between described light-shielding pattern and described thin-film transistor and be parallel to described scan line, wherein said common line, described light-shielding pattern and the described second data line segment are made up of the same material layer.
20. dot structure as claimed in claim 19 is characterized in that, described common line and described light-shielding pattern have a distance.
21. dot structure as claimed in claim 19, it is characterized in that, described dot structure comprises that in addition a dielectric layer is arranged between described common line and the described pixel electrode, and described common line, described pixel electrode constitute one first storage capacitors with the described dielectric layer that is arranged at therebetween.
22. dot structure as claimed in claim 19 is characterized in that, described dot structure comprises that in addition an electrode pattern and the described first data line segment are made up of the same material layer, and described electrode pattern is electrically connected at described drain electrode.
23. dot structure as claimed in claim 22, it is characterized in that, described dot structure comprises that in addition an insulating barrier is arranged between described electrode pattern and the described common line, and described electrode pattern, described common line constitute one second storage capacitors with the described insulating barrier that is arranged at therebetween.
24. dot structure as claimed in claim 23, it is characterized in that, described insulating barrier comprises one second contact hole in addition, be arranged between described drain electrode and the described electrode pattern, and one second attachment plug be arranged within the described second contact hole, and described electrode pattern is electrically connected at described drain electrode by described second attachment plug.
25. dot structure as claimed in claim 24, it is characterized in that, described dielectric layer comprises one the 3rd contact hole in addition, corresponding to described electrode pattern, and described pixel electrode is inserted described the 3rd contact hole and is electrically connected with described electrode pattern, described by this pixel electrode see through described electrode pattern with described second attachment plug and with described drain electrode electric connection.
26. dot structure as claimed in claim 21 is characterized in that, described dielectric layer comprises one the 3rd contact hole in addition, and corresponding to described drain electrode, and described pixel electrode is inserted described the 3rd contact hole and electrically connected with described drain electrode by this.
27. dot structure as claimed in claim 21 is characterized in that, described dielectric layer comprises a single layer structure dielectric layer or a multi-layer compound structure dielectric layer.
28. a display panels is characterized in that, described display panels comprises:
One first substrate comprises dot structure as claimed in claim 19;
One second substrate is positioned on described first substrate, and wherein said second substrate comprises the position top of a shading matrix pattern corresponding to described thin-film transistor, and a colored light-filtering units is corresponding to the top, position of described light-shielding pattern; And
One liquid crystal layer is between described first substrate and described second substrate.
29. a display panels is characterized in that, described display panels comprises:
One first substrate comprises dot structure as claimed in claim 10;
One second substrate is positioned on described first substrate, and wherein said second substrate comprises the position top of a shading matrix pattern corresponding to described source electrode and described drain electrode, and a colored light-filtering units is corresponding to the top, position of described light-shielding pattern; And
One liquid crystal layer is between described first substrate and described second substrate.
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2008
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| US6157357A (en) * | 1997-09-23 | 2000-12-05 | Lg Philips Lcd Co., Ltd. | Liquid crystal panel with bypass capacitor thereon |
| US6700636B2 (en) * | 2000-12-13 | 2004-03-02 | Lg. Philips Lcd Co., Ltd. | Liquid crystal display panel and method for manufacturing the same |
| CN1560686A (en) * | 2004-02-24 | 2005-01-05 | 友达光电股份有限公司 | Liquid crystal display panel |
| CN1588213A (en) * | 2004-08-02 | 2005-03-02 | 友达光电股份有限公司 | Multiple zone vertical arrangement type liquid crystal display and its pixel electrode forming method |
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