CN101221961B - Pixel structure and its production method - Google Patents
Pixel structure and its production method Download PDFInfo
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- CN101221961B CN101221961B CN2008100045492A CN200810004549A CN101221961B CN 101221961 B CN101221961 B CN 101221961B CN 2008100045492 A CN2008100045492 A CN 2008100045492A CN 200810004549 A CN200810004549 A CN 200810004549A CN 101221961 B CN101221961 B CN 101221961B
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Abstract
The invention provides a pixel structure and the production method thereof. The pixel structure comprises a substrate, a shading pattern floatingly arranged on the substrate, an insulation layer arranged on the substrate and the shading pattern, a data line arranged above the shading pattern and corresponding to the shading pattern, a dielectric layer arranged on the data line and the insulation layer, and a third-layer conductive pattern arranged on the dielectric layer. The third-layer conductive pattern comprises a common wire and a common pattern, wherein, the common pattern has two branch lines, a gap exists between the two branch lines, and further more the gap is positioned above the data line. The pixel structure of the invention takes advantage of the shading pattern of a first-layer conductive pattern to shield the light leakage which is easy to be produced on both sides of the data line of a second-layer conductive pattern, and takes advantage of the common pattern of the third-layer conductive pattern to shield the pixel electrode and the data line to avoid the parasitic capacitance produced between the pixel electrode and the data line.
Description
Technical field
The present invention system refers to a kind of dot structure with superelevation aperture opening ratio and preparation method thereof especially about a kind of dot structure and preparation method thereof.
Background technology
In the manufacturing of LCD, the size of pixel aperture ratio directly has influence on the utilance of backlight, also has influence on the display brightness of panel.Influencing the principal element of aperture opening ratio size, promptly is the distance between transparent pixels electrode and the data wire, if desire is pursued bigger aperture opening ratio, must shorten the distance between transparent pixels electrode and the data wire when layout.Yet, when transparent pixels electrode and data wire too near the time, parasitic capacitance (the Cpd that it is suffered, capacitance between pixel and data line) can become big, cause filling on the pixel electrode (pixel electrode) full electric charge before next picture (frame) conversion, can transmit different voltages because of data wire, and produce crosstalk effect (cross talk).In addition, the distance between common electrode and the data wire too near the time, its suffered parasitic capacitance can become greatly, and also can produce crosstalk effect.
For reducing the effect of parasitic capacitance, existing many modes are studied, and for example increase the size of storage capacitors, and it can reduce the ratio that parasitic capacitance accounts for influences all electric capacity of a sub-pixel unit (sub-pixel), yet, can influence pixel aperture ratio if increase storage capacitors in the mode that increases area.
Summary of the invention
One of purpose of the present invention is to provide a kind of dot structure and preparation method thereof, to promote aperture opening ratio and to reduce parasitic capacitance.
For reaching above-mentioned purpose, the present invention at first proposes a kind of dot structure, and this dot structure comprises:
One substrate;
One ground floor conductive pattern is arranged on the substrate, and this ground floor conductive pattern comprises a grid, one scan line and a light-shielding pattern, and wherein grid is electrically connected to this scan line;
One insulating barrier is arranged on ground floor conductive pattern and the substrate;
One second layer conductive pattern is arranged on the insulating barrier, and this second layer conductive pattern comprises a data wire, one source pole and a drain electrode, and wherein the data wire top and the data wire that are arranged at light-shielding pattern is electrically connected to source electrode;
One dielectric layer is arranged on second layer conductive pattern and the insulating barrier; And
One the 3rd layer of conductive pattern is arranged on the dielectric layer, and the 3rd layer of conductive pattern comprises a common line and a common pattern, and common pattern has two branch lines, has a gap between two branch lines, and the gap is positioned at this data wire top.
The present invention provides a kind of method of making dot structure in addition, comprises the following steps:
One substrate is provided;
Form a ground floor conductive pattern on substrate, this ground floor conductive pattern comprises a grid, one scan line and a light-shielding pattern, and wherein grid is electrically connected to scan line;
On ground floor conductive pattern and substrate, form an insulating barrier;
Form a second layer conductive pattern on insulating barrier, second layer conductive pattern comprises a data wire, one source pole and a drain electrode, and wherein data wire is arranged at the top of light-shielding pattern, and data wire is electrically connected to source electrode;
On second layer conductive pattern and insulating barrier, form a dielectric layer; And
Form one the 3rd layer of conductive pattern on this dielectric layer, wherein the 3rd layer of conductive pattern comprises a common line and a common pattern, and common pattern has two branch lines, has a gap between two branch lines, and the gap is positioned at the data wire top.
The present invention also proposes another kind of dot structure, and this dot structure includes an active element district and a surrounding zone, comprising:
One ground floor conductive pattern is arranged on this substrate, and this ground floor conductive pattern comprises a grid and a light-shielding pattern, and wherein this grid is positioned at this active element district, and this light-shielding pattern is positioned at this surrounding zone;
One insulating barrier is arranged on this ground floor conductive pattern and this substrate;
One second layer conductive pattern, be arranged on this insulating barrier, this second layer conductive pattern comprises a data wire, one source pole and a drain electrode, wherein this data wire is arranged at the top of this light-shielding pattern of this surrounding zone, this source electrode and this drain electrode are arranged at this active element district, and the top of these grid both sides that are placed in and overlapping with this grid part;
One dielectric layer is arranged on this second layer conductive pattern and this insulating barrier, and exposes this drain electrode in this active element district; And
One the 3rd layer of conductive pattern is arranged on this dielectric layer of this surrounding zone, and the top of these data wire both sides that are placed in and overlapping with this light-shielding pattern.
Characteristics of the present invention and advantage are: the light leak that dot structure of the present invention utilizes data wire both sides that the light-shielding pattern of first conductive pattern covers second layer conductive pattern to be easy to generate, and utilize the common pattern of the 3rd layer of conductive pattern to shield pixel electrode and data wire, to avoid producing parasitic capacitance between pixel electrode and the data wire.In addition, common pattern itself has between two branch lines and two branch lines and has the gap, though therefore two branch lines have the effect that shields pixel electrode and data wire, can not produce excessive parasitic capacitance and can reduce crosstalk effect with data wire.The branch line of common pattern, pixel electrode and the therebetween protective layer storage capacitors that also can form makes dot structure not need to be provided with separately excessive storage capacitors in the viewing area in addition, makes dot structure of the present invention have the advantage of high aperture.
Description of drawings
Fig. 1 is the schematic diagram of the dot structure of preferred embodiment of the present invention.
Fig. 2 to Fig. 7 is the method schematic diagram of the making dot structure of preferred embodiment of the present invention.
Fig. 8 is the generalized section of the dot structure of another preferred embodiment of the present invention.
Fig. 9 is the generalized section of the dot structure of the another preferred embodiment of the present invention.
Figure 10 is the generalized section of the dot structure of the another preferred embodiment of the present invention.
[primary clustering symbol description]
10 substrates, 12 thin film transistor regions
14 surrounding zones, 20 scan lines
22 grids, 24 light-shielding patterns
30 insulating barriers, 32 semiconductor layers
34 heavily doped semiconductor layers, 40 data wires
44 drain electrodes of 42 source electrodes
50 dielectric layers, 60 common patterns
The branch line 61 common lines of the common pattern of 60a
62 gaps, 70 protective layers
80 pixel electrodes
Embodiment
For making the auditor and haveing the knack of this skill person and can further understand the present invention, hereinafter the spy enumerates preferred embodiment of the present invention, and conjunction with figs., element numbers etc., describes constitution content of the present invention and the effect desiring to reach in detail.
Present embodiment is that the dot structure with the amorphous silicon film transistor liquid crystal indicator is example explanation the present invention, but dot structure of the present invention uses and be not limited to this, and can be applicable on the dot structure of other pattern liquid crystal indicator, please refer to Fig. 1 to Fig. 7.Fig. 1 is the schematic diagram of the dot structure of a preferred embodiment of the present invention, Fig. 2 to Fig. 7 is the generalized section of the dot structure of construction drawing 1, wherein Fig. 1 shows the schematic top plan view of dot structure, the generalized section that Fig. 2 to Fig. 7 illustrates along the tangent line AA ' of Fig. 1 for dot structure.As shown in Figure 2, at first provide a substrate 10, substrate 10 is a transparency carrier, for example glass substrate, quartz base plate or plastic base.Definition has several dot structures on the substrate 10, and every single dot structure includes a thin film transistor region 12 and a surrounding zone 14.On substrate 10, form a conductive layer as then carrying out a deposition manufacture process, a metal level for example, and utilize little shadow and etching technique to define this conductive layer, to form a ground floor conductive pattern.The ground floor conductive pattern is metal material but also can be other conductive material that it comprises one scan line 20, a grid 22 and a light-shielding pattern 24.Scan line 20 can be one side that a straight line is positioned at dot structure, as shown in Figure 1.Grid 22 is arranged at thin film transistor region 12, and is electrically connected with scan line 20, and its electric connection mode please refer to shown in Figure 1.24 of light-shielding patterns are arranged at surrounding zone 14, and wherein light-shielding pattern 24 is (floating) metal of floating, and is not electrically connected with grid 22 with scan line 20, and it act as shield lights and prevents light leak.
As shown in Figure 3, on substrate 10 and ground floor conductive pattern, form an insulating barrier 30.Insulating barrier 30 is as gate insulator, and its material can be silica or other dielectric material that is fit to.On the insulating barrier 30 of thin film transistor region 12, form a semi-conductor layer 32 and a heavily doped semiconductor layer 34 more in addition.Semiconductor layer 32 is as passage, and its material can be silicon (for example amorphous silicon), and the source electrode that heavily doped semiconductor layer 34 then is used for improving follow-up formation and drain electrode contact with Ao Mushi between the semiconductor layer.
As shown in Figure 4, then deposition one conductive layer on insulating barrier 30, a metal level for example, and utilize little shadow and etching technique to define this conductive layer to form a second layer conductive pattern.Second layer conductive pattern is a metal material, but also can be other conductive material, and it comprises a data wire 40, one source pole 42 and a drain electrode 44.Data wire 40 also can be a straight line, with scan line 20 vertical interlaceds and be positioned at the another side (as shown in Figure 1) of dot structure.Data wire 40 is arranged at the top and the corresponding light-shielding pattern 24 of light-shielding pattern 24, wherein the width of light-shielding pattern 24 can be slightly larger than the width of data wire 40, prevent light leak in order to shield lights, but the visual shading of width of the width of light-shielding pattern 24 and data wire 40 need be done appropriateness adjustment.Source electrode 42 also is arranged at thin film transistor region 12 with drain electrode 44, and is arranged at the top and the corresponding heavily doped semiconductor layer 34 of grid 22 2 sides respectively, and source electrode 42 is electrically connected to data wire 40.
As shown in Figure 5, on insulating barrier 30 and second layer conductive pattern, form a dielectric layer 50 subsequently, on dielectric layer 50, deposit a conductive layer (a for example metal level) again, and utilize little shadow and etching technique to define this conductive layer to form one the 3rd layer of conductive pattern.The material of dielectric layer 50 can be inorganic such as silica, silicon nitride etc., or organic material.The 3rd layer of conductive pattern is metal material, but also can be other conductive material, and as tin indium oxide, it comprises a common line 61 and a common pattern 60 that runs through dot structure, and its common pattern 60 is connected in common line 61, as shown in Figure 1.Common pattern 60 contains bag two branch line 60a, and this two branch line 60a is positioned at the surrounding zone 14 of dot structure, and two branch line 60a have a gap 62, and this two parallel branch line 60a also can be two parallel vertical bars.The be placed in both sides of data wire 40 of two branch line 60a, 62 in its gap are positioned at the top of data wire 40 and its gap 62 at least more than or equal to the width of data wire 40.
As shown in Figure 6, then on dielectric layer 50 and the 3rd layer of conductive pattern, form at least one protective layer 70, and remove partial protection layer 70 and dielectric layer 50, to expose drain electrode 44.As shown in Figure 7, on protective layer 70, form a pixel electrode 80 subsequently, and pixel electrode 80 is electrically connected with the drain electrode 44 that exposes.
Dot structure of the present invention has the three-layer metal layer, wherein the effect of the light-shielding pattern 24 of first conductive pattern is to cover the light leak that data wire 40 both sides of second layer conductive pattern are easy to generate, oblique light leakage particularly, and the effect of the 3rd layer of conductive pattern is to utilize common pattern 60 and the common line 61 shielding pixel electrodes 80 and data wire 40 of part, to avoid producing parasitic capacitance between pixel electrode 80 and the data wire 40, can reduce crosstalk effect by this.It should be noted that 60 in common pattern as two branch line 60a with a gap 62, and data wire 40 is between two branch line 60a, therefore common pattern 60 itself but can not produce excessive parasitic capacitance with data wire 40.In addition, common pattern 60, pixel electrode 80 also can form storage capacitors with therebetween protective layer 70, make dot structure not need to be provided with separately excessive storage capacitors in the viewing area, and can significantly promote aperture opening ratio.
In the dot structure of present embodiment, two branch line 60a of common pattern 60 trim with the both sides of data wire 40 substantially, and since the width of light-shielding pattern 24 greater than the width of data wire 40, therefore common pattern 60 is overlapped with light-shielding pattern 24, as shown in Figure 7, also can form storage capacitors.Under the factors such as parasitic capacitance value between the shield effectiveness of taking all factors into consideration common pattern 60, common pattern 60 and the pixel electrode 80, dot structure of the present invention also can have other different execution mode, please refer to relevant accompanying drawing and cooperate hereinafter explanation, wherein for showing the feature of each embodiment, below each accompanying drawing only show the generalized section of surrounding zone, and each embodiment same components is used same components symbology and is repeated no more.
Please refer to Fig. 8.Fig. 8 is the generalized section of the dot structure of another preferred embodiment of the present invention.As shown in Figure 8, in the present embodiment, a side part of two branch line 60a of common pattern 60 one of them and data wire 40 is overlapping, and another person then trims with a side of data wire 40, and not overlapping with data wire 40.
Please refer to Fig. 9.Fig. 9 is the generalized section of the dot structure of the another preferred embodiment of the present invention.As shown in Figure 9, in the present embodiment, two branch line 60a of common pattern 60 are overlapping with data wire 40 corresponding side parts respectively.
Please refer to Figure 10.Figure 10 is the generalized section of the dot structure of the another preferred embodiment of the present invention.As shown in Figure 5, in the present embodiment, two branch line 60a of common pattern 60 are all not overlapping with the both sides of data wire 40, and each branch line 60a and data wire 40 corresponding side spacings have a distance.
The foregoing description only is a different execution mode of the present invention, dot structure of the present invention is not limited to the foregoing description and instructs and other variation can be arranged, for instance, light-shielding pattern 24, data wire 40, common pattern 60 can optionally be done appropriate variation with the relative position of pixel electrode 80.
In sum, the light leak that dot structure of the present invention utilizes data wire both sides that the light-shielding pattern of first conductive pattern covers second layer conductive pattern to be easy to generate, and utilize the common pattern of the 3rd layer of conductive pattern to shield pixel electrode and data wire, to avoid producing parasitic capacitance between pixel electrode and the data wire.Common pattern itself has two parallel vertical bars simultaneously, and have between two vertical bars corresponding to crack between the data wire, though therefore two branch lines of common pattern have the effect of shielding pixel electrode and data wire, can not produce excessive parasitic capacitance with data wire, and can reduce crosstalk effect.Moreover the storage capacitors that two branch lines of common pattern, pixel electrode and therebetween protective layer also can form makes dot structure not need to be provided with separately excessive storage capacitors in the viewing area, makes dot structure of the present invention have the superelevation aperture opening ratio.
The above only is preferred embodiment of the present invention, and all equalizations of being done according to the present patent application claim change and modify, and all should belong to covering scope of the present invention.
Claims (16)
1. a dot structure is characterized in that, described dot structure comprises:
One substrate;
One ground floor conductive pattern is arranged on this substrate, and this ground floor conductive pattern comprises a grid, one scan line and a light-shielding pattern, and wherein this grid is electrically connected to this scan line;
One insulating barrier is arranged on this ground floor conductive pattern and this substrate;
One second layer conductive pattern is arranged on this insulating barrier, and this second layer conductive pattern comprises a data wire, one source pole and a drain electrode, and wherein this data wire is arranged at the top of this light-shielding pattern, and this data wire is electrically connected to this source electrode;
One dielectric layer is arranged on this second layer conductive pattern and this insulating barrier; And
One the 3rd layer of conductive pattern is arranged on this dielectric layer, and the 3rd layer of conductive pattern comprises a common line and a common pattern, and this common pattern has two branch lines, has a gap between this two branch line, and this gap is positioned at this data wire top.
2. dot structure as claimed in claim 1 is characterized in that, this light-shielding pattern is the metal of floating.
3. dot structure as claimed in claim 1 is characterized in that the width of this light-shielding pattern is greater than the width of this data wire.
4. dot structure as claimed in claim 1 is characterized in that, this of this common pattern two branch lines are two parallel vertical bars.
5. dot structure as claimed in claim 1 is characterized in that, this gap width of this two branch line is at least more than or equal to the width of data wire.
6. dot structure as claimed in claim 1 is characterized in that, this ground floor conductive pattern, this second layer conductive pattern, the 3rd layer of conductive pattern are constituted by metal level.
7. dot structure as claimed in claim 1; it is characterized in that; described dot structure includes at least one protective layer in addition and is arranged on the 3rd layer of conductive pattern and this dielectric layer, and a pixel electrode is arranged on this protective layer, and wherein this pixel electrode is electrically connected to this drain electrode.
8. dot structure as claimed in claim 7 is characterized in that, this pixel electrode flushes with this two branch line of this common pattern substantially.
9. method of making dot structure, this method comprises:
One substrate is provided;
Form a ground floor conductive pattern on this substrate, this ground floor conductive pattern comprises a grid, one scan line and a light-shielding pattern, and wherein this grid is electrically connected to this scan line;
On this ground floor conductive pattern and this substrate, form an insulating barrier;
Form a second layer conductive pattern on this insulating barrier, this second layer conductive pattern comprises a data wire, one source pole and a drain electrode, and wherein this data wire is arranged at the top of this light-shielding pattern, and this data wire is electrically connected to this source electrode;
On this second layer conductive pattern and this insulating barrier, form a dielectric layer; And
Form one the 3rd layer of conductive pattern on this dielectric layer, wherein the 3rd layer of conductive pattern comprises a common line and a common pattern, and this common pattern has two branch lines, has a gap between this two branch line, and this gap is positioned at this data wire top.
10. method as claimed in claim 9 is characterized in that the width of this light-shielding pattern is greater than the width of this data wire.
11. method as claimed in claim 9 is characterized in that, this light-shielding pattern is the metal of floating.
12. method as claimed in claim 9; it is characterized in that; this method is included in addition and forms after the 3rd layer of conductive pattern; on the 3rd layer of conductive pattern and this dielectric layer, form at least one protective layer; and on this protective layer, form a pixel electrode, wherein this pixel electrode is electrically connected to this drain electrode.
13. a dot structure is disposed on the substrate, this dot structure includes an active element district and a surrounding zone, it is characterized in that, this dot structure comprises:
One ground floor conductive pattern is arranged on this substrate, and this ground floor conductive pattern comprises a grid and a light-shielding pattern, and wherein this grid is positioned at this active element district, and this light-shielding pattern is positioned at this surrounding zone;
One insulating barrier is arranged on this ground floor conductive pattern and this substrate;
One second layer conductive pattern, be arranged on this insulating barrier, this second layer conductive pattern comprises a data wire, one source pole and a drain electrode, wherein this data wire is arranged at the top of this light-shielding pattern of this surrounding zone, this source electrode and this drain electrode are arranged at this active element district, and the top of these grid both sides that are placed in and overlapping with this grid part;
One dielectric layer is arranged on this second layer conductive pattern and this insulating barrier, and exposes this drain electrode in this active element district; And
One the 3rd layer of conductive pattern is arranged on this dielectric layer of this surrounding zone, and the top of these data wire both sides that are placed in and overlapping with this light-shielding pattern.
14. dot structure as claimed in claim 13 is characterized in that, this light-shielding pattern is the metal of floating.
15. dot structure as claimed in claim 13 is characterized in that, the width of this light-shielding pattern is greater than the width of this data wire.
16. dot structure as claimed in claim 13 is characterized in that, the 3rd layer of conductive pattern and this data wire two side portions are overlapping.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2008100045492A CN101221961B (en) | 2008-01-22 | 2008-01-22 | Pixel structure and its production method |
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| CN2008100045492A CN101221961B (en) | 2008-01-22 | 2008-01-22 | Pixel structure and its production method |
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| CN101221961A CN101221961A (en) | 2008-07-16 |
| CN101221961B true CN101221961B (en) | 2010-06-23 |
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Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101582423B (en) * | 2009-06-30 | 2011-01-05 | 友达光电股份有限公司 | Pixel structure and making method thereof |
| KR101730552B1 (en) * | 2010-04-13 | 2017-05-12 | 엘지디스플레이 주식회사 | In-Plane Switching Mode LCD and method of driving the same |
| CN103278971A (en) * | 2012-10-10 | 2013-09-04 | 上海天马微电子有限公司 | Thin film transistor array substrate and manufacturing method thereof |
| CN106773394B (en) * | 2016-10-14 | 2024-04-09 | 合肥京东方光电科技有限公司 | Array substrate, display panel and display device |
| CN107329339B (en) * | 2017-08-14 | 2020-04-07 | 深圳市华星光电技术有限公司 | Array substrate and curved surface liquid crystal display |
| TWI662349B (en) * | 2018-05-18 | 2019-06-11 | 友達光電股份有限公司 | Pixel structure |
| CN208737168U (en) * | 2018-09-30 | 2019-04-12 | 惠科股份有限公司 | Array substrate, display panel and display device |
| TWI692089B (en) * | 2019-04-09 | 2020-04-21 | 友達光電股份有限公司 | Display device |
| CN116449615B (en) * | 2023-06-13 | 2023-10-03 | Tcl华星光电技术有限公司 | Display panel and driving method thereof |
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| CN1677206A (en) * | 2004-03-30 | 2005-10-05 | Lg.菲利浦Lcd株式会社 | Liquid crystal display device |
| CN1987624A (en) * | 2006-11-17 | 2007-06-27 | 京东方科技集团股份有限公司 | TFT LCD array base board structure and its producing method |
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| CN1677206A (en) * | 2004-03-30 | 2005-10-05 | Lg.菲利浦Lcd株式会社 | Liquid crystal display device |
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