CN101164167A - Non volatile memory cell and semiconductor memory device - Google Patents
Non volatile memory cell and semiconductor memory device Download PDFInfo
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- CN101164167A CN101164167A CNA2006800135375A CN200680013537A CN101164167A CN 101164167 A CN101164167 A CN 101164167A CN A2006800135375 A CNA2006800135375 A CN A2006800135375A CN 200680013537 A CN200680013537 A CN 200680013537A CN 101164167 A CN101164167 A CN 101164167A
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- 230000015654 memory Effects 0.000 title claims description 149
- 239000004065 semiconductor Substances 0.000 title claims description 27
- 238000003860 storage Methods 0.000 claims description 187
- 239000000463 material Substances 0.000 claims description 183
- 230000006870 function Effects 0.000 claims description 52
- 238000000034 method Methods 0.000 claims description 41
- 230000001172 regenerating effect Effects 0.000 claims description 33
- 229910044991 metal oxide Inorganic materials 0.000 claims description 10
- 150000004706 metal oxides Chemical class 0.000 claims description 10
- 229910052596 spinel Inorganic materials 0.000 claims description 9
- 239000011029 spinel Substances 0.000 claims description 9
- YDZQQRWRVYGNER-UHFFFAOYSA-N iron;titanium;trihydrate Chemical group O.O.O.[Ti].[Fe] YDZQQRWRVYGNER-UHFFFAOYSA-N 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
- 229910052783 alkali metal Inorganic materials 0.000 claims description 4
- 150000001340 alkali metals Chemical class 0.000 claims description 4
- 229910052784 alkaline earth metal Inorganic materials 0.000 claims description 4
- 150000001342 alkaline earth metals Chemical class 0.000 claims description 4
- 239000002887 superconductor Substances 0.000 claims description 3
- 230000007423 decrease Effects 0.000 abstract 1
- 238000002474 experimental method Methods 0.000 description 73
- 230000008859 change Effects 0.000 description 38
- 230000014509 gene expression Effects 0.000 description 36
- 230000008929 regeneration Effects 0.000 description 22
- 238000011069 regeneration method Methods 0.000 description 22
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 21
- 230000000694 effects Effects 0.000 description 15
- 230000008569 process Effects 0.000 description 14
- 238000012545 processing Methods 0.000 description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 11
- 229910052710 silicon Inorganic materials 0.000 description 11
- 239000010703 silicon Substances 0.000 description 11
- 239000000758 substrate Substances 0.000 description 11
- 229910052697 platinum Inorganic materials 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 7
- 229910013641 LiNbO 3 Inorganic materials 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 229910018279 LaSrMnO Inorganic materials 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000004332 silver Substances 0.000 description 4
- 241000931705 Cicada Species 0.000 description 3
- 229910003321 CoFe Inorganic materials 0.000 description 3
- 229910002367 SrTiO Inorganic materials 0.000 description 3
- 239000003513 alkali Substances 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 3
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 3
- 229910001120 nichrome Inorganic materials 0.000 description 3
- 238000002441 X-ray diffraction Methods 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 238000010606 normalization Methods 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 241001269238 Data Species 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000002003 electron diffraction Methods 0.000 description 1
- 238000002524 electron diffraction data Methods 0.000 description 1
- 125000001475 halogen functional group Chemical group 0.000 description 1
- 230000008676 import Effects 0.000 description 1
- 229910002075 lanthanum strontium manganite Inorganic materials 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 238000013517 stratification Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
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- H10N70/20—Multistable switching devices, e.g. memristors
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5685—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using storage elements comprising metal oxide memory material, e.g. perovskites
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/102—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components
- H01L27/1021—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components including diodes only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
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- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
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- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
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- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/0073—Write using bi-directional cell biasing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/0083—Write to perform initialising, forming process, electro forming or conditioning
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/10—Resistive cells; Technology aspects
- G11C2213/15—Current-voltage curve
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/31—Material having complex metal oxide, e.g. perovskite structure
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/72—Array wherein the access device being a diode
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
Abstract
An electric element comprises: a first electrode (1); a second electrode (3); and a layer (2) connected between the first electrode and the second electrode and having a diode characteristic and a variable resistance characteristic. The layer (2) conducts a substantial electric current in a forward direction extending from one of the first electrode (1) and the second electrode (3) to the other electrode as compared to a reverse direction opposite of the forward direction. The resistance value of the layer (2) for the forward direction increases or decreases according to a predetermined pulse voltage applied between the first electrode (1) and the second electrode (3).
Description
Technical field
[0001] the present invention relates to a kind of storage device and semiconductor integrated circuit that has used the state variation material that resistance value changes according to the pulse voltage that is applied in.
Background technology
[0002] in recent years, along with the development of the digital technology in the e-machine,, more and more to the requirement of nonvolatile semiconductor memory member for data such as store images.And, to the capacity that increases memory device, lower to writing the required power of work, shortening and write and readout time and to prolong the requirement of these technology of device useful life more and more higher.In order to satisfy these requirements, at United States Patent (USP) the 6th, 204, in No. 139 (patent documentation 1) communiques, the someone discloses a kind of perovskite material (for example, Pr that changes according to the electric pulse that is applied in resistance value
(1-X)Ca
XMnO
3(PCMO), LaSrMnO
3(LSMO), GdBaCo
XO
Y(GBCO) or the like) constitute the technology of nonvolatile semiconductor memory member.According to this patent documentation 1 disclosed technology, described material (below, usually described material is recited as " variable-resistance material ") on apply predetermined electric pulse, increase or reduce the resistance value of described material, the storage that the resistance value that will therefore change again is used for different mutually numerical value comes with described material like this as memory device.
[0003] United States Patent (USP) the 6th, 673, and No. 691 communiques (patent documentation 2) disclose by making the pulse width variation of electric pulse, make the method for the resistance change of variable-resistance material.Patent documentation 2 also discloses and has constituted with described variable-resistance material as memory cell, and the example of 1D1R (diode and a resistor) the formula memory cell array that forms as the memory cell selecting device with diode.The feature of this structure is: with compare as the structure of memory cell selecting device with transistor, the size of memory cell is littler.
[0004] Figure 21 is illustrated in disclosed in the patent documentation 2, as to have used existing variable-resistance material storage device (1D1R formula Nonvolatile memory devices) 900.In this conventional example, on substrate 901, be formed with PN junction diode (N type silicon (Si) zone 902, P type silicon area 903-1 and 903-2), on the P of diode type silicon area 903-1, be formed with lower electrode 904-1, on the P of diode type silicon area 903-2, be formed with lower electrode 904-2, on the N of diode type silicon area 902, be formed with contact plunger 905, on lower electrode 904-1 and 904-2, be formed with variable-resistance material layer 906, on variable-resistance material layer 906, be formed with upper electrode 907-1 and 907-2.In this conventional example, lower electrode 904-1 and 904-2 and upper electrode 907-1 and 907-2 are made of platinum (Pt), and variable-resistance material layer 906 is by P
0.7Ca
0.3MnO
3Constitute.
[0005] in storage device shown in Figure 21 900, when between upper electrode 907-1 and lower electrode 904-1, applying predetermined pulse, the resistance change of the part in the variable-resistance material layer 906 between upper electrode 907-1 and lower electrode 904-1 (Variable Area 906 α); When between upper electrode 907-2 and lower electrode 904-2, applying predetermined pulse, the resistance change of the part in the variable-resistance material layer 906 between upper electrode 907-2 and lower electrode 904-2 (Variable Area 906 β).In other words, in this storage device, use Variable Area 906 α and Variable Area 906 β respectively as a memory cell.
[0006] in storage device shown in Figure 21 900, use the PN junction diode that is formed on the substrate 901 as the memory cell selecting diode.Therefore, electric current flows to lower electrode 904-1 (904-2) (positive direction) from upper electrode 907-1 (907-2), but do not flow to upper electrode 907-1 (907-2) (in the other direction), between upper electrode 907-1 and upper electrode 907-2, do not flow yet from lower electrode 904-1 (904-2).
[0007] Figure 22 represents the equivalent electric circuit of storage device 900 shown in Figure 21.In Figure 22, word line W1 is corresponding to upper electrode 907-1; Word line W2 is corresponding to upper electrode 907-2; Bit line B1 is corresponding to contact plunger 905.Memory cell MC911 is corresponding to variable resistor zone 906 α; Diode D911 is corresponding to diode (N type silicon area 902, P type silicon area 903-1); Memory cell MC912 is corresponding to variable resistor zone 906 β; Diode D912 is corresponding to diode (N type silicon area 902, P type silicon area 903-2).
[0008] (work)
Below, with reference to Figure 22, the working condition of storage device shown in Figure 21 900 is described.Be the disposition that memory cell MC911 is carried out in this explanation.
[0009] (puts in place (set) (storage) or reset)
When storing, make word line W2 and bit line B1 ground connection, on word line W1, apply predetermined electric pulse again.Consequently, the resistance change of memory cell MC911 is to low resistance state (resetting) or high resistance state (putting in place).For example in patent documentation 2, when applying magnitude of voltage for "+4V ", when pulse duration is the pulse voltage of " 100nsec ", the resistance value of memory cell MC911 changes to low resistance state from high resistance state.When applying magnitude of voltage for "+2.5V ", when pulse duration is the pulse voltage of " 10 μ sec ", the resistance value of memory cell MC911 changes to high resistance state from low resistance state.
[0010] (regeneration)
When regeneration, make word line W2 and bit line B1 ground connection, on word line W1, apply regulation regenerative voltage (for example, magnitude of voltage is the voltage of "+0.5V ") again.Like this, the electric current that flows through memory cell MC911 flows out among the bit line B1.On the other hand, there is not electric current to flow through memory cell MC912.Because memory cell MC912 is provided with diode D912 (N type silicon area 902 among Figure 21 and P type silicon area 903-2), so there is not electric current to flow to word line W2 from word line W1.Therefore, can only detect the resistance value of memory cell MC911.
[0011] according to described way, existing storage device (1D1R formula Nonvolatile memory devices) 900 carries out storage work and reproduction operation to each memory cell.
[0012], in No. 371 communiques (patent documentation 3),, realized the very big storage device of capacity by constituting crosspoint type storage device with variable-resistance material at United States Patent (USP) the 6th, 531.Particularly, as shown in figure 23,, realized crosspoint type storage device by in the various piece (crosspoint) of word line W1, W2 and bit line B1, B2 intersection, memory cell 90-11,90-12,90-21 and 90-22 being set.Memory cell 90-11 is formed by variable-resistance material to memory cell 90-22.
[0013] still, in the storage device of Figure 23, if with the memory cell of wanting sense information (for example, variable-resistance material 90-21) resistance value of adjacent memory unit (variable-resistance material 90-11,90-12 or 90-22) is lower, just might electric current except the memory cell of wanting sense information, also flow, so that can not pick out the resistance states of the memory cell of wanting sense information, as shown in figure 23 by this adjacent memory unit.So, shown in the public table special table 2002-530850 communiques of Japanese patent application (patent documentation 4), the someone discloses to make to be become the state variation of memory cell portion and is called as that the diode that turns to (steering) portion is connected in series and the crosspoint type storage device that constitutes.
Patent documentation 1: United States Patent (USP) the 6th, 204, No. 139 communiques
Patent documentation 2: United States Patent (USP) the 6th, 673, No. 691 communiques
Patent documentation 3: United States Patent (USP) the 6th, 531, No. 371 communiques
Patent documentation 4: the special table of the public table of Japanese patent application 2002-530850 communique
Non-patent literature 1:2002 IEDM, paper number 7.5, Dec.2002
[0014] yet, in the device (1D1R formula Nonvolatile memory devices) that uses diode, need on substrate 901, to form as shown in Figure 21 the PN junction diode, and, also need on this diode, form lower electrode 904-1 and 904-2 and variable-resistance material 906 in order to form memory cell.Because this structure needs complicated manufacturing process, so be unsuitable for actual use.In storage device shown in Figure 21 900, because be formed with diode, even, do not mean that on Variable Area 906 α (906 β) to have applied predetermined pulse voltage so the mode that becomes negative pole (-) with the relative lower electrode 904-1 (904-2) of upper electrode 907-1 (907-2) applies pulse voltage yet.In other words, in storage device shown in Figure 21 900, if allow the resistance change of Variable Area 906 α (906 β), just need with upper electrode 907-1 (907-2) relatively lower electrode 904-1 (904-2) mode that becomes positive pole (+) apply pulse voltage.Like this, it is restricted to be applied to the polarity of the pulse voltage on the variable-resistance material.
[0015] in storage device shown in Figure 21 900, be " 100nsec " for allowing the resistance states of memory cell change to low resistance state (resistance states is put in place) the needed time from high resistance state; For allowing the resistance states of memory cell change to high resistance state (resistance states is resetted) the needed time from low resistance state is " 10 μ sec ".If carry out putting in place or the work that resets of this memory cell fast, the pulse duration of the pulse voltage that is applied is narrowed down.
[0016] manufacturing process of the crosspoint type storage device shown in the patent documentation 4 is very complicated, and the manufacturing process when carrying out multiple stratification in order to constitute three-dimensional structure is also very complicated.
Summary of the invention
[0017] according to a situation of the present invention, a kind of storage device comprises first electrode layer, state variation layer and the second electrode lay.First electrode layer comprises many first electrode wires of extending parallel to each other.The state variation layer is formed on described first electrode layer, and comprises a plurality of state variation things (state variation portion) with diode characteristic and variable resistance characteristics.The second electrode lay is formed on the described state variation layer, and comprises many second electrode wires of extending parallel to each other.Described many first electrode wires and described many second electrode wires clip described state variation layer and cross one another when stack direction is seen.Each state variation portion in the described a plurality of state variation portion is formed between locational, this first electrode wires and this second electrode wires of arbitrary intersection in described many first electrode wires arbitrary and described many second electrode wires.Each state variation portion in the described a plurality of state variation portion, have with arbitrary from this first electrode wires and this second electrode wires to the direction of another extension as positive direction, with from this another to the direction of this extension as reciprocal diode characteristic.Each state variation portion in the described a plurality of state variation portion, have this state variation portion in the resistance value on the positive direction according to being applied in the variable resistance characteristics that the predetermined pulse voltage between described first electrode wires and described second electrode wires increases or reduces.
[0018] and the structure of existing 1D1R formula nonvolatile semiconductor memory member by comparison because described storage device does not need to be provided with diode, so the manufacturing process of described storage device can be made as simpler operation.Because state variation portion has " diode characteristic ", so, also do not have unnecessary electric current to flow through this adjacent state variation portion even the resistance value of the state variation portion adjacent with the state variation portion that is process object is very low.Like this, just can correctly pick out the resistance value of the state variation portion that is process object.
[0019] preferably such, described storage device also comprises a plurality of first electrodes and a plurality of second electrode with described a plurality of state variation portion correspondence.Each first electrode in described a plurality of first electrode, between and this first electrode pair state variation portion of answering with and corresponding first electrode wires of this state variation portion between.Each second electrode in described a plurality of second electrode, between and this second electrode pair state variation portion of answering with and corresponding second electrode wires of this state variation portion between.Each state variation portion in the described a plurality of state variation portion, have with from pairing first electrode and this second electrode any to the direction of another extension as positive direction, with from this another to the direction of this extension as reciprocal diode characteristic.Each state variation portion in the described a plurality of state variation portion, have this state variation portion in the resistance value on the positive direction according to being applied in the variable resistance characteristics that the predetermined pulse voltage between pairing first electrode and second electrode increases or reduces.
[0020] according to other situation of the present invention, a kind of storage device comprises first electrode layer, state variation layer and the second electrode lay.First electrode layer comprises many first electrode wires of extending parallel to each other.The state variation layer is formed on described first electrode layer, and is made of the state variation material with diode characteristic and variable resistance characteristics.The second electrode lay is formed on the described state variation layer, and comprises many second electrode wires of extending parallel to each other.Described many first electrode wires and described many second electrode wires clip described state variation layer and cross one another when stack direction is seen.At described state variation layer, be clipped in the Variable Area (state variation portion) between arbitrary in described many first electrode wires arbitrary and described many second electrode wires, have with arbitrary from this first electrode wires and this second electrode wires to the direction of another extension as positive direction, with from this another to the direction of this extension as reciprocal diode characteristic.Described state variation portion, have this state variation portion in the resistance value on the positive direction according to being applied in the variable resistance characteristics that the predetermined pulse voltage between this first electrode wires and this second electrode wires increases or reduces.
[0021] and the structure of existing 1D1R formula nonvolatile semiconductor memory member by comparison because described storage device does not need to be provided with diode, so the manufacturing process of described storage device can be made as simpler operation.Because the state variation layer has " diode characteristic ", so, also do not have unnecessary electric current to flow through this adjacent Variable Area even the resistance value of the Variable Area adjacent with the Variable Area that is process object is very low.Like this, just can correctly pick out the resistance value of the Variable Area that is process object.
[0022] preferably such, the work function of every first electrode wires in described many first electrode wires is different with the work function of every second electrode wires in described many second electrode wires.
[0023] the following thing of cicada, that is: in described storage device, when the work function of the work function of first electrode and second electrode mutually not simultaneously, the state variation material has diode characteristic and variable resistance characteristics.Therefore, if the work function of establishing the work function of first electrode and second electrode is different value mutually, just can constitute the state variation portion that the state variation material has " diode characteristic " and " variable resistance characteristics ".
[0024] preferably such, the work function of each first electrode in described a plurality of first electrodes is different with the work function of each second electrode in described a plurality of second electrodes.
[0025] preferably such, in each state variation portion of described a plurality of state variation portion, the crystallinity of state variation material is inhomogeneous.
[0026] got the following thing of cicada, that is: in described storage device, when the crystallinity of state variation material was inhomogeneous, the state variation material had diode characteristic and variable resistance characteristics.Therefore, if make the crystallinity of state variation material inhomogeneous, just can constitute the state variation portion that the state variation material has " diode characteristic " and " variable resistance characteristics ".
[0027] preferably such, in described state variation layer, the crystallinity of state variation material is inhomogeneous.
[0028] preferably such, described storage device also is included in first drive electrode line portion that applies assigned voltage on described many first electrode wires and the second drive electrode line portion that applies assigned voltage on described many second electrode wires.
[0029] in described storage device, because state variation portion has " diode characteristic ", so electric current can not flow to other first electrode wires from certain bar first electrode wires.Like this, can under the state that diode element is not set in addition, constitute storage device.
[0030] preferably such, will be with information storage in any state variation portion of described a plurality of state variation portion the time, apply first pulse voltage on corresponding first electrode wires of the state variation portion with storing described information of the described first drive electrode line portion in described many first electrode wires, apply second pulse voltage on corresponding second electrode wires of the state variation portion with storing described information of the described second drive electrode line portion in described many second electrode wires.
[0031] in described storage device, predetermined pulse voltage is applied in the state variation portion that wants store information, and predetermined pulse voltage is not applied in other state variation portions.Therefore, the resistance states of the state variation portion that store information is changed.In other words, can select the free position change section, again with information storage in the state variation portion that this is selected.
[0032] preferably such, during information in any the state variation portion that has been stored in described a plurality of state variation portion of will regenerating, apply regenerative voltage on corresponding first electrode wires of the state variation portion with reading described information of the described first drive electrode line portion in described many first electrode wires, apply described regenerative voltage on not corresponding second electrode wires of the state variation portion with reading described information of the described second drive electrode line portion in described many second electrode wires.
[0033] in described storage device, in wanting the state variation portion of sense information, electric current flows along positive direction, and does not have electric current to flow along positive direction in other state variation portions.Therefore, can only read the electric current that flows through the state variation portion that wants sense information.In other words, can select the free position change section, read the information that is stored in this state variation portion that selects again.
[0034] situation according to another preferred, a kind of semiconductor integrated circuit comprises described storage device and the logical circuit of the computing of stipulating.Described logical circuit has memory module and tupe.Logical circuit is stored in bit data in the described storage device when described memory module.Logical circuit is read the bit data that is stored in the described storage device when described tupe.
[0035] situation according to another preferred, a kind of semiconductor integrated circuit comprises described storage device and has the executive program pattern and the processor of rewriting program pattern.Described processor carries out work according to the program that is stored in the described storage device when described executive program pattern.Described processor, the program re-writing that will be stored in when described rewriting program pattern in the described storage device is other new procedures from the outside input.
[0036] preferably such, described state variation material is the metal oxide with spinel structure.
[0037] preferably such, described state variation material is the ferroelectric oxide that has been added metal.
[0038] preferably such, described ferroelectric oxide has ilmenite structure.
[0039] preferably such, described state variation material is the metal oxide with perovskite structure.
[0040] preferably such, described metal oxide is the material with at least a characteristic in super giant magnetoresistance characteristic and the high-temperature superconductor characteristic.
[0041] preferably such, described state variation material does not comprise alkali metal and alkaline-earth metal.
The effect of-invention-
[0042] as mentioned above because state variation portion has " diode characteristic ", so can be under the state that diode element is not set in addition the direction of rated current.Because state variation portion has " variable resistance characteristics ", so can be with this state variation portion for example as 1D1R formula nonvolatile semiconductor memory member.With existing 1D1R formula nonvolatile semiconductor memory member by comparison, like this with this state variation portion as under the situation of 1D1R formula nonvolatile semiconductor memory member, do not need to be provided with diode.Therefore, can make that to make operation be simple operation.With existing pulse applying method (making the method for the resistance change of variable-resistance material by the pulse duration of adjusting pulse voltage) by comparison, make in the method for resistance change in the polarity of utilizing pulse voltage, the pulse duration of the pulse voltage that is applied is narrower.In other words, can shorten to storage, the required time resets.
Description of drawings
[0043] Fig. 1 is the figure of the basic structure of expression electronic component.
Fig. 2 is the figure of the waveform of the pulse voltage of indicating to apply.
Fig. 3 (a) is the figure that is illustrated in the situation of the resistance change of measuring when applying the measuring voltage with a kind of polarity on the electronic component, polarity is mutually different that pulse voltage took place.Fig. 3 (b) is the figure that is illustrated in the situation of the resistance change of measuring when applying the measuring voltage with another kind of polarity on the electronic component, polarity is mutually different that pulse voltage took place.
Fig. 4 (a) is to be illustrated in the figure that applies the I-E characteristic after the pulse voltage with a kind of polarity on the electronic component.Fig. 4 (b) is to be illustrated in the figure that applies the I-E characteristic after the pulse voltage with another kind of polarity on the electronic component.
Fig. 5 (a) is to be illustrated in the figure that applies the I-E characteristic after the pulse voltage with a kind of polarity on the electronic component.Fig. 5 (b) is to be illustrated in the figure that applies the I-E characteristic after the pulse voltage with another kind of polarity on the electronic component.
Fig. 6 is the figure that is illustrated in the situation of the resistance change of measuring when applying measuring voltage on the electronic component, polarity is mutually different that pulse voltage took place.
Fig. 7 (a) is to be illustrated in the figure that applies the I-E characteristic after the pulse voltage with a kind of polarity on the electronic component.Fig. 7 (b) is to be illustrated in the figure that applies the I-E characteristic after the pulse voltage with another kind of polarity on the electronic component.
Fig. 8 (a) is the figure that is illustrated in the situation of the resistance change of measuring when applying the measuring voltage with a kind of polarity on the electronic component, polarity is mutually different that pulse voltage took place.Fig. 8 (b) is the figure that is illustrated in the situation of the resistance change of measuring when applying the measuring voltage with another kind of polarity on the electronic component, polarity is mutually different that pulse voltage took place.
Fig. 9 is the figure that is illustrated in the situation of the resistance change that takes place when applying pulse voltage on the electronic component.
Figure 10 is the figure of the circuit symbol of expression electronic component.
Figure 11 is the integrally-built figure of expression based on the storage device of the second embodiment of the present invention.
Figure 12 is the integrally-built figure of expression based on the semiconductor integrated circuit of the third embodiment of the present invention.
Figure 13 is the integrally-built figure of expression based on the semiconductor integrated circuit of the fourth embodiment of the present invention.
Figure 14 is the figure of expression based on the structure of the storage device of the fifth embodiment of the present invention.
Figure 15 is the figure of the equivalent electric circuit of expression storage device shown in Figure 14.
Figure 16 is the figure of the equivalent electric circuit of expression storage device shown in Figure 14.
Figure 17 is the figure of expression based on the structure of the storage device of the sixth embodiment of the present invention.
Figure 18 is the figure of the equivalent electric circuit of expression storage device shown in Figure 17.
Figure 19 is the figure of expression based on the variation of the storage device of the sixth embodiment of the present invention.
Figure 20 is the figure of expression based on the variation of the storage device of the sixth embodiment of the present invention.
Figure 21 is the figure of the structure of the existing storage device of expression.
Figure 22 is the figure of the equivalent electric circuit of expression storage device shown in Figure 21.
Figure 23 is the figure of the existing crosspoint of expression type storage device.
Symbol description
[0044] 1-upper electrode; 2-state variation material; The 3-lower electrode; The 4-substrate; The 5-power supply; 101-1,101-2-terminal; The 102-electronic component; 200,500-storage device; The 201-memory array; The 202-address buffer; The 203-control part; The 204-row decoder; 205-drives the word line device; The 206-column decoder; 207-drives the bit line device; MC211, MC212, MC221, MC222, MC511 and MC512-memory cell; W1, W2-word line; B1, B2-bit line; The 300-semiconductor integrated circuit; The 301-logical circuit; The 400-semiconductor integrated circuit; The 401-processor; The 402-interface; The 501-substrate; The 502-lower electrode; 503-state variation material; 503 α, 503 β-state variation zone; The 504-contact plunger; 505-1,505-2-upper electrode; 60-11 is to 60-22-state variation thing; 60 α-11 are to 60 α-22-state variation zone.
Embodiment
[0045] below,, describes embodiments of the invention in detail with reference to accompanying drawing.Remark additionally, use the identical or suitable part of identical symbolic representation in the accompanying drawings, thereby do not carry out the explanation of described part repeatedly.
(basic structure of electronic component and fundamental characteristics)
At first, to the basic structure and the fundamental characteristics of the electronic component of use describe in an embodiment of the present invention.
[0046] Fig. 1, the basic structure of expression electronic component.In electronic component, on substrate 4, be formed with lower electrode 3, on lower electrode 3, be formed with state variation material 2, on state variation material 2, be formed with upper electrode 1.Power supply 5 applies the voltage of regulation between upper electrode 1 and lower electrode 3.
[0047] be used for the state variation material 2 of electronic component of the present invention, have following characteristic, that is: electric current flows along positive direction easily, and is difficult for the characteristic (diode characteristic) that flows along in the other direction; By applying predetermined pulse voltage, the characteristic (variable resistance characteristics) that resistance value increases or reduces.This state variation material 2 is metal oxide materials with spinel structure, be added the ferroelectric oxide of the metal with ilmenite structure or have a material specific character, that have perovskite structure in CMR (super giant magnetoresistance) characteristic and the high-temperature superconductor characteristic at least.Particularly, this state variation material 2 is CoFe
2O
4, CuFe
2O
4, NiCr
2O
4, Fe
3O
4, Cr-SrTiO
3, Sr-LiNbO
3, Mg-LiNbO
3, Pr
(1-X)Ca
XMnO
3(0＜X＜0.5) or LaSrMnO
3, GdBaCo
XO
Y(0＜X＜2,0＜Y＜7) or the like.
[0048] below, the method that realization is had the state variation material 2 of above-mentioned characteristic (variable resistance characteristics and diode characteristic) describes.
[0049] (first embodiment)
For realize the having above-mentioned characteristic state variation material 2 of (variable resistance characteristics and diode characteristic), as upper electrode shown in Figure 11 and lower electrode 3, constituted electronic component with the different mutually two kinds of materials of work function.The following describes its reason.
[0050] (object of experiment)
At this, following three kinds of electronic components are tested.
Sample (A): the work function of upper electrode 1 is less than the electronic component of the work function of lower electrode 3.
Sample (B): the work function of upper electrode 1 is greater than the electronic component of the work function of lower electrode 3.
Sample (C): the work function of upper electrode 1 equals the electronic component of the work function of lower electrode 3.
[0051] remarks additionally, by forming sample (A) behind sample (C), the mode that becomes positive pole (+) with upper electrode 1 relative lower electrode 3 applies pulse voltage (magnitude of voltage+3V, pulse duration 10 μ sec (microsecond)), resistance value is initialized as 1/10th value of the resistance value (about 1M Ω) that slightly is slightly less than after just forming, and this value is set at the initial stage resistance value.(utilizing with Japanese patent application laid is willing to wait for 2003-421374 number the same method of the described method of document to carry out this initialization.)
[0052] (experiment content)
In the present embodiment, sample (A) has been carried out following experiment respectively to sample (C).
[0053] (first experiment)
With the mode that at every turn applies a pulse alternately applied upper electrode 1 relative lower electrode 3 and become the pulse voltage of positive pole (+) (below, this pulse voltage is called " just (+) pulse voltage ") become the pulse voltage (below, this pulse voltage is called " negative (-) pulse voltage ") (with reference to Fig. 2) of negative pole (-) with upper electrode 1 relative lower electrode 3.At this, a pulse that has at every turn applied pulse voltage applies upper electrode 1 relative lower electrode 3 later on and becomes the voltage of positive pole (+) (below, this voltage is called " just (+) measures voltage "), to measure the resistance value of state variation material 2.
[0054] (second experiment)
Alternately apply just (+) pulse voltage and negative (-) pulse voltage (with reference to Fig. 2) in the mode that applies a pulse at every turn.At this, a pulse that has at every turn applied pulse voltage becomes the voltage (below, this voltage is called " negative (-) measures voltage ") of negative pole (-) with after-applied upper electrode 1 relative lower electrode 3, to measure the resistance value of state variation material 2.
[0055] (the 3rd experiment)
Alternately apply just (+) pulse voltage and negative (-) pulse voltage (with reference to Fig. 2) in the mode that applies a pulse at every turn.At this, the I-E characteristic of state variation material 2 has been measured in a pulse that has at every turn applied pulse voltage later on.
[0056] remarks additionally, be made as following value in this value with the voltage that applied.
Just (+) pulse voltage: magnitude of voltage+3V, pulse duration 50nsec
Negative (-) pulse voltage: magnitude of voltage-3V, pulse duration 50nsec
Just (+) measures voltage: magnitude of voltage+0.5V
Negative (-) measures voltage: magnitude of voltage-0.5V
[0057] (experiment that sample (A) is carried out)
At first, with reference to Fig. 3 (a), Fig. 3 (b), Fig. 4 (a) and Fig. 4 (b), the experiment that sample (A) is carried out is described.Remark additionally, in Fig. 3 (a) and Fig. 3 (b), the longitudinal axis is represented the value (Fig. 6, Fig. 8 (a), Fig. 8 (b) and Fig. 9 are too) that the resistance value R0 of basis after initialization just obtains measured value R normalization.
[0058] (material of use)
Upper electrode 1: silver (Ag) (the about 0.2 μ m of thickness, work function 4.3eV (=electronvolt: electron-volt))
State variation material 2:CuFe
2O
4(the about 0.1 μ m of thickness)
Lower electrode 3: platinum (the about 0.2 μ m of thickness, work function 5.7eV)
(first result of experiment)
Sample (A) has been carried out first experiment.Fig. 3 (a) represents this result of experiment.After just applying (+) pulse voltage, measured value changes to low resistance state (comparing the lower state of resistance value with another kind of state) from high resistance state (comparing the higher state of resistance value with another kind of state).After applying negative (-) pulse voltage, measured value changes to high resistance state from low resistance state.This shows,, increase or reduce according to the pulse voltage that is applied in from the resistance value (resistance value of state variation material 2) of upper electrode 1 on the direction that lower electrode 3 extends.
[0059] (second result of experiment)
Sample (A) has been carried out second experiment.Fig. 3 (b) represents this result of experiment.Even after just applying (+) pulse voltage, measured value also remains high resistance state, and is not changed to low resistance state.This shows,, always be in high resistance state from the resistance value (resistance value of state variation material 2) of lower electrode 3 on the direction that upper electrode 1 extends, irrelevant with the pulse voltage that is applied in.
[0060] (the 3rd result of experiment)
(A) carried out the 3rd experiment to sample.Fig. 4 (a) is illustrated in and applies the I-E characteristic that determines after (+) pulse voltage just.Shown in Fig. 4 (a), after just applying (+) pulse voltage, (+) measures under the voltage condition just applying, this just (+) to measure the absolute value of voltage big more, the current value of the electric current that flows is big more, electric current is easy more flows.On the other hand, applying under negative (-) mensuration voltage condition, absolute value that this negative (-) measures voltage is many again, and the current value of the electric current that flows does not increase yet, and the absolute value that flows in scope of experiment of electric current is below the 20 μ A, and electric current is difficult to flow.This shows that after just applying (+) pulse voltage, electric current (flowing through the electric current of state variation material 2) is easily along flowing to the direction that lower electrode 3 extends from upper electrode 1, and electric current is difficult for along flowing to the direction that upper electrode 1 extends from lower electrode 3.
[0061] Fig. 4 (b) is illustrated in and applies the I-E characteristic that determines after negative (-) pulse voltage.Shown in Fig. 4 (b), after applying negative (-) pulse voltage, even after just applying (+) and measuring voltage, electric current also is difficult for flowing.This shows, after applying negative (-) pulse voltage, compare that electric current is more difficult along flowing to the direction that lower electrode 3 extends from upper electrode 1 with the situation after applying (+) pulse voltage just.In other words, applied under the voltage condition to the positive direction that lower electrode 3 extends from upper electrode 1 on the edge, the electric current that flows through sample (A) is being the appearance increase of exponential function (in Fig. 4 (a), be the part corresponding) with the right in the transverse axis, and applied under the voltage condition to the opposite direction that upper electrode 1 extends from lower electrode 3 on the edge, electric current is mobile (in Fig. 4 (a), being the part corresponding with the left side in the transverse axis) hardly.In other words, get the following thing of cicada, that is: with along lower electrode 3 compare to the opposite direction current amount flowing that upper electrode 1 extends from this sample (A), along bigger to the positive direction current amount flowing that lower electrode 3 extends from upper electrode 1, this sample (A) has to play makes electric current only along the flow diode characteristic of this rectified action of a direction.
[0062] (result of checking)
By above-mentioned experimental result as seen, sample (A) has following characteristic.
One, with the direction of extending to lower electrode 3 from upper electrode 1 be positive direction, being reciprocal diode characteristic to the direction that upper electrode 1 extends from lower electrode 3.
Two, the characteristic (variable resistance characteristics) that increases or reduce according to the pulse voltage that is applied in of the resistance value on the positive direction.Describe in detail, the resistance value of sample (A) on positive direction is corresponding to the minimizing that applies of (+) pulse voltage just; This resistance value is corresponding to the increase that applies of negative (-) pulse voltage.
[0063] (experiment that sample (B) is carried out)
Below, with reference to Fig. 3 (a), Fig. 3 (b), Fig. 5 (a) and Fig. 5 (b), the experimental result that sample (B) is carried out is described.
[0064] (material of use)
Upper electrode 1: platinum (the about 0.2 μ m of thickness, work function 5.7eV)
State variation material 2:CuFe
2O
4(the about 0.1 μ m of thickness)
Lower electrode 3: titanium (Ti) (the about 0.2 μ m of thickness, work function 4.3eV)
(result of experiment)
(first result of experiment)
Sample (B) has been carried out first experiment.This result of experiment is the appearance shown in Fig. 3 (b).No matter be after just applying (+) pulse voltage or after applying negative (-) pulse voltage, the value that determines all remains high resistance state, and does not become low resistance state.This shows,, always be in high resistance state from the resistance value (resistance value of state variation material 2) of upper electrode 1 on the direction that lower electrode 3 extends, irrelevant with the pulse voltage that is applied in.
(second result of experiment)
[0065] sample (B) has been carried out second experiment.This result of experiment is the appearance of Fig. 3 (a).After just applying (+) pulse voltage, measured value changes to low resistance state (comparing the lower state of resistance value with another kind of state) from high resistance state (comparing the higher state of resistance value with another kind of state).After applying negative (-) pulse voltage, measured value changes to high resistance state from low resistance state.This shows,, increase or reduce according to the pulse voltage that is applied in from the resistance value (resistance value of state variation material 2) of lower electrode 3 on the direction that upper electrode 1 extends.
[0066] (the 3rd result of experiment)
(B) carried out the 3rd experiment to sample.Fig. 5 (a) is illustrated in and applies the I-E characteristic that determines after (+) pulse voltage just.Shown in Fig. 5 (a), after just applying (+) pulse voltage, electric current is difficult for flowing when just (+) measuring voltage applying, and flows easily when applying negative (-) and measure voltage.This shows that after just applying (+) pulse voltage, electric current (flowing through the electric current of state variation material 2) is difficult for along flowing to the direction that lower electrode 3 extends from upper electrode 1, and electric current is easily along flowing to the direction that upper electrode 1 extends from lower electrode 3.
[0067] Fig. 5 (b) is illustrated in and applies the I-E characteristic that determines after negative (-) pulse voltage.Shown in Fig. 5 (b), after applying negative (-) pulse voltage, even when applying negative (-) mensuration voltage, electric current also is difficult for flowing.This shows, after applying negative (-) pulse voltage, compare that electric current is more difficult along flowing to the direction that upper electrode 1 extends from lower electrode 3 with the situation after applying (+) pulse voltage just.
[0068] (result of checking)
By above-mentioned experimental result as seen, sample (B) has following characteristic.
One, with the direction of extending to upper electrode 1 from lower electrode 3 be positive direction, being reciprocal diode characteristic to the direction that lower electrode 3 extends from upper electrode 1.
Two, the characteristic (variable resistance characteristics) that increases or reduce according to the pulse voltage that is applied in of the resistance value on the positive direction.Describe in detail, the resistance value of sample (B) on positive direction is corresponding to the minimizing that applies of (+) pulse voltage just; This resistance value is corresponding to the increase that applies of negative (-) pulse voltage.
[0069] (experiment that sample (C) is carried out)
Below, with reference to Fig. 6, Fig. 7 (a) and Fig. 7 (b), the experimental result that sample (C) is carried out is described.
[0070] (material of use)
Upper electrode 1: platinum (the about 0.2 μ m of thickness, work function 5.7eV)
State variation material 2:CuFe
2O
4(the about 0.1 μ m of thickness)
Lower electrode 3: platinum (the about 0.2 μ m of thickness, work function 5.7eV)
(result of experiment)
(first result of experiment)
Sample (C) has been carried out first experiment.Fig. 6 represents this result of experiment.After just applying (+) pulse voltage, measured value changes to low resistance state from high resistance state.After applying negative (-) pulse voltage, measured value changes to high resistance state from low resistance state.Like this, from the resistance value (resistance value of state variation material 2) of upper electrode 1 on the direction that lower electrode 3 extends, increase or reduce according to the pulse voltage that is applied in.
[0071] (second result of experiment)
Sample (C) has been carried out second experiment.Fig. 6 represents this result of experiment.Like this, from the resistance value (resistance value of state variation material 2) of lower electrode 3 on the direction that upper electrode 1 extends, increase or reduce according to the pulse voltage that is applied in.
[0072] (the 3rd result of experiment)
(C) carried out the 3rd experiment to sample.Fig. 7 (a) is illustrated in and applies the I-E characteristic that determines after (+) pulse voltage just; Fig. 7 (b) is illustrated in and applies the I-E characteristic that determines after negative (-) pulse voltage.With the situation shown in the situation shown in Fig. 7 (a) and Fig. 7 (b) by comparison, just learn with apply negative (-) pulse voltage after compare, electric current is easier flow (resistance value of state variation material 2 is littler) after just applying (+) pulse voltage.
[0073] (result of checking)
By above-mentioned experimental result as seen, sample (C) has following characteristic.
One, the characteristic (variable resistance characteristics) that resistance value reduces corresponding to (+) applying of pulse voltage just and this resistance value increases corresponding to negative (-) applying of pulse voltage.
[0074] (summary)
In sample (A), the work function of upper electrode 1 is less than the work function of lower electrode 3.In sample (B), the work function of upper electrode 1 is greater than the work function of lower electrode 3.By the experimental result that sample (A) is carried out to sample (C) as seen, state variation material 2 has following characteristic.
One, with the direction of extending to the bigger electrode of work function from the less electrode of work function be positive direction, being reciprocal diode characteristic to the direction that the less electrode of work function extends from the bigger electrode of work function.
Two, the characteristic (variable resistance characteristics) that increases or reduce according to the pulse voltage that is applied in of the resistance value on the positive direction.Describe in detail, applied under the situation of pulse voltage in the mode that becomes positive pole (+) with upper electrode 1 relative lower electrode 3, the resistance value of state variation material 2 on positive direction reduces; When the mode that becomes negative pole (-) with upper electrode 1 relative lower electrode 3 applied pulse voltage, the resistance value of state variation material 2 on positive direction increased.
[0075] arrives in the sample (C) at sample (A), by after forming each sample, the mode that becomes positive pole (+) with upper electrode 1 relative lower electrode 3 applies pulse voltage, the resistance value of state variation material 2 is initialized as 1/10th resistance value of the resistance value (about 1M Ω) that slightly is slightly less than after just forming.This case inventor has also prepared by after forming each sample, the mode that becomes negative pole (-) with upper electrode 1 relative lower electrode 3 applies pulse voltage (magnitude of voltage-3V, pulse duration 10 μ sec), the resistance value of state variation material 2 is initialized as 1/10th resistance value of the resistance value (about 1M Ω) that slightly is slightly less than after just forming and the sample (A) that obtains to sample (C) (described sample (A) is called sample (A '), sample (B ') and sample (C ') to sample (C)).
[0076] the same experiment (first to the 3rd experiment) of experiment that sample (A ') has been carried out and sample (A) is carried out to sample (C) to sample (C ').
[0077] (experiment that sample (A ') is carried out)
With reference to Fig. 8 (a), Fig. 8 (b), Fig. 4 (a) and Fig. 4 (b), the experiment that sample (A ') is carried out is described.
[0078] (first result of experiment)
First result of experiment that Fig. 8 (a) expression is carried out sample (A ').After just applying (+) pulse voltage, measured value changes to high resistance state from low resistance state.After applying negative (-) pulse voltage, measured value changes to low resistance state from high resistance state.This shows,, increase or reduce according to the pulse voltage that is applied in from the resistance value (resistance value of state variation material 2) of upper electrode 1 on the direction that lower electrode 3 extends.
[0079] (second result of experiment)
Second result of experiment that Fig. 8 (b) expression is carried out sample (A ').Even after applying negative (-) pulse voltage, measured value also remains high resistance state, and is not changed to low resistance state.This shows,, always be in high resistance state from the resistance value of lower electrode 3 on the direction that upper electrode 1 extends, irrelevant with the pulse voltage that is applied in.
[0080] (the 3rd result of experiment)
Below, the 3rd result of experiment that sample (A ') is carried out is described.Applying the I-E characteristic that determines after (+) pulse voltage just, be the appearance shown in Fig. 4 (b); Apply the I-E characteristic that determines after negative (-) pulse voltage, be the appearance shown in Fig. 4 (a).
[0081] (experiment that sample (B ') is carried out)
With reference to Fig. 8 (a), Fig. 8 (b), Fig. 5 (a) and Fig. 5 (b), the result of experiment that sample (B ') is carried out is described.
[0082] (first result of experiment)
First result of experiment that sample (B ') is carried out is the appearance shown in Fig. 8 (b).This shows,, always be in high resistance state from the resistance value of upper electrode 1 on the direction that lower electrode 3 extends, irrelevant with the pulse voltage that is applied in.
[0083] (second result of experiment)
Second result of experiment that sample (B ') is carried out is the appearance shown in Fig. 8 (a).This shows,, increase or reduce according to the pulse voltage that is applied in from the resistance value of lower electrode 3 on the direction that upper electrode 1 extends.
[0084] (the 3rd result of experiment)
Below, the 3rd result of experiment that sample (B ') is carried out is described.Applying the I-E characteristic that determines after (+) pulse voltage just, be the appearance shown in Fig. 5 (b); Apply the I-E characteristic that determines after negative (-) pulse voltage, be the appearance shown in Fig. 5 (a).
[0085] (experiment that sample (C ') is carried out)
(first and second result of experiment)
Fig. 9 represents first and second result of experiment that sample (C ') is carried out.This shows, to the resistance value on the direction that lower electrode 3 extends with from the resistance value of lower electrode 3 on the direction that upper electrode 1 extends, all increase or reduce according to the pulse voltage that is applied in from upper electrode 1.
[0086] (the 3rd result of experiment)
Below, the 3rd result of experiment that sample (C ') is carried out is described.Applying the I-E characteristic that determines after (+) pulse voltage just, be the appearance shown in Fig. 7 (b); Apply the I-E characteristic that determines after negative (-) pulse voltage, be the appearance shown in Fig. 7 (a).
[0087] (summary)
In other words, by the experimental result that sample (A ') is carried out to sample (C ') as seen, state variation material 2 has following characteristic.
One, with the direction of extending to the bigger electrode of work function from the less electrode of work function be positive direction, being reciprocal diode characteristic to the direction that the less electrode of work function extends from the bigger electrode of work function.
Two, the characteristic (variable resistance characteristics) that increases or reduce according to the pulse voltage that is applied in of the resistance value on the positive direction.Describe in detail, applied under the situation of pulse voltage in the mode that becomes positive pole (+) with upper electrode 1 relative lower electrode 3, the resistance value of state variation material 2 on positive direction increases; Applied under the situation of pulse voltage in the mode that becomes negative pole (-) with upper electrode 1 relative lower electrode 3, the resistance value of state variation material 2 on positive direction reduces.
[0088] by above-mentioned to sample (sample (A) to (C) and sample (A ') to sample (C ')) experimental result of carrying out as seen, state variation material 2 has following characteristic.
One, under the different mutually situation of the work function of the work function of upper electrode 1 and lower electrode 3, with the direction (first direction) of extending to another electrode from an electrode be positive direction, with second direction (with described first party in the opposite direction) be reciprocal diode characteristic.
Two, under the situation that has applied predetermined pulse voltage, the characteristic (variable resistance characteristics) that the resistance value of diode characteristic on positive direction increases or reduce.
[0089] in addition, also confirmed following thing, that is: about being used for making the pulse voltage of resistance change, the pulse duration of the pulse voltage of first embodiment (50nsec), narrower than the pulse duration (more than the 1 μ sec) of the pulse voltage of conventional example.
[0090] because confirmed above-mentioned characteristic, thus with the different mutually two kinds of materials of work function as upper electrode shown in Figure 11 and lower electrode 3, made electronic component.
[0091] (second embodiment)
For realize the having above-mentioned characteristic state variation material of (variable resistance characteristics and diode characteristic), constituted electronic component shown in Figure 1 with the uneven state variation material 2 of crystallinity.The following describes its reason.
[0092] (crystallinity of state variation material 2)
(the first formation method of state variation material)
The temperature of the crystallization temperature that the temperature that will be formed with the substrate 4 of lower electrode 3 is elevated to state variation material 2 approaching is (for example at CuFe
2O
4Situation under, be made as about about 600 ℃), formed state variation material 2.State variation material 2 to such formation carries out X-ray diffraction analysis, investigates the distortion of crystalline texture.It found that state variation material 2 has sharp-pointed diffraction maximum (diffraction maximum that intensity is big) on the position of expression lattice plane space D.In other words, by The above results as seen, the crystallinity of state variation material 2 on film thickness direction of Xing Chenging is very even basically like this.
[0093] (the second formation method of state variation material)
Under the state of the temperature of the crystallization temperature that the temperature of the substrate 4 that will not be formed with lower electrode 3 is elevated to state variation material 2 approaching, formed state variation material 2.State variation material 2 to such formation carries out X-ray diffraction analysis, has investigated the distortion of crystalline texture.It found that, the interplanar distance of the crystalline texture of this state variation material 2 has deviation (this state variation material 2 has the diffraction maximum of the less and wider width of intensity).In other words, by The above results as seen, the distortion of the state variation material 2 of Xing Chenging with crystalline texture like this.
[0094] (the 3rd formation method of state variation material)
So, under about 600 ℃ of states that reduce gradually, form state variation material 2 in the temperature that makes the substrate 4 that is formed with lower electrode 3, on state variation material 2, formed upper electrode 1 again.With transmission electron microscope the state variation material 2 of such formation has been carried out electron diffraction analysis.Consequently, in state variation material 2, be positioned near the part the lower electrode 3, observed crystallinity good electron diffraction pattern (speckle pattern) with certain cycle, and in state variation material 2, be positioned near the upper electrode 1 part, observed the electronogram (milky spot (halo pattern)) of crystallinity bad (being similar to amorphous state).In other words, be arranged near the part the lower electrode 3 in state variation material 2, the numerical value of lattice plane spacing is roughly even, the distortion that this part is in crystalline texture seldom, the crystallinity good state.On the other hand, be arranged near the part the upper electrode 1 in state variation material 2, the distribution of comparing the lattice plane spacing with near the part the lower electrode 3 more has deviation, and as seen this part is in the distortion state a lot, that crystallinity is bad of crystalline texture.
[0095] with transmission electron microscope described state variation material 2 is carried out cross section TEM (transmission electron microscope) and observed, measured the grain size number of state variation material 2.Its result shows, is positioned near the grain size number of the part the lower electrode 3 in the state variation material 2, has the above value of twice of the grain size number that is positioned near the part the upper electrode 1 in the state variation material 2.Like this, confirmed following thing, that is: compared with near the part that is positioned at the upper electrode 1 in the state variation material 2, the crystallinity that is positioned near the part the lower electrode 3 in the state variation material 2 is more good.
[0096] as seen by foregoing, if allowing the temperature of the substrate 4 that is formed with lower electrode 3 under about 600 ℃ of states that reduce gradually, form state variation material 2, just can form near the lower electrode 3 crystallinity good and near the crystallinity upper electrode 1 is bad, the uneven state variation material 2 of crystallinity (crystalline uniformity lower gradually to upper electrode 1 state variation material 2) in other words, from lower electrode 3.
[0097] (experiment that sample (D) is carried out)
On lower electrode 3, form state variation material 2 according to above-mentioned " the 3rd formation method of state variation material ", on state variation material 2, form upper electrode 1 again, made sample (D) like this.
[0098] (sample (D))
Upper electrode 1: platinum (the about 0.2 μ m of thickness, work function 5.7eV)
State variation material 2:CuFe
2O
4(the about 0.1 μ m of thickness)
Lower electrode 3: platinum (the about 0.2 μ m of thickness, work function 5.7eV)
Remark additionally, after forming sample (D), on sample (D), apply pulse voltage (magnitude of voltage+3V, pulse duration 10 μ sec) by the mode that becomes positive pole (+) with upper electrode 1 relative lower electrode 3, the resistance value of sample (D) is initialized as 1/10th resistance value of the resistance value (about 1M Ω) that slightly is slightly less than after just forming.
[0099] (first to the 3rd experiment)
Sample (D) has been carried out the experiment the same with first embodiment (first to the 3rd experiment).These result of experiment are with the experimental result the same (with reference to Fig. 3 (a), Fig. 3 (b), Fig. 4 (a) and Fig. 4 (b)) of the sample (A) of first embodiment.By the experimental result that sample (D) is carried out as seen, state variation material 2 has following characteristic.
One, is positive direction, is reciprocal diode characteristic with the direction of extending to the good zone of crystallinity with the direction of extending to the bad zone of crystallinity from the good zone of crystallinity from the bad zone of crystallinity.
Two, the characteristic (variable resistance characteristics) that increases or reduce according to the pulse voltage that is applied in of the resistance value on the positive direction.Describe in detail, applied under the situation of pulse voltage in the mode that becomes positive pole (+) with upper electrode 1 relative lower electrode 3, the resistance value of state variation material 2 on positive direction reduces; Applied under the situation of pulse voltage in the mode that becomes negative pole (-) with upper electrode 1 relative lower electrode 3, the resistance value of state variation material 2 on positive direction increases.
[0100] this case inventor has also prepared by after forming this sample (D), the mode that becomes negative pole (-) with upper electrode 1 relative lower electrode 3 applies pulse voltage (magnitude of voltage-3V, pulse duration 10 μ sec), the resistance value of sample (D) is initialized as 1/10th resistance value of the resistance value (about 1M Ω) that slightly is slightly less than after just forming and the sample (D) that obtains (this sample (D) is called sample (D ')).
[0101] sample (D ') has been carried out the experiment the same with the experiment that sample (D) is carried out (first to the 3rd experiment).
[0102] (experiment that sample (D ') is carried out)
First result of experiment to sample (D ') carries out is the appearance shown in Fig. 8 (a); Second result of experiment to sample (D ') carries out is the appearance shown in Fig. 8 (b).In addition, also confirmed following thing, that is: the 3rd result of experiment (I-E characteristic) that sample (D ') is carried out is to be the appearance shown in Fig. 4 (b) after (+) pulse voltage just applying, and is the appearance shown in Fig. 4 (a) after applying negative (-) pulse voltage.By the experimental result that sample (D ') is carried out as seen, state variation material 2 has following characteristic.
One, is positive direction, is reciprocal diode characteristic with the direction of extending to the good zone of crystallinity with the direction of extending to the bad zone of crystallinity from the good zone of crystallinity from the bad zone of crystallinity.
Two, the characteristic (variable resistance characteristics) that increases or reduce according to the pulse voltage that is applied in of the resistance value on the positive direction.Describe in detail, applied under the situation of pulse voltage in the mode that becomes positive pole (+) with upper electrode 1 relative lower electrode 3, the resistance value of state variation material 2 on positive direction increases; Applied under the situation of pulse voltage in the mode that becomes negative pole (-) with upper electrode 1 relative lower electrode 3, the resistance value of state variation material 2 on positive direction reduces.
[0103] by above-mentioned to sample (sample (D) and sample (D ')) experimental result of carrying out as seen, state variation material 2 has following characteristic.
One, under the uneven situation of the crystallinity of state variation material 2, with the direction (first direction) of extending to another electrode from an electrode be positive direction, with second direction (with described first party in the opposite direction) be reciprocal diode characteristic.
Two, under the situation that has applied predetermined pulse voltage, the characteristic (variable resistance characteristics) that the resistance value of diode characteristic on positive direction increases or reduce.
[0104] in addition, also confirmed following thing, that is: about the pulse voltage that for a change resistance value applied, the pulse duration of the pulse voltage of present embodiment (50nsec), narrower than the pulse duration (more than the 1 μ sec) of the pulse voltage of conventional example.
[0105] because confirmed above-mentioned characteristic, so constituted electronic component shown in Figure 1 with the uneven state variation material 2 of crystallinity.
[0106] represented that in first and second embodiment with the metal oxide materials with spinel structure be CuFe
2O
4Example as state variation material 2.This case inventor also confirmed other metal oxide materials with spinel structure, be added the ferroelectric oxide of the metal with ilmenite structure and had a perovskite structure CMR (super giant magnetoresistance) material or high temperature superconducting materia also all have same characteristic.Particularly, this case inventor has confirmed CoFe
2O
4, NiCr
2O
4, Fe
3O
4, Cr-SrTiO
3, Sr-LiNbO
3, Mg-LiNbO
3, Pr
(1-X)Ca
XMnO
3, LaSrMnO
3, and GdBaCo
XO
YSame characteristic is also all arranged.
[0107] also can be such, with the material of other electrode materials as upper electrode 1 and lower electrode 3.
(first example)
(definition of circuit symbol)
The related electronic component of first example of the present invention is described.Remark additionally, the circuit symbol of the electronic component that will use in this example is defined as appearance shown in Figure 10.In electronic component shown in Figure 10 102, applied under the situation of pulse voltage in the mode that becomes positive pole (+) with the relative terminal 101-2 of terminal 101-1, the resistance value of electronic component 102 reduces; Applied under the situation of pulse voltage in the mode that becomes negative pole (-) with the relative terminal 101-2 of terminal 101-1, the resistance value of electronic component 102 increases.Electronic component 102 shown in Figure 10 has with the direction of extending to terminal 101-2 from terminal 101-1 for " positive direction ", with the direction of extending to terminal 101-1 from the terminal 101-2 diode characteristic for " in the other direction ".
[0108] (work)
Below, the working condition of electronic component shown in Figure 10 102 is described.At this, electronic component 102 is used as memory, carries out the processing of one digit number certificate.Remark additionally, the resistance value (resistance value of state variation material 2) that is assumed to be electronic component 102 has been initialized to high resistance state.Logical value when the resistance value of also supposing electronic component 102 is in " high resistance state " is " 0 "; Logical value when the resistance value of electronic component 102 is in " low resistance state " is " 1 ".
[0109] (storage)
Will be with the one digit number of expression " 1 " according to being written under the situation in the electronic component 102, allow terminal 101-2 ground connection, on terminal 101-1, apply storage voltage.This storage voltage for example is the pulse voltage (just (+) pulse voltage) of magnitude of voltage+3V, pulse duration 50nsec.Because on electronic component 102, applied just (+) pulse voltage, so the resistance value of electronic component 102 (resistance value of state variation material) changes to low resistance state.The one digit number that to represent " 1 " like this is according to being stored in the electronic component 102.
[0110] (resets)
Reset in the store status that will make electronic component 102 under the situation of initial condition, allow terminal 101-2 ground connection, on terminal 101-1, apply resetting voltage.This resetting voltage for example is the pulse voltage (negative (-) pulse voltage) of magnitude of voltage-3V, pulse duration 50nsec.Because on electronic component 102, applied negative (-) pulse voltage, so the resistance value of electronic component 102 is got back to high resistance state.Make the store status of electronic component 102 get back to initial condition like this.
[0111] (regeneration)
Allow terminal 101-2 ground connection, on terminal 101-1, apply regenerative voltage.This regenerative voltage for example is the voltage of magnitude of voltage+0.5V.Because on electronic component 102, applied regenerative voltage (=just (+) measure voltage),, flow to terminal 101-2 (positive direction) from terminal 101-1 so have the electric current of the current value that the resistance value according to electronic component 102 determines.At this, if the electric current that hypothesis flows when the resistance value of electronic component 102 is in " high resistance state " is corresponding to " 0 ", and the electric current that flows when the resistance value at electronic component 102 is in " low resistance state " is corresponding to " 1 ", the one digit number certificate in the electronic component 102 of flowing that just meaning has regenerated and be stored in of above-mentioned electric current.
[0112] as mentioned above, can be with electronic component 102 as memory.
[0113] (effect)
As mentioned above because electronic component has " diode characteristic ", so can be under the state that does not use diode element especially the direction of rated current.And this electronic component has " variable resistance characteristics ", thereby can be with this electronic component for example as 1D1R formula non-volatile memory device.Using under the situation of this electronic component like this, do not need to be provided with diode.Therefore, compare, manufacturing process can be made as simpler operation with the structure of existing 1D1R formula non-volatile memory device.
[0114] because diode is not set in electronic component, so it is unrestricted to be applied to the polarity of the pulse voltage on the variable-resistance material.Therefore, no matter be pulse voltage of just (+) polarity or the pulse voltage of negative (-) polarity, can both be applied on the state variation material.In such pulse applying method (utilizing the polarity of pulse voltage to make the method for resistance change), compare with existing pulse applying method (making the method for the resistance change of variable-resistance material by the pulse duration of adjusting pulse voltage), the pulse duration of the pulse voltage that is applied narrower (in this example, being 50nsec).In other words, can shorten to the storage or the required time that resets.
[0115] in this example, even when which kind of material in the following material is used as the state variation material 2 of electronic component 102, also can both obtain above-mentioned effect, described material is: the CuFe with spinel structure
2O
4, CoFe
2O
4, NiCr
2O
4Or Fe
3O
4, be added the ferroelectric oxide of metal, and had CMR (super giant magnetoresistance) material of perovskite structure or high temperature superconducting materia or the like with ilmenite structure.Particularly, even use Cr-SrTiO
3, Sr-LiNbO
3, Mg-LiNbO
3, Pr
(1-X)Ca
XMnO
3, LaSrMnO
3, GdBaCo
XO
YDeng material, also can access above-mentioned effect.
[0116] in CMOS (complementary metal oxide semiconductors (CMOS)) operation, the temperature when preferably forming film is below 450 ℃, with damage of preventing to cause owing to high temperature etc.In order to form the film of the material with perovskite structure, need establish underlayer temperature usually is more than 700 ℃.On the other hand, in order to form the film of material with spinel structure, a underlayer temperature offer have 400 ℃ just enough.Therefore, by using the material with spinel structure as state variation material 2 shown in Figure 1, the temperature that can establish when forming film is lower temperature.Like this, compare with the material with perovskite structure, the material with spinel structure is more suitable for semiconductor process.
[0117] in general, high temperature superconducting materia and CMR material are to comprise oxide alkali metal or alkaline-earth metal or that comprise alkalies and alkaline earth.Forming with such material under the situation of electronic component shown in Figure 1, being included in alkali metal in the described material or alkaline-earth metal or alkalies and alkaline earth can be dissolved out in the cleaning process of semiconductor process, thereby the characteristic degradation as memory element of electronic component.In order to prevent the deterioration of this characteristic, preferably with not comprising that the material of alkalies and alkaline earth is as state variation material 2.
[0118] in this example, utilizing mutual different two states is that high resistance state and low resistance state store the one digit number certificate, makes electronic component carry out the work of memory.Also can be such, that is: by changing the width and the amplitude of electric pulse, utilize four kinds or more kinds of resistance states, make electronic component store the work of described four kinds or more kinds of resistance states as the non-volatile memory device of the information more than two or three.
(second example)
(overall structure)
Figure 11 represents the overall structure of the storage device 200 that second example of the present invention is related.This storage device 200 comprises: memory array 201, and address buffer 202, control part 203, row decoder 204 drives word line device 205, column decoder 206, and drive bit line device 207.
[0119] in memory array 201, be provided with word line W1 and W2, bit line B1 and B2, and memory cell MC211 is to MC222.Memory cell MC211 each memory cell in the MC222 is an electronic component 102 shown in Figure 10.The end of memory cell MC211 is connected on the word line W1; The other end of memory cell MC211 is connected bit line B1 and goes up (positive direction: W1 → B1).The end of memory cell MC212 is connected on the word line W2; The other end of memory cell MC212 is connected bit line B1 and goes up (positive direction: W2 → B1).The end of memory cell MC221 is connected on the word line W1; The other end of memory cell MC221 is connected bit line B2 and goes up (positive direction: W1 → B2).The end of memory cell MC222 is connected on the word line W2; The other end of memory cell MC222 is connected bit line B2 and goes up (positive direction: W2 → B2).
[0120] address buffer 202, are transfused to the address signal ADDRESS from the outside, again to row decoder 204 output row address signal ROW, and to column decoder 206 output column address signal COLUMN.The address of address signal ADDRESS, expression memory cell MC211 memory cell in the MC222, that select.Row address signal ROW, the row address in the address of representing to represent by address signal ADDRESS.Column address signal COLUMN, the column address in the address of representing to represent by address signal ADDRESS.
[0121] control part 203, become a kind of pattern in memory module, reset mode and the regeneration mode according to the mode select signal MODE from the outside.In memory module, control part 203 is pointed out the control signal CONT of " applying of storage voltage " according to the input data Din from the outside to driving word line device 205 and driving 207 outputs of bit line device.In regeneration mode, control part 203 is pointed out the control signal CONT of " applying of regenerative voltage " to driving word line device 205 and driving 207 outputs of bit line device.In regeneration mode, control part 203 is to the signal I of outside output expression according to next self-driven bit line device 207
READAnd the dateout Dout of the place value of decision.Signal I
READThe current value of the electric current of bit line B1 or B2 is flow through in expression.In reset mode, control part 203 is confirmed the store status of memory cell MC211 to MC222, points out the control signal CONT of " applying of resetting voltage " according to this store status to driving word line device 205 and driving 207 outputs of bit line device again.
[0122] row decoder 204, according to the row address signal ROW from address buffer 202, select a word line among word line W1 and the W2.
[0123] drives word line device 205, when having received the control signal CONT that points out " applying of storage voltage " from control part 203, apply storage voltage V1 at the word line of selecting by row decoder 204
WRITEDrive word line device 205, when having received the control signal CONT that points out " applying of regenerative voltage " from control part 203, apply regenerative voltage V1 at the word line of selecting by row decoder 204
READDrive word line device 205, when having received the control signal CONT that points out " applying of resetting voltage " from control part 203, apply resetting voltage V1 at the word line of selecting by row decoder 204
RESET
[0124] column decoder 206, select a bit lines among bit line B1 and the B2 according to the column address signal COLUMN from address buffer 202.
[0125] drives bit line device 207 and when having received the control signal CONT that points out " applying of storage voltage " from control part 203, apply storage voltage V2 at the bit line of selecting by column decoder 206
WRITEDrive bit line device 207 and when having received the control signal CONT that points out " applying of regenerative voltage " from control part 203, apply regenerative voltage V2 at the bit line of not selecting by column decoder 206
READ, flow through the signal I of current value of the electric current of bit line B1 or B2 then to control part 203 output expression
READDrive bit line device 207 and when having received the control signal CONT that points out " applying of resetting voltage " from control part 203, apply resetting voltage V2 at the bit line of selecting by column decoder 206
RESET
[0126] remarks additionally storage voltage V1
WRITE, for example be the pulse voltage of magnitude of voltage+1.5V, pulse duration 50nsec; Storage voltage V2
WRITE, for example be the pulse voltage of magnitude of voltage-1.5V, pulse duration 50nsec.At this, storage voltage V1
WRITEWith storage voltage V2
WRITEBetween potential difference be 3V.
[0127] regenerative voltage V1
READWith regenerative voltage V2
READ, for example be that magnitude of voltage is+voltage of 0.5V.At this, regenerative voltage V1
READWith regenerative voltage V2
READEquate.
[0128] resetting voltage V1
RESET, for example be the pulse voltage of magnitude of voltage-1.5V, pulse duration 50nsec; Resetting voltage V2
RESET, for example be the pulse voltage of magnitude of voltage+1.5V, pulse duration 50nsec.At this, resetting voltage V1
RESETWith resetting voltage V2
RESETBetween potential difference be 3V.
[0129] (work)
Below, the working condition of storage device shown in Figure 11 200 is described.The mode of operation of storage device 200 comprises: will import data Din and be written in memory module in the memory cell, allow and be written in the reset mode that the information in the memory cell resets, and the regeneration mode that has been written in the information in the memory cell as dateout Dout output (regeneration).At this, suppose that memory cell MC211 has been initialized to high resistance state to MC222.Suppose that address signal ADDRESS represents the address of memory cell MC211.
[0130] (memory module)
Working condition when at first, memory module being described.
[0131] when input data Din represents " 1 ", control part 203 is pointed out the control signal CONT of " applying of storage voltage " to driving word line device 205 and driving 207 outputs of bit line device.When input data Din represented " 0 ", control part 203 was not exported control signal CONT.
[0132] when having received the control signal CONT that points out " applying of storage voltage " from control part 203, drives bit line device 207 and on the bit line B1 that selects by column decoder 206, apply storage voltage V2
WRITE, allow other bit lines B2 (bit line that is not selected) ground connection.
[0133] when having received the control signal CONT that points out " applying of storage voltage " from control part 203, drives word line device 205 and on the word line W1 that selects by row decoder 204, apply storage voltage V1
WRITE, allow other word lines W2 (word line that is not selected) ground connection.
[0134] because memory cell MC211 has been applied in the pulse voltage (just (+) pulse voltage) of magnitude of voltage+3V, pulse duration 50nsec, so the resistance change of memory cell MC211 is to low resistance state.
[0135] though memory cell MC212 has been applied in the pulse voltage (negative (-) pulse voltage) of magnitude of voltage-1.5V, pulse duration 50nsec, but because the magnitude of voltage of the pulse voltage that is applied in does not reach specified level (at this, be " 3V "), so the resistance states of memory cell MC212 does not change.
[0136] though memory cell MC221 has been applied in the pulse voltage (just (+) pulse voltage) of magnitude of voltage+1.5V, pulse duration 50nsec, but because the magnitude of voltage of the pulse voltage that is applied in does not reach specified level (at this, be "+3V "), so the resistance states of memory cell MC221 does not change.
[0137] because the potential difference between the two ends of memory cell MC222 is 0V, so the resistance states of memory cell MC222 does not change.
[0138] like this, because only there is the resistance states of memory cell MC211 to be changed to " low resistance state ", so the one digit number of expression " 1 " is according to just being written among the memory cell MC211.
[0139] then, after work among the memory cell MC211 that data are written in was finished, new address signal ADDRESS was transfused in address buffer 202, and the work of above-mentioned memory module is carried out repeatedly.
[0140] (regeneration mode)
Below, the working condition when regeneration mode is described.
[0141] control part 203, point out the control signal CONT of " applying of regenerative voltage " to driving word line device 205 and driving 207 outputs of bit line device.
[0142] then, when having received the control signal CONT that points out " applying of regenerative voltage " from control part 203, drive bit line device 207 and on the bit line B2 that does not select, apply regenerative voltage V2 by column decoder 206
READ, allow other bit line B1 (bit line that is selected) ground connection.
[0143] when having received the control signal CONT that points out " applying of regenerative voltage " from control part 203, drives word line device 205 and on the word line W1 that selects by row decoder 204, apply regenerative voltage V1
READ, allow other word lines W2 (word line that is not selected) ground connection.
[0144] measures voltage because memory cell MC211 just has been applied in (+), flow through memory cell MC211, flow out to again among the bit line B1 so have the electric current of the current value that the resistance value according to memory cell MC211 determines.
[0145] because the potential difference between the two ends of memory cell MC212 is 0V, so there is not electric current to flow through memory cell MC212.Because in memory cell MC212, be " in the other direction " from bit line B1 to the direction that word line W2 extends, can not flow among the word line W2 so flow through the electric current of bit line B1.
[0146] because the potential difference between the two ends of memory cell MC221 is 0V, so there is not electric current to flow through memory cell MC221.
[0147] because being applied in negative (-), memory cell MC222 measures voltage, so there is not electric current to flow through memory cell MC222.
[0148] then, drive the current value that bit line device 207 is measured the electric current that flows through bit line B1 or B2, again the signal I of the current value that determines to control part 203 output expressions
READAfterwards, control part 203 is exported according to signal I to the outside
READRepresented current value and the dateout Dout that determines.For example, if this current value that determines is the current value of the electric current that flows when low resistance state, the dateout Dout of control part 203 output expressions " 1 ".
[0149] like this, because electric current only flows through memory cell MC211, the electric current that flows through memory cell MC211 flows out among the bit line B1, so one digit number is according to being read out from memory cell MC211.
[0150] after the work of sense data from memory cell MC211 is finished, new address signal ADDRESS is transfused in address buffer 202, and the work of above-mentioned regeneration mode is carried out repeatedly.
[0151] (reset mode)
Below, the working condition when reset mode is described.
[0152] control part 203, by carrying out the treatment step of regeneration mode, investigate the store status of memory cell MC211.
[0153] be judged as memory cell MC211 at control part 203 and store under the situation of bit data (memory cell MC211 is in low resistance state) of expression " 1 ", control part 203 is pointed out the control signal CONT of " applying of resetting voltage " to driving word line device 205 and driving 207 outputs of bit line device.Store at memory cell MC211 under the situation of bit data (memory cell MC211 is in high resistance state) of expression " 0 ", control part 203 is not exported control signal CONT.
[0154] then, when having received the control signal CONT that points out " applying of resetting voltage " from control part 203, drive bit line device 207 and on the bit line B1 that selects by column decoder 206, apply resetting voltage V2
RESET, allow other bit lines B2 (bit line that is not selected) ground connection.
[0155] when having received the control signal CONT that points out " applying of resetting voltage " from control part 203, drives word line device 205 and on the word line W1 that selects by row decoder 204, apply resetting voltage V1
RESET, allow other word lines W2 (word line that is not selected) ground connection.
[0156] because memory cell MC211 has been applied in the pulse voltage (negative (-) pulse voltage) of magnitude of voltage-3V, pulse duration 50nsec, so the resistance change of memory cell MC211 is a high resistance state.
[0157] though memory cell MC212 has been applied in the pulse voltage (just (+) pulse voltage) of magnitude of voltage+1.5V, pulse duration 50nsec, but because the magnitude of voltage of the pulse voltage that is applied in does not reach specified level (at this, be "+3V "), so the resistance states of memory cell MC212 does not change.
[0158] though memory cell MC221 has been applied in the pulse voltage (negative (-) pulse voltage) of magnitude of voltage-1.5V, pulse duration 50nsec, but because the magnitude of voltage of the pulse voltage that is applied in does not reach specified level (at this, be " 3V "), so the resistance states of memory cell MC221 does not change.
[0159] because the potential difference between the two ends of memory cell MC222 is 0V, so the resistance states of memory cell MC222 does not change.
[0160] like this, because only there is the resistance states of memory cell MC211 to be changed to " high resistance state ", so the one digit number certificate that has been stored among the memory cell MC211 just resets.
[0161] after the work that resets of memory cell MC211 is finished, new address signal ADDRESS is transfused in address buffer 202, and the work of above-mentioned reset mode is carried out repeatedly.
[0162] (effect)
As mentioned above, because electronic component (memory cell) has " diode characteristic ", so there is not electric current to flow to other word lines from certain bar word line.Because can constitute storage device under the state that diode element is not set in addition, to make operation be simple operation so can make.
[0163] predetermined pulse voltage is applied on the electronic component of wanting store information, and this predetermined pulse voltage is not applied on other electronic components.Consequently, the resistance states of the electronic component of store information is changed.In other words, can select electronic component arbitrarily, with information storage in the electronic component that this is selected.
[0164] in wanting the electronic component of sense information, electric current flows along positive direction, and in other electronic components, does not have electric current to flow along positive direction.Therefore, can only read the electric current that flows through the electronic component of wanting sense information.In other words, can select electronic component arbitrarily, read the information that is stored in this electronic component of selecting.
[0165] only have four memory cell in Figure 11, the present invention is not limited to this.For example, also can the memory cell more than five be set to rectangular.
(the 3rd example)
(structure)
Figure 12 represents the related semiconductor integrated circuit of the 3rd example of the present invention (Embedded-RAM: 300 structure embedded random access memory).This circuit 300 comprises storage device shown in Figure 11 200 and logical circuit 301, is formed on the semiconductor chip.Storage device 200 shown in Figure 11 is used as data RAM (random access memory).Logical circuit 301 is the circuit that carry out regulation computing (for example, voice data or view data are encoded or deciphered), uses storage device 200 when this computing.Logical circuit 301 is controlled address signal ADDRESS and the mode select signal MODE that offers storage device 200, writes data in the storage device 200 or sense data from storage device 200.
[0166] (work)
Below, the working condition of semiconductor integrated circuit shown in Figure 12 (embedded random access memory) 300 is described.The work of circuit 300 comprises and writes processing, reads and handle and reset processing, and this writes and handles is that specified data (bit data) is written in processing in the storage device 200; This is read and handles is to read the processing that is written in the data in the storage device 200; This reset processing is to allow be written in the processing that the data in the storage device 200 reset.
[0167] (writes processing)
At first, illustrate and write processing.
[0168] for specified data (for example, the dynamic image data of having encoded etc.) is written in the storage device 200, logical circuit 301 is to the mode select signal MODE of the control part 203 output expressions " memory module " of storage device 200.
[0169] then, in order to select the memory cell that writes this specified data, logical circuit 301 is to the address buffer 202 of storage device 200 OPADD signal ADDRESS successively.Consequently, in storage device 200, the memory cell corresponding with address signal ADDRESS is selected successively.
[0170] then, logical circuit 301 as the mode of one digit number according to a position of Din output, is exported this specified datas to the control part 203 of storage device 200 with at every turn.
[0171] then, in storage device 200, carry out the same work of work with the memory module of second example.Consequently, this specified data is written in the storage device 200 in the mode that is written into a position at every turn.
[0172] (reads processing)
Below, illustrate and read processing.
[0173] in order to read the data that are written in the storage device 200, logical circuit 301 is to the mode select signal MODE of the control part 203 output expressions " regeneration mode " of storage device 200.
[0174] then, in order to select the memory cell of reading the data that write, logical circuit 301 is to the address buffer 202 of storage device 200 OPADD signal ADDRESS successively.Consequently, in storage device 200, the memory cell corresponding with address signal ADDRESS is selected successively.
[0175] then, in storage device 200, carry out the same work of work with the regeneration mode of second example.Consequently, be stored in the data in the storage device 200, be read out in the mode that at every turn is read out a position as dateout Dout.
[0176] (reset processing)
Below, reset processing is described.
[0177] in order to allow the data that are written in the storage device 200 reset, logical circuit 301 is to the mode select signal MODE of the control part 203 output expressions " reset mode " of storage device 200.
[0178] then, be stored in the memory cell that the data in the storage device 200 reset in order to select to allow, logical circuit 301 is to the address buffer 202 of storage device 200 OPADD signal ADDRESS successively.Consequently, in storage device 200, the memory cell corresponding with address signal ADDRESS is selected successively.
[0179] then, in storage device 200, carry out the same work of work with the reset mode of second example.Consequently, be stored in the data in the storage device 200, resetted in each mode of a position again.
[0180] (effect)
As mentioned above, a large amount of information can be stored in the storage device 200 apace.
(the 4th example)
(structure)
Figure 13 represents the related semiconductor integrated circuit of the 4th example of the present invention (reconfigurable LSI: 400 the structure restructural large scale integrated circuit).This circuit 400 comprises storage device shown in Figure 11 200, processor 401 and interface 402, is formed on the semiconductor chip.Storage device 200 shown in Figure 11 is used as program ROM (read-only memory), saves as the required program of work of processor 401.Processor 401 carries out work according to the program that is stored in the storage device 200, control store device 200 and interface 402.Interface 402 is exported the program that is transfused to from the outside successively to storage device 200.
[0181] (work)
Below, the working condition of semiconductor integrated circuit shown in Figure 13 (restructural large scale integrated circuit) 400 is described.The work of this circuit 400 comprises that the program re-writing of handling and will being stored in the storage device 200 according to the executive program of the program work that has stored is the rewriting program processing of other new procedures.
[0182] (executive program processing)
At first, the executive program processing is described.
[0183] in order to read the program that is stored in the storage device 200, processor 401 is to the mode select signal MODE of the control part 203 output expressions " regeneration mode " of storage device 200.
[0184] then, processor 401 is to the address buffer 202 of storage device 200 OPADD signal ADDRESS successively, and this address signal ADDRESS represents to write the memory cell of processor 401 needed programs.Consequently, in storage device 200, the memory cell corresponding with address signal ADDRESS is selected successively.
[0185] then, in storage device 200, carry out the same work of work with the regeneration mode of second example.Consequently, be stored in the program in the storage device 200, be read out in the mode that at every turn is read out a position as dateout Dout.
[0186] then, processor 401, the computing of stipulating according to the program of reading.
[0187] (rewriting program processing)
Below, the rewriting program processing is described.
[0188] in order to delete the program (becoming the program of the object of rewriting) that is stored in the storage device 200, processor 401 is to the mode select signal MODE of the control part 203 output expressions " reset mode " of storage device 200.
[0189] then, processor 401 is to the address buffer 202 of storage device 200 OPADD signal ADDRESS successively, and this address signal ADDRESS represents to have stored the position of memory cell of the program of the object that becomes rewriting.Consequently, in storage device 200, the memory cell corresponding with address signal ADDRESS is selected successively.
[0190] then, in storage device 200, carry out the same work of work with the reset mode of second example.Consequently, be stored in the program in the memory cell, resetted in each mode of a position again.
[0191] after the work that resets of memory cell is finished, processor 401 is to the mode select signal MODE of the control part 203 output expressions " memory module " of storage device 200, to write new procedures.
[0192] then, processor 401, to the address buffer 202 of storage device 200 OPADD signal ADDRESS successively, this address signal ADDRESS indicates to store the position of the memory cell of new procedures.Consequently, in storage device 200, the memory cell corresponding with address signal ADDRESS is selected successively.
[0193] then, processor 401 in the mode of a position of each output, is exported the new procedures that is provided from the outside by interface 402 to the control part 203 of storage device 200.In storage device 200, carry out the processing the same with the memory module of second example.Consequently, new procedures is stored in the storage device 200 in the mode that is stored a position at every turn.
[0194] like this, because storage device 200 is rewritable nonvolatile memories, so can rewrite the content of the program that has stored.In other words, the function that can replace processor 401 to be realized.And, also can work like this, that is: multiple program is stored in the storage device 200 function that replaces processor 401 to be realized according to the program of reading.
[0195] (effect)
As mentioned above, can in a large scale integrated circuit, realize different function (so-called restructural) mutually.
(the 5th example)
(structure)
Figure 14 represents the structure of the storage device 500 that the 5th example of the present invention is related.In this storage device 500, on substrate 501, be formed with lower electrode 502, on lower electrode 502, be formed with state variation material 503 and contact plunger 504, on state variation material 503, be formed with upper electrode 505-1 and 505-2.At this, use platinum (work function 5.7eV) as lower electrode 502; Constitute upper electrode 505-1 and 505-2 with silver (work function 4.3eV); Use CuFe
2O
4(thickness 0.1 μ m) is as state variation material 503.With aluminium (Al) as contact plunger 504.
[0196] (state variation material)
At this, when between upper electrode 505-1 shown in Figure 14 and lower electrode 502, applying predetermined pulse voltage, be positioned at the resistance change in the zone (state variation zone 503 α) under the upper electrode 505-1 in the state variation material 503.When between upper electrode 505-2 shown in Figure 14 and lower electrode 502, applying predetermined pulse voltage, be positioned at the resistance change in the zone (state variation zone 503 β) under the upper electrode 505-2 in the state variation material 503.
When [0197] just applying (+) measure voltage between upper electrode 505-1 shown in Figure 14 and lower electrode 502, the electric current with current value that the resistance value according to state variation zone 503 α determines is from contact plunger 504 diffluences.Measure voltage if between upper electrode 505-1 shown in Figure 14 and lower electrode 502, apply negative (-), just do not have electric current to flow.Equally, when just applying (+) measuring voltage between upper electrode 505-2 shown in Figure 14 and lower electrode 502, the electric current with current value that the resistance value according to state variation zone 503 β determines is from contact plunger 504 diffluences.Measure voltage if between upper electrode 505-2 shown in Figure 14 and lower electrode 502, apply negative (-), just do not have electric current to flow.
[0198] (equivalent electric circuit)
Figure 15 represents the equivalent electric circuit of storage device 500 shown in Figure 14.In Figure 15, word line W1 is corresponding to upper electrode 505-1; Word line W2 is corresponding to upper electrode 505-2; Lower electrode 502 and contact plunger 504 are corresponding to bit line B1.Memory cell MC511 is corresponding to state variation zone 503 α; Memory cell MC512 is corresponding to state variation zone 503 β.
[0199] (work)
Below, with reference to equivalent electric circuit shown in Figure 15, the working condition of storage device shown in Figure 14 500 is described.The work of storage device 500 shown in Figure 14 comprises memory module, reset mode and regeneration mode, and this memory module is stored in the one digit number certificate in the memory cell; This reset mode is to allow the one digit number certificate that is stored in the memory cell reset; This regeneration mode is that the one digit number certificate that is stored in the memory cell is regenerated.
[0200] (memory module)
At first, allow bit line B1 (lower electrode 502 and contact plunger 504) and word line W2 (upper electrode 505-2) ground connection, on word line W1 (upper electrode 505-1), apply storage voltage.This storage voltage for example is the pulse voltage of magnitude of voltage+3V, pulse duration 50nsec.Consequently, the resistance states of memory cell MC511 (state variation zone 503 α) changes to " low resistance state " from " high resistance state ".
[0201] (reset mode)
Allow bit line B1 and word line W2 ground connection, on word line W1, apply resetting voltage.This resetting voltage for example is the pulse voltage of magnitude of voltage-3V, pulse duration 50nsec.Consequently, the resistance states of memory cell MC511 changes to " high resistance state " from " low resistance state ".
[0202] (regeneration mode)
Allow bit line B1 and word line W2 ground connection, on word line W1, apply regenerative voltage.This regenerative voltage for example is the voltage of magnitude of voltage+0.5V.Consequently, the electric current with current value that the resistance states according to memory cell MC511 determines flows out from bit line B1.Because in memory cell MC512, be " in the other direction " from bit line B1 to the direction that word line W2 extends, so there is not electric current to flow to word line W2 (not having electric current to flow to upper electrode 505-2 through lower electrode 502) from upper electrode 505-1 from bit line B1.
[0203] (effect)
As mentioned above because the state variation material has " diode characteristic ", so can be under the state that does not form diode especially the direction of rated current.And, because the state variation material has " variable resistance characteristics ", so can be because of the state variation material for example as 1D1R formula Nonvolatile memory devices.Under the situation of such user mode change material, do not need to form diode, thereby compare with existing 1D1R formula Nonvolatile memory devices, can make and make operation and be simpler operation.
[0204] because do not form diode, so it is unrestricted to be applied to the polarity of the pulse voltage on the variable-resistance material.Therefore, no matter be pulse voltage of just (+) polarity or the pulse voltage of negative (-) polarity, can both be applied on the state variation material.In such pulse applying method (utilizing the polarity of pulse voltage to make the method for resistance change), compare with existing pulse applying method (making the method for the resistance change of variable-resistance material by the pulse duration of adjusting pulse voltage), the pulse duration of the pulse voltage that applies narrower (in this example, being 50nsec).In other words, can shorten to the storage or the required time that resets.
[0205] remark additionally, what illustrate in the example of this example is the work function of upper electrode 505-1 and 505-2 and the mutual different situation of the work function of lower electrode 502.Yet, self-evident, as described in second embodiment, even under the uneven situation of the crystallinity of state variation material 503, also can access same effect.
[0206] remarks additionally, at the state variation material described in this example is following state variation material, that is: the resistance states of state variation zone 503 α (503 β) changes to " low resistance state " when the mode that becomes positive pole (+) with lower electrode 502 relative upper electrode 505-1 (505-2) applies pulse voltage, and being the state variation material of " positive direction " from upper electrode 505-1 (505-2) to the direction of lower electrode 502 extensions.As described in first embodiment and second embodiment, also can there be following state variation material, that is: the resistance states of state variation zone 503 α (503 β) changes to " low resistance state " when the mode that becomes negative pole (-) with lower electrode 502 relative upper electrode 505-1 (505-2) applies pulse voltage, and with the direction of extending to lower electrode 502 the state variation material (for example, the sample among first embodiment (A ') etc. of " in the other direction ") from upper electrode 505-1 (505-2).Have at state variation material 503 under the situation of such characteristic, the equivalent electric circuit of storage device 500 shown in Figure 14 is appearance shown in Figure 16.In this case, just can obtain the same effect, that is: when memory module, on word line W1, apply the storage voltage of magnitude of voltage-3V, pulse duration 50nsec if do like this; When reset mode, on word line W1, apply the resetting voltage of magnitude of voltage+3V, pulse duration 50nsec; When regeneration mode, on word line W1, apply the regenerative voltage of magnitude of voltage-0.5V.
What [0207] illustrate in this example is the example that is formed with two upper electrodes.Even under the situation that is formed with the upper electrode more than three, also can access same effect.
(the 6th example)
(structure)
Figure 17 represents the structure of the storage device that the 6th example of the present invention is related.In this device, on bit line B1, B2, be formed with state variation thing 60-11,60-12,60-21 and 60-22, to 60-22, be formed with word line W1, W2 at state variation thing 60-11.Bit line B1, B2 extend parallel to each other; Word line W1, W2 extend parallel to each other.Bit line B1, B2 and word line W1, W2 cross one another, and are provided with the state variation thing in the position (crosspoint) of each described intersection.State variation thing 60-11 each state variation thing in the 60-22 is a state variation material 2 shown in Figure 1.Every word line among word line W1 and the W2 is equivalent to the upper electrode 1 among Fig. 1; Every bit lines among bit line B1 and the B2 is equivalent to the lower electrode 3 among Fig. 1.In described device, utilize the resistance variations of each the state variation thing of state variation thing 60-11 in the 60-22 one or more information are stored or to regenerate.
[0208] remarks additionally,, use silver (work function 4.3eV) as word line W1, W2 at this; With platinum (work function 5.7eV) as bit line B1, B2; Use CuFe
2O
4(thickness 0.1 μ m) as state variation thing 60-11 to 60-22.
[0209] (work)
Below, with reference to the working condition of equivalent electric circuit explanation shown in Figure 180 storage device shown in Figure 17.Remark additionally, state variation thing 60-11 is carried out the example of storing, resetting and regenerate in this explanation.Suppose that state variation thing 60-11 is set to " high resistance state " to the resistance states of 60-22.Remark additionally, the same with second example, for example set like this, that is: storage voltage V1
WRITE, for example be the pulse voltage of magnitude of voltage+1.5V, pulse duration 50nsec; Storage voltage V2
WRITE, for example be the pulse voltage of magnitude of voltage-1.5V, pulse duration 50nsec; Regenerative voltage V1
READWith regenerative voltage V2
READ, for example be that magnitude of voltage is+voltage of 0.5V; Resetting voltage V1
RESET, for example be the pulse voltage of magnitude of voltage-1.5V, pulse duration 50nsec; Resetting voltage V2
RESET, for example be the pulse voltage of magnitude of voltage+1.5V, pulse duration 50nsec.
[0210] (storage)
At first, with word line W1 that the state variation thing 60-11 that is process object is connected on apply storage voltage V1
WRITE, with bit line B1 that the state variation thing 60-11 that is process object is connected on apply storage voltage V2
WRITEAllow word line W2 and the bit line B2 ground connection that is not connected with state variation thing 60-11.
[0211] at this moment, because state variation thing 60-11 has been applied in the pulse voltage (just (+) pulse voltage) of magnitude of voltage+3V, pulse duration 50nsec, so the resistance states of state variation thing 60-11 is changed to low resistance state.
[0212] in each state variation thing of state variation thing 60-12,60-21 and 60-22 because be not applied in the pulse voltage that is enough to take place resistance variations (at this, for+3V), so resistance states does not change.
[0213] like this, because only there is the resistance states of state variation thing 60-11 to be changed to low resistance state, so the one digit number value of expression " 1 " is written among the state variation thing 60-11.
[0214] (resets)
With word line W1 that the state variation thing 60-11 that is process object is connected on apply resetting voltage V1
RESET, with bit line B1 that the state variation thing 60-11 that is process object is connected on apply resetting voltage V2
RESETAllow word line W2 and the bit line B2 ground connection that is not connected with state variation thing 60-11.
[0215] at this moment, because state variation thing 60-11 has been applied in the pulse voltage (negative (-) pulse voltage) of magnitude of voltage-3V, pulse duration 50nsec, so the resistance states of state variation thing 60-11 is changed to high resistance state.
[0216] in each state variation thing of state variation thing 60-12,60-21 and 60-22, because be not applied in the pulse voltage that is enough to take place resistance variations, resistance states does not change.
[0217] like this, because only there is the resistance states of state variation thing 60-11 to be changed to high resistance state, the one digit number value that is stored among the state variation thing 60-11 resets.
[0218] (regeneration mode)
With word line W1 that the state variation thing 60-11 that is process object is connected on apply regenerative voltage V1
READ, with on the bit line B2 that the state variation thing 60-11 that is process object is connected do not applying regenerative voltage V2
READAllow word line W2 that is not connected and the bit line B1 ground connection that is connected with state variation thing 60-11 with state variation thing 60-11.
[0219] at this moment, measure voltage because state variation thing 60-11 just has been applied in (+), flow through state variation thing 60-11 so have the electric current of the current value that the resistance value according to state variation thing 60-11 determines, this electric current flows out among the bit line B1.
[0220] because the potential difference between the two ends of state variation thing 60-12 is 0V, so there is not electric current to flow through state variation thing 60-12.And, in state variation thing 60-12, because be " in the other direction " to the direction that word line W2 extends, so the electric current that flows out among the bit line B1 through state variation thing 60-11 can not flow among the word line W2 from bit line B1.
[0221] because the potential difference between the two ends of state variation thing 60-21 is 0V, so there is not electric current to flow through state variation thing 60-21.
[0222] in state variation thing 60-22, measures voltage because be applied in negative (-), so there is not electric current to flow through state variation thing 60-22.
[0223] like this, because electric current only flows through state variation thing 60-11, this electric current flows out among the bit line B1, so one digit number is according to being read out from state variation thing 60-11.
[0224] (effect)
As mentioned above, because the state variation thing has diode characteristic, so, also do not have unnecessary electric current to flow through this adjacent unit even the resistance value of the unit adjacent with the unit that is process object is lower.Therefore, can pick out the resistance value of desirable unit.
[0225] storage device of present embodiment is individual layer, the storage device with two-dimensional structure, and the present invention is not limited to two-dimensional structure, also can be made as three-dimensional structure.In other words, in described example, the layer that constitutes by bit line B1, B2, the layer that constitutes to 60-22 by state variation thing 60-11 and layer formed a storage device by what word line W1, W2 constituted, if on the described layer that constitutes by word line W1, W2, form insulating barrier, just can on this insulating barrier, form new storage device.In addition, under the situation that does not form insulating barrier,, just can on the layer that constitutes by word line W1, W2, form new storage device also by managing to consider the method that applies regenerative voltage, storage voltage and resetting voltage accordingly.In this case, compare with the public table special table 2002-530850 communique of Japanese patent application storage device disclosed, that have three-dimensional structure, the structure of the storage device of present embodiment is simpler, thereby manufacturing process is simpler.Like this, just can realize the storage device that capacity is bigger.
[0226] in the present embodiment, in the crosspoint of word line W1, W2 and bit line B1, B2 intersection, formed the individual states changing matter.As shown in figure 19, in each crosspoint, be formed with under the situation of the memory cell that constitutes by upper electrode 1, state variation material 2 and lower electrode 3, also can access same effect.In this case, for example use copper (Cu) as word line W1, W2 and bit line B1, B2; For example use silver as upper electrode 1; For example use CuFe
2O
4As state variation material 2; For example use platinum as lower electrode 3.
[0227] also can be such, as shown in figure 20, between word line W1, W2 and bit line B1, B2, be formed with the state variation material 2 of film shape.In this case, zone (state variation zone) 60 α-11,60 α-12,60 α-21 and 60 α-22 that are positioned at each crosspoint carry out work as memory cell.
[0228] certain, can use the storage device of present embodiment as Figure 11, Figure 12 or memory array shown in Figure 13.
[0229] in the above description, as long as the pulse voltage that is applied satisfies defined terms, just can change the resistance states of described electronic component.Therefore, allow the pulse voltage that satisfies described condition be applied on the electronic component when storage and when resetting if be made as, and allow the voltage that does not satisfy described condition when regeneration, be applied on the electronic component, just can access same effect.In other words, what illustrate previously is, the resistance states of electronic component changes to the example of low resistance state from high resistance state when having applied the pulse voltage of magnitude of voltage+3V, pulse duration 50nsec, even the magnitude of voltage and the pulse duration of this pulse voltage are made as other numerical value, also can access same effect.
[0230] explanation to embodiment remarks additionally, and resistance variations is carried out normalization and the value (R/R0) that obtains not necessarily equates with value in the accompanying drawing.
-industrial applicibility-
[0231] storage device involved in the present invention is as carrying out low-power operation, high speed write Enter the very big nonvolatile memory of future generation of work and high speed deletion work and memory capacity etc., very Useful.
Claims (18)
1. storage device is characterized in that:
Comprise: first electrode layer, comprise many first electrode wires of extending parallel to each other,
The state variation layer is formed on described first electrode layer, and comprises a plurality of state variation portion that is made of the state variation material with diode characteristic and variable resistance characteristics, and
The second electrode lay is formed on the described state variation layer, and comprises many second electrode wires of extending parallel to each other;
Described many first electrode wires and described many second electrode wires clip described state variation layer and cross one another when stack direction is seen;
Each state variation portion in the described a plurality of state variation portion, when seeing, described stack direction is formed on the position of arbitrary intersection in described many first electrode wires arbitrary and described many second electrode wires, between this first electrode wires and this second electrode wires, and have with arbitrary from this first electrode wires and this second electrode wires direction to another extension as positive direction, with from this another to the direction of this extension as reciprocal diode characteristic, and have this state variation portion in the resistance value on the positive direction according to being applied in the variable resistance characteristics that the predetermined pulse voltage between this first electrode wires and this second electrode wires increases or reduces.
2. storage device according to claim 1 is characterized in that:
Also comprise a plurality of first electrodes and a plurality of second electrode and described a plurality of state variation portion correspondence;
Each first electrode in described a plurality of first electrode, between and this first electrode pair state variation portion of answering with and corresponding first electrode wires of this state variation portion between;
Each second electrode in described a plurality of second electrode, between and this second electrode pair state variation portion of answering with and corresponding second electrode wires of this state variation portion between;
Each state variation portion in the described a plurality of state variation portion, have with from pairing first electrode and second electrode any to the direction of another extension as positive direction, with from this another to the direction of this extension as reciprocal diode characteristic, and have this state variation portion in the resistance value on the positive direction according to being applied in the variable resistance characteristics that the predetermined pulse voltage between this first electrode and this second electrode increases or reduces.
3. storage device is characterized in that:
Comprise: first electrode layer, comprise many first electrode wires of extending parallel to each other,
The state variation layer is formed on described first electrode layer, and is made of the state variation material with diode characteristic and variable resistance characteristics, and
The second electrode lay is formed on the described state variation layer, and comprises many second electrode wires of extending parallel to each other;
Described many first electrode wires and described many second electrode wires clip described state variation layer and cross one another when stack direction is seen;
In described state variation layer, it is the state variation portion of the Variable Area between arbitrary that is clipped in in described many first electrode wires arbitrary and described many second electrode wires, have with arbitrary from this first electrode wires and this second electrode wires direction to another extension as positive direction, with from this another to the direction of this extension as reciprocal diode characteristic, and have this state variation portion in the resistance value on the positive direction according to being applied in the variable resistance characteristics that the predetermined pulse voltage between this first electrode wires and this second electrode wires increases or reduces.
4. according to claim 1 or 3 described storage devices, it is characterized in that:
The work function of every first electrode wires in described many first electrode wires is different with the work function of every second electrode wires in described many second electrode wires.
5. storage device according to claim 2 is characterized in that:
The work function of each first electrode in described a plurality of first electrode is different with the work function of each second electrode in described a plurality of second electrodes.
6. storage device according to claim 1 and 2 is characterized in that:
In each state variation portion of described a plurality of state variation portion, the crystallinity of state variation material is inhomogeneous.
7. storage device according to claim 3 is characterized in that:
In described state variation layer, the crystallinity of state variation material is inhomogeneous.
8. according to each the described storage device in the claim 1,2 and 3, it is characterized in that:
Also comprise:
The first drive electrode line portion, on described many first electrode wires, apply assigned voltage and
The second drive electrode line portion applies assigned voltage on described many second electrode wires.
9. storage device according to claim 8 is characterized in that:
Will be with information storage in any state variation portion of described a plurality of state variation portion the time, apply first pulse voltage on corresponding first electrode wires of the state variation portion with storing described information of the described first drive electrode line portion in described many first electrode wires;
Will be with information storage in any state variation portion of described a plurality of state variation portion the time, apply second pulse voltage on corresponding second electrode wires of the state variation portion with storing described information of the described second drive electrode line portion in described many second electrode wires.
10. storage device according to claim 8 is characterized in that:
During information in any the state variation portion that has been stored in described a plurality of state variation portion of will regenerating, apply regenerative voltage on corresponding first electrode wires of the state variation portion with reading described information of the described first drive electrode line portion in described many first electrode wires;
During information in any the state variation portion that has been stored in described a plurality of state variation portion of will regenerating, apply described regenerative voltage on not corresponding second electrode wires of the state variation portion with reading described information of the described second drive electrode line portion in described many second electrode wires.
11. a semiconductor integrated circuit is characterized in that:
Comprise: the described storage device of claim 8 and
Logical circuit, the computing of stipulating;
Described logical circuit has memory module and tupe, when described memory module bit data is stored in the described storage device, reads the bit data that is stored in the described storage device when described tupe.
12. a semiconductor integrated circuit is characterized in that:
Comprise: the described storage device of claim 8 and
Processor has executive program pattern and rewriting program pattern;
Described processor carries out work according to the program that is stored in the described storage device when described executive program pattern, the program re-writing that will be stored in the described storage device when described rewriting program pattern is other new procedures from the outside input.
13. each the described storage device according in the claim 1,2 and 3 is characterized in that:
Described state variation material is the metal oxide with spinel structure.
14. each the described storage device according in the claim 1,2 and 3 is characterized in that:
Described state variation material is the ferroelectric oxide that has been added metal.
15. storage device according to claim 14 is characterized in that:
Described ferroelectric oxide has ilmenite structure.
16. each the described storage device according in the claim 1,2 and 3 is characterized in that:
Described state variation material is the metal oxide with perovskite structure.
17. storage device according to claim 16 is characterized in that:
Described metal oxide is the material with at least a characteristic in super giant magnetoresistance characteristic and the high-temperature superconductor characteristic.
18. each the described storage device according in the claim 1,2 and 3 is characterized in that:
Described state variation material does not comprise alkali metal and alkaline-earth metal.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP125686/2005 | 2005-04-22 | ||
| JP2005125686 | 2005-04-22 | ||
| JP308627/2005 | 2005-10-24 |
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| Publication Number | Publication Date |
|---|---|
| CN101164167A true CN101164167A (en) | 2008-04-16 |
| CN100568506C CN100568506C (en) | 2009-12-09 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2005800495484A Expired - Fee Related CN101167138B (en) | 2005-04-22 | 2005-09-09 | Electronic element, storage device and semiconductor integrated circuit |
| CNB2006800135375A Expired - Fee Related CN100568506C (en) | 2005-04-22 | 2006-04-21 | Storage device and semiconductor integrated circuit |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2005800495484A Expired - Fee Related CN101167138B (en) | 2005-04-22 | 2005-09-09 | Electronic element, storage device and semiconductor integrated circuit |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7577022B2 (en) |
| EP (1) | EP1878022A1 (en) |
| KR (1) | KR101193395B1 (en) |
| CN (2) | CN101167138B (en) |
| TW (1) | TWI390530B (en) |
| WO (1) | WO2006114904A1 (en) |
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| CN109508303A (en) * | 2018-09-30 | 2019-03-22 | 中国科学院上海微***与信息技术研究所 | A kind of superconduction cache memory for parallel data storage |
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-
2005
- 2005-09-09 WO PCT/JP2005/017099 patent/WO2006114904A1/en not_active Application Discontinuation
- 2005-09-09 EP EP05783384A patent/EP1878022A1/en not_active Withdrawn
- 2005-09-09 CN CN2005800495484A patent/CN101167138B/en not_active Expired - Fee Related
- 2005-09-09 KR KR1020077027156A patent/KR101193395B1/en not_active IP Right Cessation
- 2005-09-09 US US11/918,983 patent/US7577022B2/en active Active
- 2005-10-26 TW TW094137455A patent/TWI390530B/en not_active IP Right Cessation
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2006
- 2006-04-21 CN CNB2006800135375A patent/CN100568506C/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102077296A (en) * | 2009-06-08 | 2011-05-25 | 松下电器产业株式会社 | Forming method for resistance-change non-volatile memory element, and resistance-change non-volatile memory device |
| CN102077296B (en) * | 2009-06-08 | 2014-04-02 | 松下电器产业株式会社 | Forming method for resistance-change non-volatile memory element, and resistance-change non-volatile memory device |
| WO2011091709A1 (en) * | 2010-01-28 | 2011-08-04 | 复旦大学 | Ferro-resistive random access memory (ferro-rram), operation method and manufacturing mehtod thereof |
| CN109508303A (en) * | 2018-09-30 | 2019-03-22 | 中国科学院上海微***与信息技术研究所 | A kind of superconduction cache memory for parallel data storage |
| CN109508303B (en) * | 2018-09-30 | 2022-12-23 | 中国科学院上海微***与信息技术研究所 | Superconducting cache memory for parallel data storage |
Also Published As
| Publication number | Publication date |
|---|---|
| US20090067215A1 (en) | 2009-03-12 |
| CN101167138B (en) | 2010-09-22 |
| CN100568506C (en) | 2009-12-09 |
| EP1878022A1 (en) | 2008-01-16 |
| CN101167138A (en) | 2008-04-23 |
| TW200638419A (en) | 2006-11-01 |
| WO2006114904A1 (en) | 2006-11-02 |
| TWI390530B (en) | 2013-03-21 |
| US7577022B2 (en) | 2009-08-18 |
| KR101193395B1 (en) | 2012-10-25 |
| KR20080005443A (en) | 2008-01-11 |
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