CN101086589A - Pixel structure of film transistor array substrate - Google Patents
Pixel structure of film transistor array substrate Download PDFInfo
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- CN101086589A CN101086589A CN 200610088770 CN200610088770A CN101086589A CN 101086589 A CN101086589 A CN 101086589A CN 200610088770 CN200610088770 CN 200610088770 CN 200610088770 A CN200610088770 A CN 200610088770A CN 101086589 A CN101086589 A CN 101086589A
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- film transistor
- thin
- transistor array
- plate
- array base
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Abstract
The pixel matrix of the thin film crystalline matrix base plate comprises a glass base plate with a first edge and a second edge, complex number parallel signal wire on the glass base plate, with any signal wire in an included angle with the first edge, the complex number scanning wires on the glass base and defined complex pixel units with the complex signal wire, with any of the signal wire in an included angle with the second edge. It slants the pixel to form an included angle with the glass base plate to avoid the LCD panel generating interference stride with the column lens matrix.
Description
Technical field
The invention provides a kind of pixel design of thin-film transistor array base-plate, particularly a kind of pixel design of improving the LCD interference fringe.
Background technology
For complying with large-scale liquid crystal display (LCD) development trend, backlight module with high video picture brightness, broad visual angle, harsh image contrast has become industrial community research and development main flow, see also shown in Figure 1, known liquid crystal display (LCD) comprises a display panels 11 and a backlight module 10, this backlight module 10 is mainly by diffusion sheet 12, light source 13, backboard 14, and the column lens array 15 that is arranged at 12 of display panels 11, diffusion sheet constitutes.The effect of column lens array 15 is refracted ray, makes distribution of light more even.Yet the column lens array 15 of level but produces interference point because of the systematicness striped with the pixel of the display panels 11 of rule, point connects to behind the line and then causes interference fringe (Moire), therefore, prior art as Fig. 2, adopt a kind of column lens array 16, use and eliminate the interference fringe that the systematicness striped is produced with gradient θ.In addition, produce, therefore have again and utilize the mist degree that increases Polarizer, to reduce the interference fringe phenomenon because interference fringe is easy to the module of supreme expansion design (that is mist degree reduction).Hence one can see that, and prior art is eliminated the mode of interference fringe, the problem that can cause the light shield cost to increase, moreover the mist degree of Polarizer improves the problem that causes the loss of module briliancy, and also can't eliminate fully for interference fringe.
Summary of the invention
Because prior art is for solving the defective that interference fringe causes cost to increase, one of the present invention purpose is to provide a kind of pixel design of LCD, do not increase the light shield cost and do not changing under the condition of aperture opening ratio (not reducing the module briliancy), utilizing the light shield that changes pattern of pixels can improve the bad phenomenon of LCD interference fringe.
Another object of the present invention is to provide a kind of pattern of pel array, the light shield that will comprise the pattern that the defines pixel angle that tilts when little shadow can be improved the display quality of LCD.
For reaching above-mentioned purpose, the technological means of implementing of the present invention is as follows:
A kind of pel array of thin-film transistor array base-plate comprises:
One glass substrate, it has one first length of side and one second length of side;
A plurality of signal line that are parallel to each other are positioned on this glass substrate, and wherein arbitrary this signal line and above-mentioned first length of side are an angle; And
A plurality of sweep traces that are parallel to each other are positioned on this glass substrate and with these a plurality of signal line and define a plurality of pixel cells, and wherein arbitrary this signal line and above-mentioned second length of side are an angle.
Description of drawings
Fig. 1 is the structural representation of prior art backlight module.
Fig. 2 is the synoptic diagram that the prior art column lens array cooperates with display panels.
Fig. 3 A, Fig. 3 B and Fig. 4 are the partial front synoptic diagram of preferred embodiment of the present invention.
Symbol description among the figure:
10 backlight modules
11 display panels
12 diffusion sheets
13 light sources
14 backboards
15,16 column lens array
21 thin-film transistor array base-plates
22 pixels
The length of side of 211 thin-film transistor array base-plates
The length of side of 221 pixels
θ, θ 1 angle
30 thin-film transistor array base-plates
32 signal line
34 sweep traces
36 capacitor storage beam
38 pixel electrodes
40 thin film transistor (TFT)s
First length of side of 301 thin-film transistor array base-plates
Second length of side of 302 thin-film transistor array base-plates
Embodiment
See also shown in Fig. 3 A front schematic view according to the pixel design preferred embodiment of a kind of LCD of the present invention.For a thin-film transistor array base-plate 21, each pixel cell 22, for example rectangular pixels, inverse clock changes, be a length of side 221 of pixel cell 22 and a length of side 211 of thin-film transistor array base-plate 21,, become an angle theta 1 less than 90 degree for example in vertical direction.In an embodiment, thin-film transistor array base-plate 21 also can be a color screen substrate (color filter substrate), produce the array of pixel cell 22 on it with light shield (not showing on the figure), each pixel cell 22 corresponding single colored light filter disc wherein, for example red, green or blue light filter disc.Secondly, the direction of angle theta 1 inclination is not limited to icon embodiment, but clockwise changes inclination, but also inverse clock changes, and the pixel design that can have angle with the horizontal direction or the vertical direction of glass substrate all can reach the purpose that the present invention designs such as.Moreover the factor of consideration display effect, angle theta 1 produce to avoid visual perceptible image distortion phenomenon approximately between 2 to 16 degree.Be noted that, the defined slanted pixel of spirit according to the present invention not only can be applied to the pel array of mosaic (Mosaic) form combination, also can be applicable to him and plant the pel array of form combination, pixel 22 that all can be using inclined as the pel array of the strip among Fig. 3 B (strip type) combination designs.
According to spirit of the present invention, the pattern when pixel is made in change can produce the pixel at angle of inclination.With reference to Fig. 4, as with in the example of thin-film transistor array base-plate 30 as display panels, pel array is formed along the sweep trace 34 that row (row) direction is parallel to each other with a plurality of along the signal line 32 that row (column) direction is parallel to each other by a plurality of, therefore defines a pixel cell by adjacent two signal line 32 with adjacent two sweep traces 34.When desiring to produce the pixel at angle of inclination, contraposition comprises the light shield and the thin-film transistor array base-plate 30 of signal line 32 patterns, the feasible signal line that is parallel to each other 32 has the angle that is not 0 or 180 multiples of spending with first length of side 301 of thin-film transistor array base-plate 30, this angle is preferably 2 to 16 degree between 0 to 90 degree.Moreover parallel scanning beams 34 has the angle that is not 0 or 180 multiples of spending with second length of side 302 of thin-film transistor array base-plate 30, and this angle is preferably 2 to 16 degree between 0 to 90 degree, and above-mentioned two angles are identical.Understandable, on this thin-film transistor array base-plate 30, except signal line 32 and sweep trace 34, still comprise other relevant structure or element, the capacitor storage beam (storagecapacitance line) 36 of for example simultaneously parallel signal line 32 and sweep trace 34, pixel electrode (pixel electrode) 38, thin film transistor (TFT) 40 etc., light shield to bit patterns also must be adjusted, so as to produce with conventional pixel in each identical structure, this pixel has an angle of inclination.
According to above-mentioned, a kind of pel array of thin-film transistor array base-plate comprises the glass substrate with one first length of side.A plurality of pixels are arranged on the glass substrate, the corresponding monochromatic filter disc of wherein arbitrary pixel, and first length of side of one second length of side of arbitrary pixel and glass substrate is an angle between 0 to 90 degree.
In sum, the pixel design of a kind of LCD of the present invention in not increasing the light shield cost and not changing under the condition of aperture opening ratio, can be improved the bad phenomenon of LCD interference fringe; The above, it only is preferred embodiment of the present invention, when can not with limit the scope of the invention, all equalizations of being done according to the present patent application claim change and modify, will not lose main idea of the present invention place, also do not break away from the spirit and scope of the present invention, the former capital should be considered as further enforcement situation of the present invention.
Claims (12)
1. the pel array of a thin-film transistor array base-plate comprises:
One glass substrate has one first length of side and one second length of side;
A plurality of signal line that are parallel to each other are positioned on this glass substrate, and wherein arbitrary this signal line and above-mentioned first length of side are an angle; And
A plurality of sweep traces that are parallel to each other are positioned on this glass substrate and with these a plurality of signal line and define a plurality of pixel cells, and wherein arbitrary this signal line and above-mentioned second length of side are an angle.
2. the pel array of thin-film transistor array base-plate as claimed in claim 1, wherein above-mentioned a plurality of sweep traces are vertical with above-mentioned a plurality of signal line.
3. the pel array of thin-film transistor array base-plate as claimed in claim 1, wherein this angle is not 0 degree.
4. the pel array of thin-film transistor array base-plate as claimed in claim 1, wherein this angle is not the multiples of 180 degree.
5. the pel array of thin-film transistor array base-plate as claimed in claim 1 comprises more that a capacitor storage beam is positioned on this glass substrate and partly overlapping with arbitrary this pixel cell.
6. the pel array of thin-film transistor array base-plate as claimed in claim 1, wherein the scope of this angle is between 2 to 16 degree.
7. the pel array of a thin-film transistor array base-plate comprises:
One glass substrate, it has one first length of side; And
A plurality of pixel cells are arranged on this glass substrate, corresponding monochromatic filter disc of wherein arbitrary this pixel cell, and this first length of side of one second length of side of arbitrary this pixel cell and this glass substrate is an angle, and wherein this angle is spent to 90 between 0 degree.
8. the pel array of thin-film transistor array base-plate as claimed in claim 7, wherein arbitrary this pixel cell is a rectangular pixels.
9. the pel array of thin-film transistor array base-plate as claimed in claim 8, wherein arbitrary this pixel cell is a square pixel.
10. the pel array of thin-film transistor array base-plate as claimed in claim 7, wherein those pixel cells are combined into a pel array with the mosaic form.
11. the pel array of thin-film transistor array base-plate as claimed in claim 7, wherein those pixel cells are combined into a pel array with rectangular form.
12. the pel array of thin-film transistor array base-plate as claimed in claim 7, wherein the scope of this angle is between 2 to 16 degree.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100887701A CN100557493C (en) | 2006-06-05 | 2006-06-05 | The pel array of thin-film transistor array base-plate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100887701A CN100557493C (en) | 2006-06-05 | 2006-06-05 | The pel array of thin-film transistor array base-plate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101086589A true CN101086589A (en) | 2007-12-12 |
| CN100557493C CN100557493C (en) | 2009-11-04 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006100887701A Expired - Fee Related CN100557493C (en) | 2006-06-05 | 2006-06-05 | The pel array of thin-film transistor array base-plate |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103367249A (en) * | 2013-05-22 | 2013-10-23 | 友达光电股份有限公司 | Method for manufacturing organic light emitting display panel and organic light emitting display panel |
| CN105572950A (en) * | 2014-11-06 | 2016-05-11 | 立景光电股份有限公司 | Silicon-based liquid crystal display device |
-
2006
- 2006-06-05 CN CNB2006100887701A patent/CN100557493C/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103367249A (en) * | 2013-05-22 | 2013-10-23 | 友达光电股份有限公司 | Method for manufacturing organic light emitting display panel and organic light emitting display panel |
| CN105572950A (en) * | 2014-11-06 | 2016-05-11 | 立景光电股份有限公司 | Silicon-based liquid crystal display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100557493C (en) | 2009-11-04 |
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Granted publication date: 20091104 Termination date: 20200605 |