CN101043008A - 制造倒装芯片封装方法,用于制造的基底和倒装芯片组件 - Google Patents
制造倒装芯片封装方法,用于制造的基底和倒装芯片组件 Download PDFInfo
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Abstract
披露了用于制造倒装芯片封装的方法,特别是用于填充芯片的起作用的侧和基底的接触侧之间的空间的方法。此外,披露了用于支撑填充物和倒装芯片组件的基底。该基底包括从芯片支撑区域内的芯片安装表面延伸到基底安装表面的供给开口。经由此供给开口将下部填充材料填充到基底和芯片之间的介入空间内。
Description
技术领域
本发明一般地涉及用于制造倒装芯片封装的方法,并且特别地涉及用于填充芯片的起作用(active)的侧和基底的接触侧之间的空间的方法。此外,本发明涉及用于支撑填充物和倒装芯片组件的基底。
背景技术
在此描述中,词“芯片”用于晶片形成中的芯片并且用于管芯,即,通过切成块过程从晶片独立之后的芯片。
已知许多用于填充芯片的起作用的侧和基底的接触侧之间的空间的方法。一种方法被称为“不流动”下部填充技术。在此方法中,在接附芯片之前将下部填充材料施加到基底的接触表面上,即,通过下部填充材料的“不流动”填充该空间。此方法的一个缺点为精确地确定下部填充材料的量的必要性。否则空间被过充满,或者另一方面空间没有被完全地充满。
另一种方法已知为“毛细作用”下部填充。在此方法中,在将管芯接附到基底上之后,沿着芯片的边分配下部填充材料。其后,通过毛细作用填充芯片的起作用的侧和基底的接触侧之间的空间。对于此方法,需要具有适用于毛细作用的流动性的昂贵的材料并且尚未适用于大规模(“大量”)生产。
第三种已知的方法为在围绕倒装芯片封装模制包装件或外壳之前或同时用模制化合物填充芯片的起作用的侧和基底的接触侧之间的空间。此方法被称作“下部模制”。由于要下部填充的空间的较小的高度,模制化合物必须提供有适当的流动性。这通常通过将非常昂贵的填充物材料添加到模制化合物实现。另一方面,多于50%的模制材料为剔料,即,其通过切割到半导体器件的尺寸丢弃或将其留在支座上。
发明内容
在一个方面,本发明促进下部填充安装在基底上的芯片的过程。
在另一个方面,本发明避免了下部填充材料的低粘性的必要性,由此避免了昂贵的填充物材料或相似物的使用。
在再一个方面,本发明确保完全的下部填充并且防止包含空气。
本发明的实施例涉及用于制造倒装芯片组件的基底。此基底包括形成在其中或其上的传导布线、具有芯片支撑区域的芯片安装表面、与芯片安装表面相反的基底安装表面、设置在芯片支撑区域内的芯片安装表面上的用于基底到芯片触点的多个第一接触盘和设置在基底安装表面上的用于基底到外部触点的多个第二接触盘。第一接触盘通过基底的传导布线至少部分地与第二接触盘连接。基底的特征为从芯片支撑区域内的芯片安装表面延伸到基底安装表面的供给开口。
供给开口允许在安装芯片之后填充、分配或印刷下部填充材料。其还允许从基底安装表面供应下部填充材料。
在本发明的一个实施例中,基底提供有多个供给开口。供给开口应该以这样的图案设置,使得支持下部填充材料均匀地流动。
在更进一步的改进中,供给开口的截面为矩形。另外,供给开口的截面与芯片的起作用的侧相似是有利的。由此减小了下部填充材料从供给开口流到芯片的边沿的距离。
本发明的实施例还涉及倒装芯片组件。此倒装芯片组件包括基底、芯片和下部填充材料。
基底包括形成在其中或其上的传导布线、具有芯片支撑区域的芯片安装表面、与芯片安装表面相反的基底安装表面、设置在芯片支撑区域内的芯片安装表面上的用于基底到芯片触点的多个第一接触盘和设置在基底安装表面上的用于基底到外部触点的多个第二接触盘。第一接触盘通过基底的传导布线至少部分地与第二接触盘连接。基底还提供有从芯片支撑区域内的芯片安装表面延伸到基底安装表面的供给开口。
芯片的起作用的侧提供有芯片触点。芯片安装为起作用的侧面向芯片支撑区域内的芯片安装表面,在起作用的侧和芯片安装表面之间的距离形成介入空间。该距离通过互连芯片触点和第一触点的接触突出部限定。
下部填充材料填充整个介入空间和供给开口。
此组件不仅提供有芯片支撑区域和起作用的侧的表面上的机械连接,而且在供给开口内确实地连接。由此下部填充材料能够在水平方向吸收力。
在本发明的一个实施例中,用模制化合物填充介入空间。这避免了昂贵的下部填充材料的使用。
封装能够实现为“裸背部侧”类型,其中,芯片的侧壁和背部侧不被任何包装件覆盖。否则,除了介入空间的填充物,芯片可以被模制化合物完全地包裹。
本发明还涉及用于制造倒装芯片封装的方法。该方法包括为基底提供上述特征、为芯片提供上述特征、将芯片安装到基底上并且填充介入空间。
在改进中,在填充过程之后固化下部填充材料。因此,如果下部填充材料可以加热固化,组件可能暴露于大约180摄氏度的温度。
在更进一步的改进中,在填充过程期间将压力施加到下部填充材料。由此,过程变得与下部填充材料的粘性无关。这能够有利地应用于将液体模制化合物作为下部填充材料填充到供给开口内的更进一步的改进。如上所述,在填充之后通过受热固化液体模制化合物。
在更进一步的改进中,芯片被模制化合物完全地包裹。
附图说明
为了更加完全地理解本发明及其优点,现在结合附图参考接下来的描述,其中:
图1示出了通过基底的截面;
图2示出了通过芯片的截面;
图3示出了安装在基底上的芯片的截面;
图4示出了具有裸背部侧的倒装芯片组件的截面;
图5示出了具有完全地模制的包装件的倒装芯片组件的截面;
共同地称作图6的图6a-6e示出了用于下部填充和制造包装件的本发明的两步骤方法;
图7示出了具有供给开口和供给槽的基底的正视图;及
图8示出了槽的数种结构的截面图。
具体实施方式
下面详细讨论当前优选的实施例的制造和使用。然而,应该理解,本发明提供许多可实施的本发明的构思,这些构思能够以多种特定的上下文体现。讨论的特定的实施例仅是说明了制造和使用本发明的特定的方式,而不限制本发明的范围。
如图1所示,基底1提供有形成在其中的传导布线2。基底1具有带有芯片支撑区域4的芯片安装表面3。基底1具有与芯片安装表面3相反的基底安装表面5。
传导布线2与芯片安装表面3上的第一盘6连接并且还与基底安装表面5上的第二盘7连接。在此示例中,第二盘提供有用于随后将基底1安装到印刷电路板(没有示出)或其它组件上的焊球8。焊球8可以如图1所示在任何更进一步的芯片安装过程之前以及如后面描述并且如图6所示在芯片安装过程之后设置在基底1上。
两个供给开口9、10设置在芯片支撑区域4的中心。这些开口9、10从芯片安装表面3延伸到基底安装区域5。
如图2所示,芯片11提供有用于将芯片11在芯片安装表面3的芯片支撑区域4内安装到基底1上的突出部12。突出部12可以包括焊料突出部并且通过回流过程执行安装。在另一个实施例中,突出部12可以包括粘合剂材料并且通过固化粘合剂材料安装并且接触芯片11。在芯片11仍然在晶片形成中时,突出部12施加在芯片11的起作用的侧13上设置接触盘(没有示出)的位置。
在切成块之后,“倒转”晶片11,即,其被翻转为其起作用的侧面向晶片安装表面3。如图3所示,突出部12接触第一盘6。其后,根据突出部材料,通过回流或固化突出部12固定芯片11。
突出部12限定了芯片安装表面3和起作用的侧13之间的距离。此距离导致以这些表面3和13为边界的介入空间14。
在安装芯片11之后,下部填充材料15经由供给开口9、10流入介入空间14到达芯片11的边沿。这在图4中示出。多种已知的材料可以用作下部填充材料15。在使用基于毛细作用的下部填充材料的情况中,可以通过简单的分配将下部填充材料施加到供给开口9、10内。更有利地,模制化合物可以用作下部填充材料15。在此情况中,经由供给开口9、10将下部填充材料15压入介入空间14。
图4所示的状态足以用于“裸背部侧”倒装芯片封装。但是其还可能完成如图5所示的具有包装件16的倒装芯片封装。
在共同称作图6的图6a-6e中更加详细地示出了制造包装的倒装芯片封装的程序。如图6所示,在整个过程期间,通过真空卡盘17支撑基底。此真空卡盘17提供有又连接到真空源(没有示出)的真空馈入装置18。依靠真空将基底1保持在真空卡盘17上。
如图6a所示,模具19布置在基底1上覆盖芯片11。随后经由供给开口9将作为下部填充材料的模制化合物压入介入空间14。供给开口9充当第一模制门。如图6b所示,填充继续,直到到达芯片11的边沿20。其后,打开第二模制门21并且将用于建立包装件16的模制化合物压入模具19。当经由第二模制门21将模制化合物压入模具19时,经由供给开口9的材料供应停止。仅保持供给开口9内的压力以避免模制化合物倒流回到供给开口9。这在图6c和6d中示出。
当模具19被完全地填充时,关断压力,并且在冷却模制化合物之后包装过程完成。最终的构造在图6e中示出。
如图7和8所示,基底1提供有阻焊剂层22。不是必须使用阻焊剂,但是因为其使用非常普遍,阻焊剂是优选的材料。通过在其中形成槽23形成阻焊剂层的图案。这些槽23促进下部填充材料流动。图8示出了形成槽的阻焊剂层22的数个实施例。
如图7所示,槽23从供给开口9径向向外定向。
虽然已经详细描述了本发明及其优点,应该理解,可以在不偏离如通过后附的权利要求限定的本发明的精神和范围的情况下在这里作出各种改变、代替和改造。
Claims (20)
1.一种用于制造倒装芯片组件的基底,该基底包括:
形成在其中或其上的传导布线;
具有芯片支撑区域的芯片安装表面;
与芯片安装表面相反的基底安装表面;
设置在芯片支撑区域内的芯片安装表面上的用于基底到芯片触点的多个第一接触盘;
设置在基底安装表面上的用于基底到外部触点的多个第二接触盘,其中,多个第一接触盘通过基底的传导布线至少部分地与多个第二接触盘连接;及
从芯片安装表面延伸到芯片支撑区域内的基底安装表面的供给开口。
2.根据权利要求1所述的基底,其中,基底包括多个供给开口。
3.根据权利要求1所述的基底,其中,多个供给开口的截面是矩形的。
4.根据权利要求3所述的基底,其中,多个供给开口的截面与芯片的起作用的侧相似。
5.根据权利要求1所述的基底,其中,多个供给开口设置在芯片支撑区域的中心。
6.根据权利要求1所述的基底,其中,槽提供在芯片安装表面内,每个槽在一端与该多个供给开口连接。
7.根据权利要求6所述的基底,其中,槽从该多个供给开口径向向外延伸。
8.根据权利要求1所述的基底,其中,槽设置在阻焊剂层内。
9.一种倒装芯片组件,其包括:
基底,其包括:
形成在其中或其上的传导布线;
具有芯片支撑区域的芯片安装表面;
与芯片安装表面相反的基底安装表面;
设置在芯片支撑区域内的芯片安装表面上的用于基底到芯片触点的多个第一接触盘;
设置在基底安装表面上的用于基底到外部触点的多个第二接触盘,其中,多个第一接触盘通过基底的传导布线至少部分地与多个第二接触盘连接;及
从芯片支撑区域内的芯片安装表面延伸到基底安装表面的供给开口;
具有提供有芯片触点的起作用的侧的芯片,芯片安装为起作用的侧面向芯片支撑区域内的芯片安装表面,在起作用的侧和芯片安装表面之间的距离形成介入空间,其中,该距离通过互连芯片触点和第一触点的接触突出部确定;及
填充整个介入空间和供给开口的下部填充材料。
10.根据权利要求9所述的倒装芯片组件,其中,用模制化合物填充介入空间。
11.根据权利要求10所述的倒装芯片组件,其中,芯片被模制化合物完全地包裹。
12.根据权利要求9所述的倒装芯片组件,其中,基底包括多个供给开口。
13.根据权利要求9所述的倒装芯片组件,其中,多个供给开口的截面是矩形的。
14.根据权利要求9所述的倒装芯片组件,其中,槽提供在芯片安装表面内,每个槽在一端与该多个供给开口连接。
15.一种用于制造倒装芯片封装的方法,该方法包括:
提供基底,其包括:
形成在其中或其上的传导布线;
具有芯片支撑区域的芯片安装表面;
与芯片安装表面相反的基底安装表面;
设置在芯片支撑区域内的芯片安装表面上的用于基底到芯片触点的多个第一接触盘;
设置在基底安装表面上的用于基底到外部触点的多个第二接触盘,其中,多个第一接触盘通过基底的传导布线至少部分地与多个第二接触盘连接;及
从芯片支撑区域内的芯片安装表面延伸到基底安装表面的供给开口;
提供具有提供有芯片触点的起作用的侧的芯片;
安装芯片,使得起作用的侧面向芯片支撑区域内的芯片安装表面,在起作用的侧和芯片安装表面之间的距离形成介入空间,其中,该距离通过互连芯片触点和多个第一触点的接触突出部限定;及
将下部填充材料填充到供给开口内,由此填充全部介入空间和供给开口。
16.根据权利要求15所述的方法,其中,下部填充材料在填充之后固化。
17.根据权利要求15所述的方法,其中,在填充过程期间将压力施加到下部填充材料。
18.根据权利要求17所述的方法,其中,将液体模制化合物作为下部填充材料填充到供给开口内。
19.根据权利要求15所述的方法,其中,芯片被模制化合物完全地包裹。
20.根据权利要求15所述的方法,其中,将基底放置在真空卡盘上,使得其裸基底安装表面接合真空卡盘,并且在下部填充过程期间通过真空卡盘支撑基底,并且在下部填充之后将焊球施加到基底安装表面上。
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US11/386,072 US20070224729A1 (en) | 2006-03-21 | 2006-03-21 | Method for manufacturing a flip-chip package, substrate for manufacturing and flip-chip assembly |
US11/386072 | 2006-03-21 |
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Cited By (3)
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CN102254835A (zh) * | 2010-05-17 | 2011-11-23 | 新科金朋有限公司 | 半导体器件及其制造方法 |
CN107393838A (zh) * | 2017-04-20 | 2017-11-24 | 北京时代民芯科技有限公司 | 一种提高陶瓷qfp228封装芯片抗随机振动性能的板级加固方法 |
CN115023024A (zh) * | 2021-09-26 | 2022-09-06 | 荣耀终端有限公司 | 电路板及电子设备 |
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US7659623B2 (en) * | 2005-04-11 | 2010-02-09 | Elpida Memory, Inc. | Semiconductor device having improved wiring |
KR20110092045A (ko) * | 2010-02-08 | 2011-08-17 | 삼성전자주식회사 | 휨 및 보이드를 억제하는 몰디드 언더필 플립칩 패키지 |
KR101609261B1 (ko) * | 2011-08-23 | 2016-04-05 | 삼성전기주식회사 | 반도체 패키지 기판 및 반도체 패키지 기판 제조 방법 |
US8859342B2 (en) * | 2011-12-14 | 2014-10-14 | Stats Chippac Ltd. | Integrated circuit packaging system with substrate mold gate and method of manufacture thereof |
JP2014116513A (ja) * | 2012-12-11 | 2014-06-26 | Denso Corp | 電子装置 |
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US5612576A (en) * | 1992-10-13 | 1997-03-18 | Motorola | Self-opening vent hole in an overmolded semiconductor device |
JP2546192B2 (ja) * | 1994-09-30 | 1996-10-23 | 日本電気株式会社 | フィルムキャリア半導体装置 |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN102254835A (zh) * | 2010-05-17 | 2011-11-23 | 新科金朋有限公司 | 半导体器件及其制造方法 |
CN107393838A (zh) * | 2017-04-20 | 2017-11-24 | 北京时代民芯科技有限公司 | 一种提高陶瓷qfp228封装芯片抗随机振动性能的板级加固方法 |
CN115023024A (zh) * | 2021-09-26 | 2022-09-06 | 荣耀终端有限公司 | 电路板及电子设备 |
CN115023024B (zh) * | 2021-09-26 | 2023-10-20 | 荣耀终端有限公司 | 电路板及电子设备 |
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