CN100594540C - Separating bus technology liquid crystal box interface for CAN bus instrument - Google Patents
Separating bus technology liquid crystal box interface for CAN bus instrument Download PDFInfo
- Publication number
- CN100594540C CN100594540C CN200710056065A CN200710056065A CN100594540C CN 100594540 C CN100594540 C CN 100594540C CN 200710056065 A CN200710056065 A CN 200710056065A CN 200710056065 A CN200710056065 A CN 200710056065A CN 100594540 C CN100594540 C CN 100594540C
- Authority
- CN
- China
- Prior art keywords
- bus
- data memory
- liquid crystal
- interface
- pattern data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Liquid Crystal Display Device Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Controls And Circuits For Display Device (AREA)
Abstract
The present invention relates to a bus-isolation technology LCD port used for a CAN bus meter, and belongs to the field of automotive electronic intelligent instruments. The present invention adoptsthe bus separation technology, and the control part consists of a center control single-chip module, an externally connected graphic data memory and a LCD control matched with one-way data parallel buses. The data line of a graphic data memory is directly connected to the data line of the LCD port so as to realize the cyclic transmission of LCD information of a single bus and further carry the display and control fast and conveniently. The present invention simplifies the periodicity of data transmission in the display of the LCD; improves the transmission efficiency; shortens the transmissiontime; and reduces the sophistication of a hardware port.
Description
Technical field
The invention belongs to field of automotive electronic, be specifically related to a kind of interfacing by single-chip microcomputer, liquid crystal display and control circuit thereof and image data memory module.
Background technology
The electromechanical mixing dynamic force passenger vehicle is that development in recent years is got up and the new type passenger car of bright prospects is arranged, its low oil consumption, and the high-efficient energy-saving environment friendly characteristics of low emission will make it that good market is all arranged in big and medium-sized cities.Hybrid vehicle is that a kind of to collect combustion engine powered and motor power be the system of one high complexity, and special multi-energy management structure makes Computerized intelligent control very necessary.Generally the mode of Cai Yonging is that the information between each parts is carried out communication by " controller local area network " CAN (Controller Area Network) on the car, form main automatically controlled processor, the automatically controlled processor of each parts, each intelligence sensor, each intelligent execution unit is by the interconnected general layout of CAN.Under this general layout, reflect that timely and accurately vehicle condition information is the necessary condition of safe and efficient economic steering vehicle.
From the angle of information, car load is the LAN (Local Area Network) that is made of by the CAN bus each intelligent parts.Information on the network, parameter have reflected the duty of vehicle in real time, quite a few information is understood vehicle condition when driving for the driver, multipotency driving source assignment information particularly, reasonably adjust travel condition of vehicle, the superiority of having given play to hybrid power passenger car to greatest extent is very important and necessary, here comprised that engine is in the optimal economic running status, reach low oil consumption, low emission, be suitable for aspects such as the good driving habits of hybrid vehicle, maintenance rationally, prolongation component life.When unusual and fault occurring in the system of such complexity in addition, the driver finds as early as possible, reply in time, takes the necessary measures, and increases security and reliability significantly.Hybrid vehicle is owing to intelligent degree height, and the information complexity reflects that with traditional instrument difficulty is big, and instrument face plate can be too complicated, and not only the cost height is realized difficulty, uses also to make things convenient for inadequately.
Summary of the invention
The invention provides a kind of CAN field bus instrument separate bus technology liquid crystal interface, to solve hybrid vehicle because intelligent degree height, the information complexity, big with traditional instrument reflection difficulty, instrument face plate can be too complicated, cost height is not only realized difficulty, uses also inadequately problem easily.The technical scheme that the present invention takes is: by center control single chip computer module, the graph data memory module, LCD Interface and controller thereof are formed, it is characterized in that: the LCD Interface of liquid crystal display controller is by demonstration control command and the display graphics data of typical separate bus technical interface reception from center control single chip computer module and display graphics data-carrier store, this center control single chip computer is not for there being the expansion external bus structure, its inside has the CAN bus unit, and by the software control output port in the internal program memory, timing simulation goes out address bus signal in accordance with regulations, chip selection signal and read-write control signal, the address wire signal that pattern data memory uses the center control single chip computer to provide, chip selection signal and read control signal, by the direct butt joint of pattern data memory data line and LCD Interface data line, the chip selection signal of LCD Interface and the chip selection signal of pattern data memory are shared; The write control signal of LCD Interface and pattern data memory to read control signal shared, external pattern data memory and liquid crystal display are the one-way data parallel bus interface, show when control command and display graphics data are read from pattern data memory, the LCD Interface of writing direct realizes that the liquid crystal display information in single transport cycle is directly transmitted.
During liquid crystal display work, the liquid crystal display controller is by demonstration control command and the display graphics data of typical general purpose interface bus reception from center control single chip computer module and display graphics data-carrier store; The center control single chip computer is integrated with sheet internal program storer, need not outside expansion bus, the CAN field bus instrument is made up of center control single chip computer module, image data memory module, color LCD screen parallel bus interface and control module thereof with separate bus technology liquid crystal interface.
If adopt general interface method under the contrast, then need single-chip microcomputer that data are read in the CPU register from pattern data memory, output to LCD Interface with output command again, need single-chip microcomputer that outside expansion bus is arranged, and the transmission of each byte all needs two bus cycles.The present invention has simplified the data transfer cycle in the liquid crystal display procedure for displaying, has improved transfer efficiency, has shortened the transmission time, has reduced the hardware interface complexity.
The CAN field bus instrument that we are novel according to the concrete structure development and design of hybrid power passenger car.Adopt smart point configuration color liquid crystal touch-screen need carry out the scheme of multihead display to prioritize with function to multiple information.Novel hybrid passenger vehicle CAN field bus instrument possesses the mobile picture of dynamic energy and shows, engine, motor operating mode coordinate points show in real time, the memory of battery electric quantity history curve shows that vehicle control information figure+numeral shows, the function that conventional instruments such as vehicle condition abnormal alarm do not possess.The realization of these functions depends on CAN field bus instrument control single chip computer to a great extent will show that by the LCDs interface control command and display graphics data are sent to the liquid crystal display controller accurately and rapidly.The development of present international and domestic hybrid vehicle is in the starting stage.Domestic this type of technology still belongs to blank.
Description of drawings
Fig. 1 is a circuit composition frame chart of the present invention.
Fig. 2 is a liquid crystal display controller circuitry schematic diagram of the present invention.Wherein: Vcc positive supply, SD0～SD7 data line, SRD read control signal (input is not used), SCS interface chip selection signal (input), SWR write control signal (input), SA0SA1 address wire (input), BUSY busy condition (output) GND ground wire.
Fig. 3 is a liquid crystal display control unit interface bus timing signal of the present invention.
Fig. 4 is that LCD Interface separate bus of the present invention realizes circuit.
Fig. 5 is a center of the present invention control single chip computer output port emulation bus clock signal.
Embodiment
By center control single chip computer module, the graph data memory module, LCD Interface and controller thereof are formed, the LCD Interface of liquid crystal display controller is by demonstration control command and the display graphics data of typical separate bus technical interface reception from center control single chip computer module and display graphics data-carrier store, this center control single chip computer is not for there being the expansion external bus structure, its inside has the CAN bus unit, and by the software control output port in the internal program memory, timing simulation goes out address bus signal in accordance with regulations, chip selection signal and read-write control signal, the address wire signal that pattern data memory uses the center control single chip computer to provide, chip selection signal and read control signal, by the direct butt joint of pattern data memory data line and LCD Interface data line, the chip selection signal of LCD Interface and the chip selection signal of pattern data memory are shared; The write control signal of LCD Interface and pattern data memory to read control signal shared, external pattern data memory and liquid crystal display are the one-way data parallel bus interface, show when control command and display graphics data are read from pattern data memory, the LCD Interface of writing direct realizes that the liquid crystal display information in single transport cycle is directly transmitted.
Realize the above functional requirement of invention, on hardware design, comprise with lower module: center control single chip computer module, the graph data memory module, LCD Interface and control module thereof, its hardware composition frame chart is as shown in Figure 1.
The center control single chip computer has been selected the MB90427GA of Fuji Tsu for use, does not expand external bus in its chip hardware design.The display screen that this instrument adopts be NEC Corporation 8.4 inches TFT colour dot lattice formula liquid crystal display 6448BC26-01E and with the controller TFT6448V8-256 of interface microcontroller.The liquid crystal display screen controller receives by typical general purpose interface bus and shows control command and display graphics data, interface signal as shown in Figure 2, typical interface signal writes sequential as shown in Figure 3; When carrying out the LCDs display operation, the parts of control display screen interface make chip selection signal SCS effective (low level) earlier and provide SA0 SA1 signal combination according to connection object simultaneously, on data line SD0--SD7, export data (order) byte that will be transferred to the liquid crystal display screen controller then, then provide effective write control signal SWR (negative pulse), make chip selection signal SCS invalid (high level) finish the ablation process of a byte at last.The use of liquid crystal display controller TFT6448V8-256 mainly comprises to the liquid crystal display controller and writes parameter (1 byte), writes screen point X coordinate (2 byte), writes screen point Y coordinate (2 byte) and write the four kinds of write operations such as (1 bytes) of screen point color data.
The center control single chip computer is by demonstration control command and the display graphics data of programmed control to liquid crystal display screen controller transmission display graphics data-carrier store, and the display graphics data-carrier store need must expand the single-chip microcomputer outside near the 1M byte.The universal EPROM 27C080 chip of the Fuji Tsu that this instrument employing pattern data memory employing market is purchased, structure is 1 megabyte X8 position, 20 address wire A0-A19 are arranged, and 8 data line DQ0-DQ7 also have chip selection signal CS in addition and read control signal OE.This instrument adopts special separate bus technology, pattern data memory is the one-way data parallel bus interface to the liquid crystal display control unit interface, the data line of pattern data memory is output, the data line of liquid crystal display control unit interface is input, pattern data memory and liquid crystal display realize that data directly transmit, and 20 address wire signal A0-A19 that pattern data memory only uses the center control single chip computer to produce, chip selection signal CS and read control signal OE.
The circuit of specific implementation as shown in Figure 4.20 address wire A0-A19 of data-carrier store chip 27C080 directly with the output port (SEG0～SEG19) link to each other of center control single chip computer; Data line output DQ0-DQ7 links to each other with LCDs control unit interface Data In-Line SD0-SD7, carries out the transmission of data; Sheet selects pin (CS) to link to each other with the SCS of display screen interface, and receives center control single chip computer SEG20 pin by its validity of Single-chip Controlling; Data allow pin (OE) to link to each other with the control SWR that writes of display screen interface, and receive center control single chip computer SEG21 pin by Single-chip Controlling.
Separate bus technical work process is as follows: (bus signals that goes out of timing simulation is to solve the problem of not expanding external bus on the control single chip computer hardware of center in accordance with regulations for SEG0～SEG21), and sequential chart as shown in Figure 5 by the software control output port for the center control single chip computer.By the SEG22 of single-chip microcomputer, carry out liquid crystal display controller register select respectively by SEG23 output for the address wire of display screen interface (SA0, SA1) signal.The condition line BUSY signal of display screen interface is by the input of INT6 pin and the detection of single-chip microcomputer, and display screen interface is in the state of being ready to when guaranteeing write operation.Fig. 5 is a single-chip simulation bus timing signal.
During screen controller work, carry out display action by demonstration control command and display graphics data that display screen interface receives, the center control single chip computer is divided into demonstration control command and display graphics data two classes by the information that display screen interface sends to screen controller, based on the requirement of screen controller, need be divided into two storage areas to pattern data memory: screen control information data piece and image data piece.The transmission of data selects signal-give image data storer that address-provide address-test b USY level-output data to allow signal for the screen address line is provided by the control single chip computer output module.When screen controller interface write data, at first (SEG0～SEG19) provides screen control information data block address by single machine output end, the control command byte that pattern data memory screen control information data piece provides control to write writes the image data that needs demonstration then.
The operation command code of each icon image data and liquid crystal display controller is kept in the image data storer of expansion, icon data and operation command code are by the level of center control single chip computer by output order control SEG0-SEG23 port, the sequential of simulation control bus and address bus, data in the data-carrier store are directly outputed to display screen interface (liquid crystal display controller), its data output timing such as Fig. 5.At first determine the SEG0-SEG19 output level according to the data memory addresses that will visit, on the address wire A0-A19 of data-carrier store, produce effective address, select to set the level (determining SA0, SA1 combination) of SEG22, SEG23 again according to the purpose object register that will transmit; Make then that SEG20 is a low level, make the chip selection signal CE and the SCS of data-carrier store and display screen interface effective, it is in chooses duty; Make again SEG20 be low level make data-carrier store read control end OE and display screen interface write control end signal SWR simultaneously effectively; Will output on the data line SD0-SD7 by the data content in the data-carrier store of determining in advance to want reference address like this, be delivered in the register of determining by SA0, SA1 in the liquid crystal display controller in the display screen interface by display screen interface, like this with usually adopt data are read in CPU from data-carrier store earlier, be sent to liquid crystal display control unit interface scheme difference from CPU again, realized that data-carrier store directly transmitted to the monocycle of liquid crystal display control unit interface, have simple and rapid advantage, be convenient to not have the CPU use of external bus expansion.
The display screen that this instrument adopts be Japanese NEC Corporation 8.4 inches TFT colour dot lattice formula liquid crystal display 6448BC26-01_E and with the controller TFT6448V8-256 of interface microcontroller.This liquid crystal display controller is supported 8 color depths, totally 256 looks; Write screen control information order and write video data to display screen interface (liquid crystal display controller) during work and get final product to assigned address.The liquid crystal display controller has four pages of display buffer memories, and interface bus has the parallel data bandwidth of maximum 3M, can independently set to show page or leaf and write page or leaf.After writing one page with the background working method and finishing, switch this page or leaf and serve as and show page, can form animation.
The use method of operating of liquid crystal display controller TFT6448V8-256 is as follows:
1. writing of video data, write a byte (8) each time, the color of a point on the corresponding screen, the data of a byte (8) are divided into 3 sections, the intensity of respectively corresponding red (3), green (3), blue (2) three primary colours, 8 color depths, totally 256 looks, its meaning is:
Position 7 is red high-order
Position 6 red metas
Position 5 red low levels
Position 4 is green high-order
Position 3 green metas
Position 2 green low levels
Position 1 is blue high-order
Position 0 blue low level
2, inner total total corresponding 4 display buffer memories that show page or leaf of liquid crystal display controller can be set and show page or leaf and write page or leaf, switch this page or leaf and are demonstration page when writing one page and finish the back, so just form animation
3, whenever write back screen coordinate point directions X and Y direction display data memory address and can add 1 (needn't at every turn provide screen coordinate when writing a delegation or a row video data continuously) or constant (passing through parameter setting) automatically.
4, programmed method:
1. write parameters (byte, 8) (address signal A0=1 A1=0)
Position 7=1X direction does not increase automatically; Position 7=0X direction increases automatically
Position 6=1Y direction does not increase automatically; Position 7=0Y direction increases automatically
The current page number (0,1,2,3) that shows page or leaf is specified in position [5..4]
Position 3 keeps, and is 0
Position 2=1 realizes screen display; Position 2=0 realization screen is closed (not showing);
The current page number (0,1,2,3) that writes page or leaf is specified in position [1..0]
2.. write screen point X coordinate (0-639; 10 branch two bytes) (address signal A0=1; A1=1)
3.. write screen point Y coordinate (0-479; 9 branch two bytes) (address signal A0=0; A1=1)
4.. write the screen point color data, (address signal A0=0; A1=0)
The address increases mode automatically, writes continuously fashionablely needn't write X, Y coordinate in advance
Content in pattern data memory EPROM 27C080 chip writes by request for utilization with the universal programming instrument in advance.Deposited the fixed data (0-255) that 256 bytes are used to write the liquid crystal display controller among the 00000H--00100FH of address; Its data content is identical with the storage address least-significant byte, in the time of need writing the some data of liquid crystal display controller, single-chip microcomputer only need provide the address that equates with it just can be in the data (to the data line of display screen interface) of exporting designating unit on the pattern data memory data line.Other address location of pattern data memory is deposited the data corresponding with display graphics.
Embodiment 1: to data byte of TFT6448V8-256 liquid crystal display controller transmission
As shown in Figure 4, the center control single chip computer makes the chip selection signal CS and the SCS of data-carrier store and display screen interface effective by SEG20, it is in chooses duty; Make SEG0-SEG19 provide and determine in advance good address signal combination, make again SEG21 be low level make data-carrier store read control end OE and display screen interface write control end signal SWR simultaneously effectively; Like this by determining to want the data-carrier store data content of reference address will output on the data line SD0-SD7 in advance, be delivered in the register of determining by SA0, SA1 in the liquid crystal display control unit interface in the display screen interface, make SEG21 be high level make data-carrier store read control end OE and display screen interface to write control end signal SWR simultaneously invalid, make the chip selection signal CE and the SCS of data-carrier store and liquid crystal display control unit interface invalid by SEG20 again, the data transmission of a byte has just been finished.
Embodiment 2: to supplemental characteristic byte of TFT6448V8-256 liquid crystal display controller transmission
Show the 0th page, write the 0th page, working method is that directions X increases automatically, the Y direction does not increase automatically.The supplemental characteristic byte is 44H (01000100B), and single-chip microcomputer provides pattern data memory address 00044H, and definite liquid crystal display controller address signal wire SA0=1, SA1=0.Method with embodiment 1 writes 1 byte
Embodiment 3: to TFT6448V8-256 liquid crystal display controller transmission display line data (video data (640) is placed in the initial zone of pattern data memory address 10000H for X origin coordinates 0, Y origin coordinates 300)
The first step is set the X origin coordinates, sets (A0=1A1=1), writes two byte 00H, 00H to liquid crystal display controller (the sexadecimal form of X origin coordinates 0 is 0000H) with the method for embodiment 1.
Second step was set the Y origin coordinates, set (A0=0A1=1), write two byte 01H, 2CH to liquid crystal display controller (the sexadecimal form of Y origin coordinates 300 is 012CH) with the method for embodiment 1.
The 3rd step single-chip microcomputer provides the 10000H address on the pattern data memory address wire.Set (A0=0A1=0), a byte data in the pattern data memory 10000H address is written to display screen interface with the method for embodiment 1.The address that single-chip microcomputer provides on the pattern data memory address wire adds 1, way above repeating is till the transmission of having finished 640 bytes of one's own profession, and the display pattern of 640 points corresponding with pattern data memory 10000H-1012CH address contents will appear in the 300th row from left to right on the screen.
Claims (1)
1, a kind of CAN field bus instrument separate bus technology liquid crystal interface, form by center control single chip computer, pattern data memory, display screen interface and liquid crystal display controller, it is characterized in that: the display screen interface of liquid crystal display controller is by demonstration control command and the display graphics data of separate bus technical interface reception from center control single chip computer module and pattern data memory, and the structure of this separate bus technical interface is: 20 address wires of pattern data memory directly link to each other with the output port of center control single chip computer; The data line output of pattern data memory links to each other with the display screen interface Data In-Line, carries out the transmission of data; The sheet of pattern data memory selects pin CS to link to each other with the SCS of display screen interface, and receive the pin SEG20 of center control single chip computer, by the validity of Single-chip Controlling chip selection signal; The data of pattern data memory allow pin to link to each other with the control that writes of display screen interface, and receive center control single chip computer pin SEG21, by the validity of Single-chip Controlling data permission signal; This center control single chip computer has the CAN bus unit for nothing expansion external bus structure, its inside, and by the software control output port in the internal program memory, timing simulation goes out address bus signal, chip selection signal and read-write control signal in accordance with regulations, pattern data memory uses address wire signal, the chip selection signal that the center control single chip computer provides and reads control signal, by the direct butt joint of pattern data memory data line and display screen interface data line, the chip selection signal of display screen interface and the chip selection signal of pattern data memory are shared; The write control signal of display screen interface and pattern data memory to read control signal shared, external pattern data memory is the one-way data parallel bus interface to the display screen interface of liquid crystal display controller, show when control command and display graphics data are read from pattern data memory, the display screen interface of writing direct realizes that the liquid crystal display information in single transport cycle is directly transmitted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200710056065A CN100594540C (en) | 2007-09-12 | 2007-09-12 | Separating bus technology liquid crystal box interface for CAN bus instrument |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200710056065A CN100594540C (en) | 2007-09-12 | 2007-09-12 | Separating bus technology liquid crystal box interface for CAN bus instrument |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101118735A CN101118735A (en) | 2008-02-06 |
| CN100594540C true CN100594540C (en) | 2010-03-17 |
Family
ID=39054815
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200710056065A Expired - Fee Related CN100594540C (en) | 2007-09-12 | 2007-09-12 | Separating bus technology liquid crystal box interface for CAN bus instrument |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100594540C (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103093734A (en) * | 2013-01-21 | 2013-05-08 | 佛山市顺德区龙睿电子科技有限公司 | Liquid crystal displayer (LCD) data control method applicable to massage armchair hand controller |
| CN106648519B (en) * | 2015-10-28 | 2020-02-18 | 大陆汽车车身电子***（芜湖）有限公司 | Method for detecting actual display effect of picture for instrument |
-
2007
- 2007-09-12 CN CN200710056065A patent/CN100594540C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN101118735A (en) | 2008-02-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101318473A (en) | Synthetic meter system of hybrid vehicle | |
| CN101169922B (en) | Time sequence controller, liquid crystal display and method for displaying image | |
| CN101118658A (en) | CAN bus instrument vehicle controlling information processing method for mixed power passenger car | |
| CN102591326A (en) | Interface chip for automobile diagnosis | |
| CN201514738U (en) | LED display screen | |
| CN106558286B (en) | A kind of full-color LED display screen digital driving chip | |
| CN101436171B (en) | Modular communication control system | |
| CN101114259A (en) | Program code memory bank in processor piece based on FLASH structure and method for realizing execution in code piece | |
| CN101493771A (en) | Electric-controlled unit program burn writing equipment and method | |
| CN201587405U (en) | Entire vehicle controller based on MPC 555 in hybrid urban motor bus | |
| CN100594540C (en) | Separating bus technology liquid crystal box interface for CAN bus instrument | |
| CN201788657U (en) | Liquid crystal display (LCD) controller based on Nios II soft-core central processing unit (CPU) | |
| CN103793263B (en) | DMA transaction-level modeling method based on Power PC processor | |
| CN103488600A (en) | Universal auxiliary machine synchronous serial interface circuit | |
| CN201177836Y (en) | Information recorder for hybrid power automobile | |
| CN101769988B (en) | Chip debugging method, system and debugging module | |
| CN1221145A (en) | Programmable controller | |
| CN109739783A (en) | Read and/or write simultaneously the device of more optical module EEPROM | |
| CN111240598A (en) | Large-capacity rapid NandFlash storage implementation method based on software and hardware combination mode | |
| CN101226513A (en) | Single line transmission interface and single byte operational keyboard display module | |
| CN205677726U (en) | A kind of Control experiment platform of automotive electronics air throttle | |
| CN202003221U (en) | Vehicle-mounted central controller | |
| CN102221715A (en) | Rainfall sensor detection platform based on LIN (Local Interconnect Network) bus and detection method thereof | |
| CN202434191U (en) | LCD system of aeronautical instrument | |
| CN209199608U (en) | Read and write the switching strobe unit of more optical module EEPROM |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100317 Termination date: 20100912 |