CN100576579C - A kind of method for preparing the indium post - Google Patents
A kind of method for preparing the indium post Download PDFInfo
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- CN100576579C CN100576579C CN200710139334A CN200710139334A CN100576579C CN 100576579 C CN100576579 C CN 100576579C CN 200710139334 A CN200710139334 A CN 200710139334A CN 200710139334 A CN200710139334 A CN 200710139334A CN 100576579 C CN100576579 C CN 100576579C
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Abstract
The invention discloses a kind of method for preparing the indium post, it is applied to semiconductor device and circuit preparation technology.Method of the present invention comprises that technological process is that the positive resist lithography technology and the technological process of chip processing, preceding baking, gluing, contraposition, exposure, development, post bake is chip processing, load, the electron beam evaporation indium film and the little ultrasonic lift-off technology that vacuumize, evaporate, get sheet, peel off, when carrying out coating process, at positive photoresist coating intermediate preparation layer of metal film or other deielectric-coating, make coating become the structure of " positive photoresist thick-layer-medium or metal film-positive photoresist thin layer "; Thin glue with the upper strata is photo-etched into figure then, fall medium or metal film in the graphical window with wet etching again, remove clean by developing method the thick glue of bottom at last and adopt electron beam evaporation indium film, indium film micro-ultrasonic lift-off technology that the indium film is peeled off.The accuracy of pattern of indium post that adopts technology of the present invention preparation is apparently higher than the pattern with the indium post of prior art for preparing.
Description
Technical field
The present invention relates to a kind of semiconductor device and circuit preparation technology, especially relate to the detection method of the indium post in a kind of quantum trap infra-red focus planar detector.
Background technology
The quantum trap infra-red focus planar detector is a kind of novel infrared detector that grew up in recent years, it is the developing direction of present infrared electronic technology, it is fast that it has response speed, variable wavelength, thermal stability and advantage such as evenly good, aspect military and civilian, occupy critical role, become the high-tech research advanced subject of very paying attention in the world.
Infrared focal plane array is the core component of modern infrared imaging system, and its manufacture process is to prepare detector and signal processing circuit at first respectively, and then is interconnected.What interconnection process usually adopted is the welding of indium post flip-chip interconnection, promptly all prepares the indium post of identical figure on detector chip and signal processing circuit chip, then the two indium post is aimed at welding.Make the success rate of interconnection reach the highest, it is particularly important to prepare high-quality indium post, and it directly has influence on the photoelectric properties and the image quality of focal plane device.
The indium post preparation technology who generally adopts is positive resist lithography and thermal evaporation coating process at present.Positive photoresist is the most frequently used resist of photoetching process, and acid resistance is good, and resolution is higher, and general film thickness is no more than 2 microns; When if alignment precision is less demanding, maximum film thickness can adopt the gradation coating to reach 5 microns.But when the indium film thickness increased, because this metal of indium " glue " very much, conventional organic solvent heating was peeled off very difficult, causes photoresist to dissolve easily, and the indium film still is bonded on the chip and does not get rid of.The height that general indium post requires is 7 microns, and film thickness is again at least greater than 2 microns of indium post height, could satisfy the stripping process behind the metal coating, and promptly glued membrane is thick should be 9 microns at least.So the glued membrane of thickness just needs equipment such as the special thick glue photoresist spinner that applies, exposure machine, therefore needs to drop into too high cost; Especially because the developing time that needs during thick glue is longer, when the glue of window interior is removed by developing when clean, often the physical dimension on window top is also well beyond designing requirement, and its section is the washbowl shape, can not form desirable " scissors mouth " shape, so just cause when peeling off very difficultly, rate of finished products is low.The technological process of positive resist lithography technology is as follows:
Chip processing → preceding baking → gluing → contraposition → exposure → development → post bake.
The thermal evaporation plated film is the method that generally adopts both at home and abroad at present.Equipment is comparatively simple, utilizes resistance wire that the source is heated, and evaporation rate is fast; But its shortcoming is uncontrollable, and evaporating used indium source need once use up at every turn, and the loadings in indium source so the control of indium film thickness places one's entire reliance upon is difficult for accurately control thickness, and can't carries out preliminary treatment to surface, indium source.The technological process of thermal evaporation plated film is as follows:
Chip processing → load → vacuumize → evaporate → get sheet → peel off.
Summary of the invention
The technical issues that need to address of the present invention provide a kind of process for preparing accurate indium post figure.
For solving the problems of the technologies described above, the technical solution adopted in the present invention is:
The used equipment of the present invention is common photoresist spinner, exposure machine, and its method comprises three stacked positive resist lithography technology, electron beam evaporation indium film and the little ultrasonic lift-off technologies of adding.
The technological process of positive resist lithography technology is: chip processing → preceding baking → gluing → contraposition → exposure → development → post bake; The technological process of evaporation coating is: chip processing → load → vacuumize → evaporation coating → get sheet → peel off.
Positive resist lithography technology of the present invention is the three stacked photoetching techniques that add, promptly be when carrying out coating process, in the coating of positive photoresist coating intermediate preparation layer of metal film or other compound medium, make coating become the three-decker of " positive photoresist-medium or metal film-positive photoresist "; Then the thin glue in upper strata is carried out photoetching, make it become accurate figure, fall medium or metal film in the above-mentioned graphical window with wet etching again, remove the thick glue of bottom clean by developing method at last.Adopt electron beam evaporation indium film then, and adopt the little ultrasonic lift-off technology of indium film that the indium film is peeled off.
Further improvement in the technical proposal is that the three stacked technological requirements that add the gluing of photoetching technique are: the ground floor positive photoresist applies thick glue according to technological requirement, and the second layer is 80～200 nanometer medium or metal films, and the 3rd layer is 400～1000 nanometer positive photoresists.
Further improvement in the technical proposal is: above-mentioned medium and metal for not with developer solution reaction and medium or metal with certain ductility; Its medium is the wherein a kind of of silicon nitride, silicon dioxide; Metal film is wherein one or more the mixing of titanium, platinum, gold.
The thick indium film of electron beam evaporation of the present invention and little ultrasonic lift-off technology are to adopt electron beam evaporation technique to prepare the indium post.Electron beam evaporation can be by the crystal oscillator controller to the accurately control in real time of evaporation rate, thickness; At first carry out prevapourising, the oxide layer and the impurity of indium source remained on surface is vapored away; Several crucibles on the electron beam evaporation platform can evaporate several metal, and contact electrode and the flush distillation of indium post are formed; Electron beam evaporation adopts planet rolling clamp fixed chip, evaporation source to the evaporation of chip apart from greater than 30 centimetres; Adopt high vacuum evaporation, reach 9 * 10 in vacuum degree
-5Start the evaporation program during Pa, evaporation finishes the back and continues vacuum is evacuated to 10
-5Close high vacuum valve during Pa.
After above-mentioned technology is finished chip is taken out, adopt little ultrasonic lift-off technology to peel off the indium film.
The concrete grammar that above-mentioned little ultrasonic lift-off technology is peeled off the indium film is: will evaporate good chip and put in the acetone soln that has heated, soaked 30～60 seconds, treat photoresist to expand and when not dissolving fully, with ultrasonic 8～12 seconds of chip small-power, the indium film is cracked, then unnecessary indium metal is washed away with hydraulic giant.
Because the technological progress of having adopted technique scheme, the present invention to obtain is:
The thin glue in upper strata can make accurate figure by lithography, falls medium or metal film in the window with wet etching then, develops the thick glue of bottom clean at last.The key of this technology is to utilize medium (as: silicon nitride, silicon dioxide) or metal film (as: titanium, platinum, gold) not to react and have the characteristic of certain stress (being ductility) with developer solution, the physical dimension and the shape of accurate limited window, make it form desirable " scissors mouth ", the stripping process after being beneficial to metallize.The application of this deielectric-coating, having solved in original photoetching process because the overexposure of thick glued membrane and the graphical window glue edge that causes that develops effectively subsides, cause window top physical dimension well beyond designing requirement, and its section is the washbowl shape, can't forms the disadvantage of " scissors mouth ".
The present invention has adopted electron beam evaporation technique to prepare the indium post, electron beam evaporation can carry out in real time accurately control to evaporation rate, thickness, and can carry out prevapourising, the oxide layer and the impurity of indium source remained on surface is vapored away, more effectively guarantee the quality of indium film; And the electron beam evaporation platform has several crucibles, flush distillation several metal easily, but technological process has been simplified in i.e. contact electrode and indium post flush distillation formation, has shortened the technology time spent, has improved welding precision.
Electron beam evaporation adopts planet rolling clamp fixed chip, and evaporation source greater than 30 centimetres, has guaranteed the up rightness and the uniformity of evaporating to the evaporation distance of chip; Adopt high vacuum evaporation, guaranteed that the indium film is not oxidized.Adopt little ultrasonic lift-off technology that thick indium film is peeled off, guaranteed that the indium post peels off rate of finished products more than 95%.
We will adopt the pattern of the indium post of technology preparation of the present invention to take photo with the pattern of the indium post that adopts prior art for preparing, the contrast of the indium cylindricality looks of making through two kinds of technology, as can be seen, adopt the accuracy of pattern of indium post of technology of the present invention preparation apparently higher than pattern with the indium post of prior art for preparing.
Description of drawings
Fig. 1 is a coating structure schematic diagram of the present invention;
Fig. 2 is the photo with the indium post of prior art for preparing;
Fig. 3 is the indium post photo that adopts technology preparation of the present invention;
Fig. 4 utilizes the indium post of the detector photosensor chip of the technology of the present invention preparation to overlook picture;
Fig. 5 utilizes the indium post of the readout circuit chip of technology preparation of the present invention to overlook picture.
Embodiment
Below in conjunction with embodiment the present invention is described in further details:
We have following requirement by the indium post of preparation:
1) indium post height is 7～8 microns, and the photoresist thickness is no less than 10 microns;
2) photoetching rate of finished products is not less than 95%, and the window physical dimension is design load ± 2 micron;
3) uniformity of indium film thickness distribution is design load ± 10%, and the metal surface is smooth, not oxidized;
4) indium film strong adhesion is peeled off back indium post rate of finished products and is not less than 95%.
The technological process for preparing above-mentioned indium post is:
1. photoetching process
1) chip is handled: acetone-isopropyl alcohol soaked several minutes successively;
2) preceding baking: 100～180 ℃, 3 minutes;
3) be coated with ground floor glue: about 10 microns
4) post bake: 80～140 ℃, 1～5 minute;
5) depositing metal film or deielectric-coating: 80～200 nanometers
6) be coated with second layer glue: 500～1000 nanometers
7) post bake: 80～140 ℃, 1～5 minute;
8) contraposition
9) exposure
10) once develop: the second layer glue in the indium post figure is removed clean
11) corrosion: the deielectric-coating in the indium post figure is removed clean
12) redevelopment: the ground floor glue in the indium post figure is removed clean
2. indium post metallization
1) load: chip is fixed on the planetary fixture in the electron beam evaporation platform;
2) vacuumize, the thermal evaporation plated film: vacuum degree reaches 9 * 10
-5Start the evaporation program during Pa;
3) cooling: after evaporation is finished, vacuum is evacuated to 10
-5Pa closes high vacuum valve then;
4) venting is got sheet: after cooling, exit, and chip is taken out;
5) peel off: will evaporate good chip and put in the acetone soln that has heated, soak 30～60 seconds, and treat the photoresist expansion and when not dissolving fully, and, the indium film be cracked, and then unnecessary indium metal be washed away with hydraulic giant with ultrasonic 10 seconds of chip small-power.
What gluing adopted is the coating method of " positive photoresist-medium or metal film-positive photoresist " structure.Behind the gluing the thin glue in upper strata is carried out photoetching, make it become accurate figure, fall medium or metal film in the above-mentioned graphical window with wet etching again, remove the thick glue of bottom clean by developing method at last.Adopt electron beam evaporation indium film then, and adopt the little ultrasonic lift-off technology of indium film that the indium film is peeled off.
The concrete grammar of electron beam evaporation deposition is: electron beam evaporation indium film device therefor is crystal oscillator controller and electron beam evaporation platform, electron beam evaporation adopts planet rolling clamp fixed chip, evaporation source greater than 30 centimetres, has guaranteed the up rightness and the uniformity of evaporation to the evaporation of chip distance; Adopt high vacuum evaporation, reach 9 * 10 in vacuum degree
-5Start the evaporation program during Pa, evaporation finishes the back and continues vacuum is evacuated to 10
-5Close high vacuum valve during Pa; And adopt the little ultrasonic lift-off technology of indium film that the indium film is peeled off.
Claims (5)
1, a kind of method for preparing the indium post, comprise that technological process is that the positive resist lithography technology and the technological process of chip processing, preceding baking, gluing, contraposition, exposure, development, post bake is chip processing, load, the electron beam evaporation indium film and the little ultrasonic lift-off technology that vacuumize, evaporate, get sheet, peel off, it is characterized in that: when carrying out positive resist lithography technology coating process, at positive photoresist coating intermediate preparation layer of metal film or other deielectric-coating, make coating become the structure of " positive photoresist thick-layer-medium or metal film-positive photoresist thin layer "; Thin glue with the upper strata is photo-etched into figure then, erodes medium or metal film in the graphical window, removes the thick glue of bottom clean by developing method again; Adopt electron beam evaporation indium film then, and adopt indium film micro-ultrasonic lift-off technology that the indium film is peeled off.
2, a kind of method for preparing the indium post according to claim 1, it is characterized in that described coating process is the positive photoresist of ground floor coating processes required thickness, second layer coating thickness is 80～200 nanometer medium or metal films, and the 3rd layer of coating thickness is the positive photoresist of 400～1000 nanometers.
3, according to claim 1 or 2 described a kind of methods that prepare the indium post, it is characterized in that described medium or metal for not with developer solution reaction and medium or metal with certain ductility; Its medium is the wherein a kind of of silicon nitride, silicon dioxide; Metal film is wherein one or more the mixing of titanium, platinum, gold.
4, a kind of method for preparing the indium post according to claim 1, it is characterized in that described electron beam evaporation indium film device therefor is crystal oscillator controller and electron beam evaporation platform, chip is fixed on the planet rolling clamp, evaporation source greater than 30 centimetres, has guaranteed the up rightness and the uniformity of evaporation to the evaporation of chip distance; Adopt high vacuum evaporation, the second layer glue in the indium post figure is being removed totally, evaporation finishes the back and continues vacuum is evacuated to 10
-5Close high vacuum valve during Pa; And adopt the little ultrasonic lift-off technology of indium film that the indium film is peeled off.
5, a kind of method for preparing the indium post according to claim 4, the concrete grammar that it is characterized in that described little ultrasonic lift-off technology is that the chip that evaporation is good is put in the acetone soln that has heated, soaked 30～60 seconds, treat photoresist to expand and when not dissolving fully, chip is used small-power ultrasonic vibration 8～12 seconds, the indium film is cracked, and then water washes away unnecessary indium metal.
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| CN200710139334A CN100576579C (en) | 2007-09-03 | 2007-09-03 | A kind of method for preparing the indium post |
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| CN200710139334A CN100576579C (en) | 2007-09-03 | 2007-09-03 | A kind of method for preparing the indium post |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106816392A (en) * | 2016-12-07 | 2017-06-09 | 西南技术物理研究所 | Focal plane detector indium column plasma backflow pelletizing method |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102544217A (en) * | 2012-01-16 | 2012-07-04 | 中国电子科技集团公司第十一研究所 | Large-scale indium column generation method for infrared focal plane detector |
| CN103413814B (en) * | 2013-07-30 | 2015-07-29 | 中国科学院上海技术物理研究所 | The preparation method of infrared focal plane device high density fine indium styletable face leveling |
| CN106024982A (en) * | 2016-07-11 | 2016-10-12 | 中国科学院上海技术物理研究所 | Preparation method for indium column of infrared focal plane chip |
| CN112652540B (en) | 2020-07-01 | 2022-04-22 | 腾讯科技（深圳）有限公司 | Indium column welding spot preparation method, chip substrate and chip |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106816392A (en) * | 2016-12-07 | 2017-06-09 | 西南技术物理研究所 | Focal plane detector indium column plasma backflow pelletizing method |
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Assignee: Shijiazhuang Development Zone North-Chian Integrated Circuit Design Co., Ltd. Assignor: Inst No.13, Chinese Electronic Science and Technology Group Co Contract record no.: 2010130000122 Denomination of invention: Method for manufacturing indium column Granted publication date: 20091230 License type: Exclusive License Open date: 20080227 Record date: 20101228 |