CN100561697C - A kind of manufacture method of solder bump - Google Patents
A kind of manufacture method of solder bump Download PDFInfo
- Publication number
- CN100561697C CN100561697C CNB2006101477884A CN200610147788A CN100561697C CN 100561697 C CN100561697 C CN 100561697C CN B2006101477884 A CNB2006101477884 A CN B2006101477884A CN 200610147788 A CN200610147788 A CN 200610147788A CN 100561697 C CN100561697 C CN 100561697C
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- dry film
- salient point
- layer
- solder bump
- film photoresist
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/118—Post-treatment of the bump connector
- H01L2224/11848—Thermal treatments, e.g. annealing, controlled cooling
- H01L2224/11849—Reflowing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/119—Methods of manufacturing bump connectors involving a specific sequence of method steps
- H01L2224/11912—Methods of manufacturing bump connectors involving a specific sequence of method steps the bump being used as a mask for patterning other parts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
A kind of manufacture method that can control the salient point of undercutting comprises: form ubm layer on the wafer that is formed with pad; Form the dry film photoresist layer; The salient point patterns of openings of exposure, the formation photoresist that develops; Copper electroplating layer and nickel dam in opening are filled convex point material again in opening; Remove photoresist; With the salient point is metal under the mask etching salient point; High temperature reflux.This method can be used for 12 " wafer, the processing procedure permission of metal etch under the raising salient point, and the undercutting of easier control salient point, and also resulting salient point is firmer.
Description
Technical field
The present invention relates to the manufacture method of solder bump in the semiconductor fabrication, particularly relate to the manufacture method of the solder bump that can control undercutting.
Background technology
Although face-down bonding technique has existed 30 years, just began to obtain volume production in recent years.The development of substrate technology and material technology exploitation has quickened to adopt senior encapsulation technology.Along with the continuation of terminal client to the encapsulation requirement of more complicated and multi-purpose device increases fast, brought the more complicated and demand greater functionality device package.Senior encapsulation technology the earliest is the application of wafer salient point, its be form with salient point or ball with solder application in the wafer scale device.
The wafer salient point has replaced metal wire and has connected the selection that conduct is used for the interconnection of component count growth.The application of wafer salient point is the driving that needed by performance, form factor or array interconnect.Electroplate in the solder bump technological process typical.Comprise under the salient point metal etch, prefluxing under metal deposit, resist coating and exposure, development, plating, the salient point, reflux, remove scaling powder etc. again.In this flow process, institute is liquid photoresist with photoresist.Make the plating solder bump in the open area that photoresist forms.Photoresist layer can be removed, and ubm layer can be that mask carries out etching to electroplate solder bump." generally adopt copper and titanium as ubm layer in the application of wafer, so the control of undercutting always become big problem because 12.In isotropic etching, undercutting (undercut) is the subject matter that influences the shearing test result.This is because the density of the copper layer of sputtering deposit greater than the density of copper electroplating layer, therefore is positioned at the easy overetch of copper electroplating layer above the double-decker copper layer, forms inwardly recessed otch under the nickel below solder bump (Ni) separator.Shearing force testing result to solder bump causes negative effect thus.Make the reliability decrease of solder bump and semiconductor device.
The dystectic titanium oxide nitride layer of one deck is arranged on solder bump,, and seriously hinder scolder, therefore need removal closing on the wetting of connection surface because this titanium oxide nitride layer limits flowing of solder bump.In order to remove the high-melting-point titanium oxide nitride that covers on the solder bump, deposit one deck scaling powder on solder structure refluxes in the boiler tube reflux technique to solder bump then again usually, forms solder ball.
Deposit scaling powder in order to destroy the high-melting-point titanium oxide nitride to cover this solder structure on solder structure, solder bump carries out reflux technique in stove then.This layer restriction flow of solder material and stop wetting will in conjunction with neighbouring surface.
Summary of the invention
Technical problem to be solved by this invention provides a kind of manufacture method that can control the solder bump of undercutting.
The manufacture method of solder bump of the present invention comprises the steps:
Sputter forms ubm layer on the wafer that is formed with pad;
Form the dry film photoresist layer;
The salient point patterns of openings of exposure, the formation photoresist that develops;
Copper electroplating layer and nickel dam in opening;
In opening, fill convex point material;
Remove photoresist;
With the solder bump is the mask etching ubm layer;
The deposit scaling powder;
High temperature reflux.
Manufacture method according to solder bump of the present invention is preferred for 12 " wafer.
According to ubm layer of the present invention is copper or titanium.
Dry film photoresist of the present invention, preferably Asahi CX-A240, TOK Ordyl P-50120.
The dry film photoresist can be rolled on the wafer with the nip drum machine, and usually with pressure 0.2～0.5mPa, temperature is 80～100 ℃, and speed is the condition roll extrusion of 0.5～1.5m/min.Gluing between dry film photoresist and the ubm layer under this condition with better.The pressure that glues and depend primarily on roll extrusion between dry film photoresist and the ubm layer, high more ubm layer of rolling pressure and dry film photoresist is sticking and good more usually.If go for slight copper plating (foot plating) and after electroplating scolder dry film photoresist profile still firm, then preferred rolling pressure is 0.2～0.3mPa.The thickness of the dry film photoresist that roll extrusion forms is 100～140 μ m, is preferably 120～140 μ m.
Common dry film photoresist layer exposure parameter of the present invention is exposure energy and focal length.Preferred adopt the g linear light, and preferably to adopt energy be 200～500mJ/cm
2Its profile can be adjusted to the profile of inclination by suitable focal length.
Before electroplating convex point material, electroplate a bronze medal layer and a nickel dam earlier.Preferred ROHM AND HAAS electron level electroplate liquid copper electroplating layer and the nickel dam of adopting.When electro-coppering, under the dry film photoresist profile that specific roll extrusion condition forms, electroplate liquid will be penetrated into the corner, edge of dry film photoresist profile, and this phenomenon is called " plating " at this.Carry out the plating of scolder with ROHM AND HAAS electron level electroplate liquid then, the preferred solder convex point material is tin lead, tin-silver solder, and more preferably convex point material is the eutectic tin lead of tin 63%, lead 37%.
Removing photoresist layer again, is mask with the salient point, metal under the unnecessary salient point is carried out isotropic etching remove.Because the existence of plating, can form less undercutting during metal under the etching salient point.
On bump structure, deposit scaling powder, to prevent the formation of high-melting-point titanium oxide nitride and to cover bump structure that this cover layer can limit solder reflow and the serious scolder that hinders is desired the wetting of mating surface to vicinity.
Carry out high temperature reflux then, form solder ball.
The manufacture method of solder bump of the present invention is used for 12 " wafer, the processing procedure permission of metal etch under the raising salient point, and the undercutting degree of easier control salient point, and also resulting salient point is firmer.The present invention uses dry film photoresist (DRF), compares with liquid photoresist, has the advantage of low-cost and high production capacity.
Description of drawings
Fig. 1 is the profile of the making flow process of expression solder bump of the present invention.
Fig. 2 is in the solder bump manufacturing process of the present invention, and roll extrusion forms the schematic diagram of dry film photoresist layer.
Fig. 3 A is in the traditional solder bump manufacturing process, the section SEM figure after the exposure of liquid photoresist film.
Fig. 3 B is in the solder bump manufacturing process of the present invention, the section SEM figure behind the dry film resist exposure.
Fig. 4 A is in the traditional solder bump manufacturing process, and the section SEM figure after the electro-coppering does not wherein have the plating phenomenon.
Fig. 4 B is in the solder bump manufacturing process of the present invention, and the electroplate liquid plating is schemed to the section SEM under the dry film photoresist.
Fig. 5 A is in the traditional solder bump manufacturing process, and the section SEM figure under the etching salient point behind the metal wherein has very serious undercutting to produce.
Fig. 5 B is in the solder bump manufacturing process of the present invention, and the section SEM figure under the etching salient point behind the metal produces less undercutting.
Fig. 6 is the section SEM figure behind the solder bump high temperature reflux of the present invention.
Description of reference numerals
1 is formed with the wafer of pad
Metal sputtering copper layer under 2 salient points
3 dry film photoresists
31 exposure profiles
4 openings
5 copper electroplating layers
6 electroless nickel layers
7 solder bumps
9 platings
10 undercutting
3 ' liquid photoresist layer
31 ' exposure profile
4 ' opening
5 ' copper electroplating layer
6 ' electroless nickel layer
7 ' solder bump
9 ' no plating
10 ' undercutting
15 nip drum machines
Embodiment
Introduce the present invention in detail below by embodiment.
Embodiment
With 12 " silicon wafer on to make the tin-lead solder salient point according to method of the present invention be that example describes.
Fig. 1 is illustrated in the process profile of making solder bump on the silicon wafer that has formed pad.
Shown in Figure 1A, on the silicon wafer 1 that has formed pad, adopt sputtering method to form metal copper layer under the salient point, thickness is 5 μ m.
As shown in Figure 2, with nip drum machine 15, usually with pressure 0.2～0.5mPa, temperature is 80～100 ℃, and speed is 0.5～1.5m/min, is that the dry film photoresist layer of 100～140 μ m is rolled on the silicon wafer 3 with thickness.The pressure that glues and depend primarily on roll extrusion between dry film photoresist and the ubm layer.Usually high more ubm layer of rolling pressure and dry film photoresist is sticking and good more.If go for slight copper plating (foot plating) and after electroplating scolder dry film photoresist profile still firm, then preferred rolling pressure is 0.2～0.3mPa.Gluing between dry film photoresist and the ubm layer under this condition with better.
For example, in the present embodiment, pressure is 0.3mPa, and temperature is 105 ℃, and speed is 1.0m/min, with dry film photoresist 3, as Asahi CX-A240, TOK Ordyl P-50120 dry film photoresist, is rolled on the silicon wafer 1, and thickness is 120 μ m.
Common dry film photoresist layer exposure parameter of the present invention is exposure energy and focal length.The preferred energy of g linear light that adopts can be 200～500mJ/cm
2Its profile can be adjusted to the profile of inclination by suitable focal length, shown in Fig. 3 B.Wherein 31 is exposed portion profiles, and as can be seen from the figure the side of its exposed portion 31 tilts, and helps forming plating in follow-up electro-coppering process.Develop according to conventional method then, formation will be electroplated the opening 4 of filling scolder, shown in Fig. 1 C.
Before electroplating scolder, with ROHM AND HAAS electron level electroplate liquid copper to be electroplated earlier and formed layer of copper layer 5, thickness is 5 μ m.Under the dry film photoresist profile that specific roll extrusion condition forms, electroplate liquid will be penetrated into the corner, edge of dry film photoresist profile, be called " plating " at this, and shown in 9 among Fig. 4 B, the thickness of plating is 1～2 μ m.
And then electroless nickel layer 6, thickness is 1 μ m, is diffused in the solder bump to prevent copper, and the re-plating eutectic tin-lead solder, wherein tin-lead solder is a tin 63%, plumbous 37%.After the electrotinning kupper solder forms salient point 7, with this solder bump 7 is metallic copper under the unnecessary salient point of mask etching, at this moment owing to there is the electro-coppering of 1～2 μ m to give prominence in the bottom, therefore, when carrying out isotropic etching, shown in Fig. 5 B, produce less undercutting 10 as can be seen, its degree of depth has only 1～2 μ m.
The deposit scaling powder, and carry out high temperature reflux.
Fig. 6 is the section SEM figure of the solder ball that forms behind the solder bump high temperature reflux of this embodiment.The solder ball outward appearance of as can be seen from the figure passing through behind the high temperature reflux is fine, and its mechanical performance excellence, and the shearing force specification that can satisfy as the eutectic tin-lead solder ball is the specification requirement greater than the 35.4g/ salient point.
Comparative example
With 12 " silicon wafer on to make the tin-lead solder salient point according to conventional method be that example describes.
On the wafer 1 that has formed pad, adopt sputtering method to form metal copper layer 2 under the salient point, thickness is 3000A.
Adopt spin-coating method to form the liquid photoresist film, as LA900PM, thickness is 60 μ m, exposes after prebake conditions, forms photoresist profile as shown in Figure 3A.Wherein, 3 ' be photoresist layer, 31 ' be exposed portion.
As can be seen, the outline of exposed portion is more vertical from Fig. 3 A.
Behind the photoresist by the removal exposed portion that develops, formation opening 4 ' and carry out the back baking.
Then opening 4 ' middle copper electroplating layer 5 ', thickness is 5 μ m, re-plating form a nickel dam 6 ', thickness is 1 μ m, is diffused in the solder bump to prevent copper.The film that liquid photoresist forms is not because therefore sticking and very good with ubm layer can produce plating in the electroplate liquid of electro-coppering.Shown in 9 among Fig. 4 A '.
Re-plating eutectic tin-lead solder formation solder bump 7 ', wherein tin-lead solder is Sn63%, Pb37%.The electrotinning kupper solder form salient point 7 ' after, with this solder bump 7 ' be metallic copper under the unnecessary salient point of mask etching, shown in Fig. 5 A, the undercutting 10 that generation is bigger as can be seen ', its degree of depth can reach 5～6 μ m.
The solution of the present invention that adopts the dry film photoresist compares with the scheme of the comparative example that adopts liquid photoresist, and the undercutting that the former not only produces is little and can control, and the solder ball that obtains is enough firm.
Because the expense of dry film pad pasting board is 1/2 of a wet film coating machine platform, dry film film coating process ratio is easier to control, and the cost of raw material of dry film is more cheap than wet film, therefore adopts method of the present invention can significantly reduce cost of manufacture, and easy volume production.
Though the present invention has been carried out comparatively detailed explanation by above embodiment, but the present invention is not limited only to above embodiment, under the situation that does not break away from the present invention's design, can also comprise more other equivalent embodiment, and scope of the present invention is by appended claim scope decision.
Claims (10)
1. the manufacture method of a solder bump in turn includes the following steps:
Sputter forms ubm layer on the wafer that is formed with pad;
Form the dry film photoresist layer;
The salient point patterns of openings that expose, development forms photoresist then;
First copper electroplating layer, electroless nickel layer then in described opening; In the described electroplating process, adopt the plating mode to make plating solution infiltration arrive the corner, edge of dry film photoresist profile;
In described opening, fill the solder bump material;
Remove photoresist;
With the solder bump is the mask etching ubm layer;
The deposit scaling powder;
High temperature reflux.
2. method according to claim 1 is characterized in that, described wafer is 12 " wafers.
3. method according to claim 1 is characterized in that, described dry film photoresist is Asahi CX-A240 or TOK Ordyl P-50120.
4. method according to claim 1 is characterized in that, described dry film photoresist layer thickness is 100～140 μ m.
5. method according to claim 4 is characterized in that, described dry film photoresist layer thickness is 120～140 μ m.
6. according to each the described method in the claim 1～5, it is characterized in that described dry film photoresist layer is to form by roll extrusion.
7. method according to claim 6 is characterized in that, described roll extrusion condition is pressure 0.2～0.5mPa, and temperature is 80～105 ℃, and speed is 0.5～1.5m/min.
8. method according to claim 7 is characterized in that, described roll extrusion condition is pressure 0.2～0.3mPa, and temperature is 105 ℃, and speed is 1m/min.
9. method according to claim 1 is characterized in that, the g linear light is adopted in described exposure, and energy is 200～500mJ/cm
2
10. method according to claim 1 is characterized in that, metal is copper or titanium under the salient point of described sputter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101477884A CN100561697C (en) | 2006-12-22 | 2006-12-22 | A kind of manufacture method of solder bump |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101477884A CN100561697C (en) | 2006-12-22 | 2006-12-22 | A kind of manufacture method of solder bump |
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| Publication Number | Publication Date |
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| CN101207047A CN101207047A (en) | 2008-06-25 |
| CN100561697C true CN100561697C (en) | 2009-11-18 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2006101477884A Expired - Fee Related CN100561697C (en) | 2006-12-22 | 2006-12-22 | A kind of manufacture method of solder bump |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101882596B (en) * | 2009-05-08 | 2012-06-06 | 中芯国际集成电路制造(上海)有限公司 | Method for etching metal layer |
| CN102496584A (en) * | 2011-12-19 | 2012-06-13 | 南通富士通微电子股份有限公司 | Method for forming solder bump |
| CN102496580B (en) * | 2011-12-19 | 2016-02-03 | 南通富士通微电子股份有限公司 | A kind of formation method of solder bump |
| CN104427781B (en) * | 2013-09-11 | 2019-05-17 | 花王株式会社 | The manufacturing method of resin mask layer detergent composition and circuit substrate |
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| CN101207047A (en) | 2008-06-25 |
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Effective date of registration: 20111201 Address after: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Co-patentee after: Semiconductor Manufacturing International (Beijing) Corporation Patentee after: Semiconductor Manufacturing International (Shanghai) Corporation Address before: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Patentee before: Semiconductor Manufacturing International (Shanghai) Corporation |
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