CN100533693C - 用于制造深结绝缘体上硅晶体管的方法 - Google Patents
用于制造深结绝缘体上硅晶体管的方法 Download PDFInfo
- Publication number
- CN100533693C CN100533693C CNB2007100963697A CN200710096369A CN100533693C CN 100533693 C CN100533693 C CN 100533693C CN B2007100963697 A CNB2007100963697 A CN B2007100963697A CN 200710096369 A CN200710096369 A CN 200710096369A CN 100533693 C CN100533693 C CN 100533693C
- Authority
- CN
- China
- Prior art keywords
- implantation step
- grid
- layer
- semiconductor
- dielectric layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims abstract description 30
- 239000012212 insulator Substances 0.000 title claims abstract description 21
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000002019 doping agent Substances 0.000 claims abstract description 44
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 238000002513 implantation Methods 0.000 claims description 43
- 238000002347 injection Methods 0.000 claims description 15
- 239000007924 injection Substances 0.000 claims description 15
- 238000000576 coating method Methods 0.000 claims description 13
- 230000008569 process Effects 0.000 claims description 9
- 210000000746 body region Anatomy 0.000 claims description 6
- 239000004020 conductor Substances 0.000 abstract description 53
- 239000004065 semiconductor Substances 0.000 abstract description 47
- 125000006850 spacer group Chemical group 0.000 description 26
- 239000000463 material Substances 0.000 description 11
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 9
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 229920005591 polysilicon Polymers 0.000 description 7
- 238000009826 distribution Methods 0.000 description 5
- 230000000873 masking effect Effects 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000005669 field effect Effects 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 230000004224 protection Effects 0.000 description 4
- 238000000926 separation method Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 238000012797 qualification Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 239000006117 anti-reflective coating Substances 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
Claims (13)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/308,685 | 2006-04-21 | ||
US11/308,685 US7534667B2 (en) | 2006-04-21 | 2006-04-21 | Structure and method for fabrication of deep junction silicon-on-insulator transistors |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101060086A CN101060086A (zh) | 2007-10-24 |
CN100533693C true CN100533693C (zh) | 2009-08-26 |
Family
ID=38619984
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2007100963697A Expired - Fee Related CN100533693C (zh) | 2006-04-21 | 2007-04-16 | 用于制造深结绝缘体上硅晶体管的方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7534667B2 (zh) |
JP (1) | JP2007294950A (zh) |
CN (1) | CN100533693C (zh) |
TW (1) | TW200746362A (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113517185A (zh) * | 2020-04-10 | 2021-10-19 | 中芯北方集成电路制造(北京)有限公司 | 半导体结构及其形成方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63271972A (ja) * | 1987-04-28 | 1988-11-09 | Sony Corp | 薄膜トランジスタの製法 |
JPH01278768A (ja) * | 1988-04-27 | 1989-11-09 | General Electric Co <Ge> | ソースおよびドレイン深さ延長部を有する半導体装置とその製造方法 |
US6503783B1 (en) * | 2000-08-31 | 2003-01-07 | Micron Technology, Inc. | SOI CMOS device with reduced DIBL |
US6294413B1 (en) * | 2000-12-27 | 2001-09-25 | Vanguard International Semiconductor Corp. | Method for fabricating a SOI (silicon on insulator) device |
JP2006120814A (ja) * | 2004-10-21 | 2006-05-11 | Renesas Technology Corp | 半導体装置の製造方法 |
-
2006
- 2006-04-21 US US11/308,685 patent/US7534667B2/en not_active Expired - Fee Related
-
2007
- 2007-04-10 TW TW096112528A patent/TW200746362A/zh unknown
- 2007-04-11 JP JP2007103478A patent/JP2007294950A/ja active Pending
- 2007-04-16 CN CNB2007100963697A patent/CN100533693C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20070249126A1 (en) | 2007-10-25 |
CN101060086A (zh) | 2007-10-24 |
JP2007294950A (ja) | 2007-11-08 |
US7534667B2 (en) | 2009-05-19 |
TW200746362A (en) | 2007-12-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101203960B (zh) | 具有高击穿电压的半导体器件及其制造方法 | |
US8174071B2 (en) | High voltage LDMOS transistor | |
CN102217074B (zh) | 鳍式场效应晶体管(finfet) | |
JP7293293B2 (ja) | 高電圧隔離のためのデュアルディープトレンチ | |
US8030173B2 (en) | Silicon nitride hardstop encapsulation layer for STI region | |
CN102456737A (zh) | 半导体结构及其制造方法 | |
CN101346819B (zh) | 具有凹陷场板的半导体器件及其制作方法 | |
CN102893380A (zh) | 不对称外延生长及其应用 | |
CN103210493A (zh) | 邻接的soi结隔离结构和器件以及制造方法 | |
CN101894741B (zh) | 混合半导体基片的制造方法 | |
CN102187466A (zh) | 半导体器件和这种器件的制造方法 | |
US20180012992A1 (en) | Semiconductor device and method of forming the same | |
CN102655150A (zh) | 半导体器件以及半导体器件的制造方法 | |
US7550330B2 (en) | Deep junction SOI MOSFET with enhanced edge body contacts | |
CN101720505A (zh) | 静电释放保护器件及制造包含静电释放保护器件的半导体器件的方法 | |
CN102446953A (zh) | 一种半导体结构及其制造方法 | |
US8097930B2 (en) | Semiconductor devices with trench isolations | |
CN109216281B (zh) | 在电子芯片中的半导体区域的制作 | |
US7521380B2 (en) | Methods for fabricating a stress enhanced semiconductor device having narrow pitch and wide pitch transistors | |
CN100533693C (zh) | 用于制造深结绝缘体上硅晶体管的方法 | |
CN101393893B (zh) | 具有不同侧壁层宽度的cmos器件及其制造方法 | |
CN103794501B (zh) | 晶体管及其形成方法 | |
US9514996B2 (en) | Process for fabricating SOI transistors for an increased integration density | |
CN105489606A (zh) | 半导体器件及其制造方法 | |
US11094834B2 (en) | Junction field effect transistor (JFET) structure and methods to form same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right |
Effective date of registration: 20171101 Address after: Grand Cayman, Cayman Islands Patentee after: GLOBALFOUNDRIES INC. Address before: American New York Patentee before: Core USA second LLC Effective date of registration: 20171101 Address after: American New York Patentee after: Core USA second LLC Address before: American New York Patentee before: International Business Machines Corp. |
|
TR01 | Transfer of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090826 Termination date: 20190416 |
|
CF01 | Termination of patent right due to non-payment of annual fee |