CN100426109C - Picture element array structure of liquid crystal display and producing method thereof - Google Patents
Picture element array structure of liquid crystal display and producing method thereof Download PDFInfo
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- CN100426109C CN100426109C CNB2006101685247A CN200610168524A CN100426109C CN 100426109 C CN100426109 C CN 100426109C CN B2006101685247 A CNB2006101685247 A CN B2006101685247A CN 200610168524 A CN200610168524 A CN 200610168524A CN 100426109 C CN100426109 C CN 100426109C
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Abstract
A kind of the LCD display pixel array structure and its fabrication method, using five masks accomplishes the fabrication of the entire pixel array. The deposition step of the bar dielectric is to be completed in twice in the pixel array structure to increase deposited capacitance of the storing capacitor.
Description
[technical field]
The invention relates to a kind of LCD and manufacture method thereof, and particularly relevant for a kind of picture element array structure and manufacture method thereof of LCD.
[background technology]
Recently photoelectric technology is constantly weeded out the old and bring forth the new, and adds the arrival of digital times, has promoted the flourish of LCD market.LCD because have that high image quality, volume are little, in light weight, numerous advantages such as low driving voltage and low consumpting power.Therefore be widely used in PDA(Personal Digital Assistant), mobile phone, shoot with video-corder projector, on consumer communication such as notebook computer, desktop display, automobile-used display and projection TV or the electronic product, and replace cathode-ray tube (CRT) gradually, and become the main flow of display.
The manufacture method of the picture element array structure of LCD mainly is to combine with deposition, three kinds of different manufacture crafts of photoetching and etching now.In these three kinds of manufacture crafts, the production cost shared with photoetching making technology is the highest.Therefore to how to reduce the needed photoetching making technology of tft array substrate whole manufacturing process number, that is reduce required mask count, just become panel big factory in various countries' to reduce the primary problem of production of liquid crystal displays cost.
[summary of the invention]
Therefore one of purpose of the present invention is in picture element array structure that a kind of LCD is provided and manufacture method thereof.
State on according to the present invention and other purposes, propose a kind of manufacture method of picture element array structure of LCD.At first, in the active member district of substrate, form the silicon island, on substrate and silicon island, form first grid dielectric layer again.Then, form the data line and first electrode on first grid dielectric layer, wherein data line bit is in the outside in active member district, and the first electrode position is on capacitive region.
On first grid dielectric layer, data line and first electrode, form second gate dielectric layer in regular turn then, again in forming grid that lays respectively on the silicon island and second electrode that is positioned on first electrode on second gate dielectric layer.With the grid is mask, and the ion doping manufacture craft is carried out in the silicon island, forms source electrode and drain electrode respectively at the two ends of silicon island.The lap of the first above-mentioned electrode, second gate dielectric layer and second electrode constitutes first reservior capacitor.
On second gate dielectric layer, grid and second electrode, form dielectric layer and transparency conducting layer in regular turn.Pattern dielectric layer and transparency conducting layer form a plurality of openings among dielectric layer and transparency conducting layer then, to expose surface on data line, source electrode, drain electrode and first electrode respectively.Then forming the 3rd metal level among the above-mentioned opening with on the transparency conducting layer, simultaneously patterning the 3rd metal level and transparency conducting layer again, form first lead and the drain electrode and first interelectrode second lead between pixel electrode, source electrode and data line, finish the manufacturing of dot structure.
State on according to the present invention and other purposes, propose a kind of picture element array structure of LCD, this picture element array structure comprises following element.Be positioned at the silicon island in the active member district of substrate, the two ends, silicon island respectively have source electrode and the drain electrode that a doped region is respectively membrane transistor.Be positioned at the first grid dielectric layer on silicon island and the substrate, and the data line and first electrode of position in the substrate capacitance district that are positioned at the substrate active region outside.
Be positioned at second gate dielectric layer on first grid dielectric layer, data line and first electrode, and the grid of position on second gate dielectric layer above the central authorities of silicon island.Second electrode of position on second gate dielectric layer above first electrode, wherein first electrode, second gate dielectric layer and second electrode constitute first reservior capacitor.
Be positioned at the dielectric layer on second gate dielectric layer, grid and second electrode, and have the surface that a plurality of openings expose data line, source electrode, drain electrode and first electrode respectively in the dielectric layer.The position connects first lead of data line and source electrode among above-mentioned opening; And the position connects second lead of the drain electrode and first electrode among above-mentioned opening.Also have the pixel electrode of position on the substrate pixel zone in addition.
State on according to the present invention and other purposes, also propose the LCD of utilizing above-mentioned dot structure to form.Above-mentioned dot structure for example is set on first substrate, the array structure of colored filter is set on second substrate, again liquid crystal layer is clipped between first substrate and second substrate, constitute LCD.
[description of drawings]
State with other purposes, feature, advantage and embodiment and can become apparent, appended graphic being described in detail as follows on the present invention for allowing:
Fig. 1-the 5th illustrates the manufacturing process diagrammatic cross-section according to the picture element array structure of a kind of LCD of a preferred embodiment of the present invention.
Fig. 6 system illustrates the cross-sectional view of general LCD.
[embodiment]
Please refer to Fig. 1-5, it illustrates the manufacturing process diagrammatic cross-section according to the picture element array structure of a kind of LCD of a preferred embodiment of the present invention.
In Fig. 1, on substrate 100, form one deck polysilicon layer, can divide into active member district 102, capacitive region 104 and pixel region 106 on the substrate 100.Then, the patterned polysilicon layer forms silicon island 115 on active member district 102.The formation method of above-mentioned polysilicon layer and the method for patterning for example can be respectively chemical vapour deposition technique and chemical wet etching method.
In Fig. 2, on substrate 100 and silicon island 115, form first grid dielectric layer 120 and the first metal layer in regular turn.The patterning the first metal layer forms data line 125 in the outside in active member district 102, and form first electrode 130 on capacitive region 104 then.
The material of above-mentioned first grid dielectric layer 120 for example can be monox, silicon nitride or silicon oxynitride, and the formation method of first grid dielectric layer 120 for example can be chemical vapour deposition technique.The material of above-mentioned the first metal layer for example can be aluminium copper, copper metal or other available conductive materials, and the formation method of the first metal layer and patterning method for example can be respectively physics or chemical vapour deposition technique and chemical wet etching method.
In Fig. 3, on first grid dielectric layer 120, data line 125 and first electrode 130, form second gate dielectric layer 135 and second metal level in regular turn.Patterning second metal level forms grid 140 on silicon island 115 then, and forms second electrode 145 on first electrode 130.Then, be mask with grid 140, the ion doping manufacture craft is carried out in silicon island 115,115 two ends form source electrode 150 and drain electrode 155 respectively in the silicon island.The lap of first electrode 130, second gate dielectric layer 135 and second electrode 145 constitutes first reservior capacitor.By forming the data line 125 and first electrode 130 simultaneously, can under the condition that does not increase mask count, additionally increase by first reservior capacitor that metal is made at this, increase the electric capacity of reservior capacitor.
In addition, also can select again further to allow the size of grid 140 dwindle to the grid 140 etching manufacture craft that wets.Be mask with the grid after dwindling 140 then, once more the lower ion doping manufacture craft of doping content is carried out in silicon island 115, inboard in source electrode 150 and drain electrode 155 forms light doped region 160, with the operating performance of further improvement by grid 140, source electrode 150 and 155 electric crystals of being formed that drain.
The material of the second above-mentioned gate dielectric layer 135 for example can be monox, silicon nitride or silicon oxynitride, and the formation method of second gate dielectric layer 135 for example can be chemical vapour deposition technique.The material of the second above-mentioned metal level for example can be aluminium copper, copper metal or other available conductive materials, and the formation method of second metal level and patterning method for example can be respectively physics or chemical vapour deposition technique and chemical wet etching method.
In Fig. 4, on second gate dielectric layer 135, grid 140 and second electrode 145, form dielectric layer 165 and transparency conducting layer 170 in regular turn.Pattern dielectric layer 165 and transparency conducting layer 170 form opening 175,180,185 and 190 among dielectric layer 165 and transparency conducting layer 170 then, to expose surface on data line 125, source electrode 150, drain electrode 155 and first electrode 130 respectively.
The material of above-mentioned dielectric layer 165 for example can be monox, and its formation method for example can be chemical vapour deposition technique.The material of above-mentioned transparency conducting layer 170 for example can be tin indium oxide (ITO), aluminum zinc oxide (AZO) or oxidation steel zinc (IZO), and its formation method for example can be chemistry or physical vaporous deposition.Above-mentioned pattern dielectric layer 165 for example can be the chemical wet etching method with the method for transparency conducting layer 170.
In Fig. 5, forming the 3rd metal level among opening 175,180,185 and 190 and on the transparency conducting layer 170, patterning the 3rd metal level and transparency conducting layer 170 form first lead 195 of 125 of pixel electrode 170a on pixel region 106, source electrode 150 and data lines and second lead 200 of 130 at 155 and first electrode of draining then.Wherein, second electrode 145, dielectric layer 165 constitute second reservior capacitor with the lap of pixel electrode 170a.
The material of the 3rd above-mentioned metal level for example can be aluminium copper, copper metal or other available conductive materials, and the formation method of the 3rd metal level and patterning method for example can be respectively physics or chemical vapour deposition technique and chemical wet etching method.Above-mentioned patterning the 3rd metal level and the method for transparency conducting layer 170 for example can be the chemical wet etching method.Because in the step of patterning the 3rd metal level and transparency conducting layer 170, zone beyond first lead 195 and second lead 200, have two kinds to remove the degree of depth: a kind of for the exposed region of pixel electrode 170a (main position is on pixel region 106), only remove the 3rd conductive layer on the transparency conducting layer 170; And the zone beyond the pixel electrode 170a exposed region then is that the 3rd metal level and transparency conducting layer 170 are all removed it.Therefore, the method in this available photoetching for example can be half mode (half-tone) exposure method.
Above-mentioned picture element array structure can be applicable on any suitable flat-panel screens, for example LCD.Please refer to Fig. 6, it is the cross-sectional view that illustrates general LCD.In Fig. 6, the liquid crystal layer 215 that LCD 220 has first substrate 205, second substrate 210 and is clipped in the middle.If on first substrate 205, picture element array structure is set, the array structure of colored filter then can be set on second substrate 210, make second substrate 210 as color filter.Because therefore the many variations of liquid crystal display device structure gives unnecessary details no longer one by one for being familiar with the people institute well known of this skill, in Fig. 6, do not show detailed structure yet.
By the invention described above preferred embodiment as can be known, use five road masks can finish the manufacture craft of entire pixel array structure.And as can be known by picture element array structure shown in Figure 5, reservior capacitor system is connected in series with second capacitor by the first above-mentioned capacitor to form, add that dielectric layer in first capacitor only is made of first grid dielectric layer and first electrode of first capacitor and the material of second electrode are all factors such as metal, the storage capacitors amount of reservior capacitor is greatly increased.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; anyly have the knack of this skill person; without departing from the spirit and scope of the present invention; when can being used for a variety of modifications and variations, so protection scope of the present invention is as the criterion when looking accompanying the claim person of defining.
Claims (13)
1. the manufacture method of the picture element array structure of a LCD, this manufacture method comprises:
Form a silicon island in an active member district of a substrate;
Form a first grid dielectric layer on this substrate;
Form at least one data line and at least one first electrode on this first grid dielectric layer, this data line bit is in this outside, active member district, and this first electrode is positioned on the capacitive region of this substrate;
Form one second gate dielectric layer on this first grid dielectric layer, this data line and this first electrode;
Form at least one grid and at least one second electrode on this second gate dielectric layer, wherein this grid position is on these silicon island central authorities, and this second electrode position is on this first electrode;
With this grid is mask this silicon island of mixing, and with in the both sides in this grid and this corresponding central zone, silicon island, a side forms one source pole, and opposite side forms a drain electrode;
Form a dielectric layer on this second gate dielectric layer, this grid and this second electrode;
Form a transparency conducting layer on this dielectric layer;
This transparency conducting layer of patterning and this dielectric layer form plurality of openings among this transparency conducting layer and this dielectric layer, to expose the surface of this data line, this source electrode, this drain electrode and this first electrode respectively;
Form one the 3rd metal level among those openings with this transparency conducting layer on; And
Patterning the 3rd metal level and this transparency conducting layer are to form one first lead and this drain electrode and this first interelectrode one second lead between at least one pixel electrode, this source electrode and this data line respectively.
2. the manufacture method of the picture element array structure of LCD according to claim 1 is characterized in that, the material of this silicon island comprises polysilicon or amorphous silicon.
3. the manufacture method of the picture element array structure of LCD according to claim 1 is characterized in that, the material of this first grid dielectric layer comprises monox, silicon nitride or silicon oxynitride.
4. the manufacture method of the picture element array structure of LCD according to claim 1 is characterized in that, the material of this second gate dielectric layer comprises monox, silicon nitride or silicon oxynitride.
5. the manufacture method of the picture element array structure of LCD according to claim 1 is characterized in that, the material of this dielectric layer comprises monox.
6. the manufacture method of the picture element array structure of LCD according to claim 1 is characterized in that, the material of this transparency conducting layer comprises tin indium oxide, indium zinc oxide or aluminum zinc oxide.
7. the picture element array structure of a LCD, this picture element array structure comprises at least:
At least one silicon island is positioned in the active member district of a substrate, and these two ends, silicon island have two doped regions, and this two doped region is respectively the one source pole and a drain electrode of a membrane transistor;
One first grid dielectric layer is positioned on this silicon island and this substrate; The outside in this active member district of one data line bit on this first grid dielectric layer;
At least one first electrode is positioned on this first grid dielectric layer of a capacitive region of this substrate;
One second gate dielectric layer is positioned on this first grid dielectric layer, this data line and this first electrode;
At least one grid position is on this second gate dielectric layer above these silicon island central authorities;
At least one second electrode position is on this second gate dielectric layer above this first electrode, and this first electrode, this second gate dielectric layer and this second electrode constitute one first reservior capacitor;
One dielectric layer is positioned on this second gate dielectric layer, this grid and this second electrode, has the surface that one first, 1 second, 1 the 3rd and 1 the 4th opening exposes this data line, this source electrode, this drain electrode and this first electrode respectively among this dielectric layer;
One pixel electrode is positioned at the pixel region on this dielectric layer, and this second electrode, this dielectric layer and this pixel electrode constitute one second reservior capacitor;
One first lead be positioned on this dielectric layer and this first with this second opening among, to connect this data line and this source electrode; And
One second lead be positioned on this dielectric layer and the 3rd with the 4th opening among, to connect this drain electrode and this first electrode.
8. the picture element array structure of LCD according to claim 7 is characterized in that, the material of this silicon island comprises polysilicon or amorphous silicon.
9. the picture element array structure of LCD according to claim 7 is characterized in that, the material of this first grid dielectric layer comprises monox, silicon nitride or silicon oxynitride.
10. the picture element array structure of LCD according to claim 7 is characterized in that, the material of this second gate dielectric layer comprises monox, silicon nitride or silicon oxynitride.
11. the picture element array structure of LCD according to claim 7 is characterized in that, the material of this dielectric layer comprises monox.
12. the picture element array structure of LCD according to claim 7 is characterized in that, the material of this transparency conducting layer comprises tin indium oxide, indium zinc oxide or aluminum zinc oxide.
13. a LCD comprises at least:
One image element array substrates has a picture element array structure;
One colored optical filtering substrates; And
One liquid crystal layer is between this colored optical filtering substrates and this image element array substrates;
Wherein this picture element array structure comprises at least:
At least one silicon island is positioned in the active member district of a substrate, and these two ends, silicon island have two doped regions, and this two doped region is respectively the one source pole and a drain electrode of a membrane transistor;
One first grid dielectric layer is positioned on this silicon island and this substrate;
One data line bit is in the outside in this active member district;
At least one first electrode is positioned on this first grid dielectric layer of a capacitive region of this substrate;
One second gate dielectric layer is positioned on this first grid dielectric layer, this data line and this first electrode;
At least one grid position is on this second gate dielectric layer above these silicon island central authorities;
At least one second electrode position is on this second gate dielectric layer above this first electrode, and this first electrode, this second gate dielectric layer and this second electrode constitute one first reservior capacitor;
One dielectric layer is positioned on this second gate dielectric layer, this grid and this second electrode, has the surface that one first, 1 second, 1 the 3rd and 1 the 4th opening exposes this data line, this source electrode, this drain electrode and this first electrode respectively among this dielectric layer;
One pixel electrode is positioned at the pixel region on this dielectric layer, and this second electrode, this dielectric layer and this pixel electrode constitute one second reservior capacitor;
One first lead be positioned on this dielectric layer and this first with this second opening among, to connect this data line and this source electrode; And
One second lead be positioned on this dielectric layer and the 3rd with the 4th opening among, to connect this drain electrode and this first electrode.
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| CN100426109C true CN100426109C (en) | 2008-10-15 |
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|---|---|---|---|---|
| JP2002182245A (en) * | 2000-12-15 | 2002-06-26 | Sharp Corp | Manufacturing method for active matrix substrate |
| US6621537B1 (en) * | 1998-10-07 | 2003-09-16 | Advanced Display Inc. | Active matrix liquid crystal display and manufacturing method of the same |
| CN1808255A (en) * | 1998-03-19 | 2006-07-26 | 精工爱普生株式会社 | Substrate using thin film transistor, liquid crystal apparatus and electronic appliance |
| CN1828911A (en) * | 2001-09-28 | 2006-09-06 | 三星电子株式会社 | Thin film transistor array substrate using low dielectric insulating layer and method of fabricating the same |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1808255A (en) * | 1998-03-19 | 2006-07-26 | 精工爱普生株式会社 | Substrate using thin film transistor, liquid crystal apparatus and electronic appliance |
| US6621537B1 (en) * | 1998-10-07 | 2003-09-16 | Advanced Display Inc. | Active matrix liquid crystal display and manufacturing method of the same |
| JP2002182245A (en) * | 2000-12-15 | 2002-06-26 | Sharp Corp | Manufacturing method for active matrix substrate |
| CN1828911A (en) * | 2001-09-28 | 2006-09-06 | 三星电子株式会社 | Thin film transistor array substrate using low dielectric insulating layer and method of fabricating the same |
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