CN100425999C - Circuit board fault self-positioning device and method based on programmable logic device - Google Patents
Circuit board fault self-positioning device and method based on programmable logic device Download PDFInfo
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- CN100425999C CN100425999C CNB2006100013492A CN200610001349A CN100425999C CN 100425999 C CN100425999 C CN 100425999C CN B2006100013492 A CNB2006100013492 A CN B2006100013492A CN 200610001349 A CN200610001349 A CN 200610001349A CN 100425999 C CN100425999 C CN 100425999C
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Abstract
The present invention discloses a circuit board fault self-positioning device based on a programmable logic device and a self-positioning method thereof. The circuit board fault self-positioning device comprises a programmable logic device and a debugger, wherein a detection module is embedded into the programmable logic device, and the debugger is connected with the programmable logic device through a fault positioning interface. The self-positioning method comprises the steps that after a circuit board system is powered on and runs, the programmable logic device and the detection module embedded into the programmable logic device are configured, triggering conditions included; when a trigger signal meets the triggering conditions, after the detection module samples detected circuit board signals, and then the circuit board signals are transferred to the debugger through the fault positioning interface; the debugger executes signal analysis or artificial judgment and positions faults of the circuit board system. The present invention obtains the progress of real-time positioning in a fault site, achieves the effect of flexible and convenient fault detection, saves the time and cost of fault positioning and manpower cost and raises the efficiency of the fault positioning.
Description
Technical field
The present invention relates to electronic data processing field (G06) and electric communication technique field (H04), relate in particular to a kind of fault locator and method thereof of utilizing circuit board.
Background technology
The board failure location technology also is in the continuous development.From the most original lighting a lamp,, perhaps utilize equipment such as multimeter, oscillograph, logic analyser to come board failure is positioned to using the specific software of testing oneself.These methods or time-consuming are reserved a large amount of interfaces and test point when perhaps needing to design, perhaps need the great amount of manpower intervention, perhaps are subjected to the restriction of system for field, all can not high-level efficiency, low cost, solve the localization of fault of circuit board systems level quickly and easily.
Application number is that 03145112.8 Chinese patent application discloses a kind of method and equipment of circuit board being tested by JTAG, this methods analyst BSDL file; By man-machine interface display chip pin status directly perceived or change chip pin state, decision circuitry plate guilty culprit.But this method is tied a lot, even need interrupt system's operation, is difficult to the fault of positioning systems irrespective of size.
Summary of the invention
The technical problem to be solved in the present invention is to propose a kind of board failure method for self-locating based on programmable logic device (PLD), can locate the fault that many original devices or method are difficult to the location easily, and the efficient height, and cost is low, can on-the-spot fault location.The present invention also will provide a kind of device of realizing this method.
In order to solve the problems of the technologies described above, the invention provides a kind of board failure self locating device based on programmable logic device (PLD), comprise circuit board systems to be detected, this system comprises the programmable logic device (PLD) and the chip that has signal to be connected with this programmable logic device (PLD) in the plate, it is characterized in that, also comprise the debug machine that is connected with described programmable logic device (PLD) by the localization of fault interface, wherein:
Described programmable logic device (PLD) is embedded with detection module, and this detection module is used for sending described debug machine to described programmable logic device (PLD) signal sampling to be detected that receive and/or its generation and by described localization of fault interface;
Described debug machine automatically or by manually analyzing, is finished the location to described board failure after receiving the signal that transmits from the localization of fault interface.
Further, said apparatus also can have following characteristics: described programmable logic device (PLD) receives the signal to be detected of described chip output by the intrinsic line of circuit board.
Further, said apparatus also can have following characteristics: described programmable logic device (PLD) also is connected with the some signals to be detected or/and the pin of auxiliary signal by extra signal lines.
Further, said apparatus also can have following characteristics: described detection module comprises signal place in circuit to be detected, sample circuit, impact damper and the localization of fault interface circuit that connects successively, the trigger circuit and the clock module that also comprise sample circuit, the trigger circuit of described sample circuit link to each other with the localization of fault interface circuit respectively with clock module.
Further, said apparatus also can have following characteristics: described signal place in circuit to be detected is a signal selection matrix, and described debug machine can be configured this matrix by described localization of fault interface, realizes treating the selection of detection signal.
Further, said apparatus also can have following characteristics: the trigger circuit of described sample circuit can be configured by described debug machine, and are connected with the circuit of internal trigger signal and/or outer triggering signal.
In order to solve the problems of the technologies described above, the present invention also provides a kind of board failure method for self-locating based on programmable logic device (PLD), be applied to a board failure self locating device, this device comprises the programmable logic device (PLD) that is embedded with detection module, and by the coupled debug machine of localization of fault interface, this method may further comprise the steps:
(a) described programmable logic device (PLD) and embedded detection module thereof are disposed in the circuit board systems operation that powers on, and comprise the configuration of selecting signal to be detected and to the configuration of trigger condition;
(b) when trigger pip satisfies trigger condition, described detection module is given debug machine by the localization of fault interface after detected circuit board signal is sampled;
(c) described debug machine carries out signal analysis or artificial judgment, and the circuit board systems fault is positioned.
Further, foregoing circuit plate fault method for self-locating also can have following characteristics: the internal trigger mode that in the described step (a) is the configuration detection module is as trigger condition, and trigger pip satisfies the internal trigger signal that trigger condition is meant that programmable logic device (PLD) produces and satisfies trigger condition in the described step (b).
Further, foregoing circuit plate fault method for self-locating also can have following characteristics: the external trigger mode that in the described step (a) is the configuration detection module is as trigger condition, and the middle trigger pip of described step (b) satisfies trigger condition and is meant that described debug machine satisfies trigger condition by the outer triggering signal that the localization of fault interface sends to detection module.
Adopt apparatus and method of the present invention, compared with prior art, obtained the progress of fault in-situ real-time positioning, reached the effect of flexible detection failure, saved the time cost and the human cost of localization of fault, improved the efficient of localization of fault.
Description of drawings
Fig. 1 is the device block diagram of the embodiment of the invention based on the board failure self aligning system of programmable logic device (PLD) (FPGA/CPLD/EPLD).
Fig. 2 is the structural drawing of the embedded detection module 103 of the embodiment of the invention.
Fig. 3 is an application example of board failure self locating device of the present invention.
Embodiment
The self-align device of the board failure of present embodiment is made up of circuit board systems 101 to be detected and debug machine 102, and both connect by localization of fault interface 105, as shown in Figure 1.
Circuit board systems 101 to be detected further comprises the programmable logic device (PLD) 103 (FPGA, CPLD or EPLD) and the chip 104 that has signal to be connected with this programmable logic device (PLD) in the plate, connect by PCB (printed circuit board (PCB)) line 106 of chip pin between the two, have suitable coupling capacitance-resistance on the PCB line 106 to pin.Wherein, programmable logic device (PLD) 103 has embedded detection module, can be that programmable logic device (PLD) carries, also can be by customization.This detection module moves with formal programmable logic device (PLD) code as a standalone module, is used for programmable logic device (PLD) 103 signal samplings to be detected that receive or its generation and sends debug machine to.Therefore, programmable logic device (PLD) 103 is not only the test execution person under debug machine 102 controls, or measurand, and connected chip 104 only is a measurand.
Fig. 2 shows the structural drawing of this detection module, the signal to be detected of programmable logic device (PLD) 103 inside is by the signal selection matrix, then be sampled circuit sampling, send data buffer again to, deliver to localization of fault interface 105 by localization of fault interface circuit (promptly at the circuit of programmable logic device (PLD) side) at last for realizing that this localization of fault interface function is provided with.Wherein, debug machine 102 can be configured the signal selection matrix by localization of fault interface, localization of fault interface circuit, realizes treating the selection of detection signal; The trigger circuit of sample circuit link to each other with the localization of fault interface circuit, and two kinds of triggering modes of outer triggering signal and internal trigger signal are arranged, and this circuit can be configured by localization of fault interface, localization of fault interface circuit by debug machine 102; The clock module of sample circuit is provided by 103 inside, also can be by debug machine 102 by localization of fault interface, the configuration of localization of fault interface circuit.This detection module can on-the-spotly be revised.
Debug machine 102 can be commissioning devices such as PC, industrial computer, and fault analysis software is housed, and can analyze the back to the detected signal of receiving as required and show, also can directly show.Debug machine 102 is connected with programmable logic device (PLD) 103 by localization of fault interface 105.Localization of fault interface 105 can be the interface of standard, also can be by customization.
Fig. 3 is a simple application example, and the hardware components of its circuit board systems 101 to be detected is handled group's (comprising multi-disc DSP and FPGA/CPLD/EPLD etc.) by CPU minimum system (comprising CPU, BOOT, RAM, CLOCK, network interface, EPLD etc.) and DSP and formed.Wherein, programmable logic device (PLD) 103 is by other chip interconnects on various signal wires and the circuit board.These interconnection lines are not special the setting for localization of fault, but the intrinsic demand of circuit board systems.
On this basis, obtain a board failure self locating device, on hardware, need do following change in this system based on programmable logic device (PLD):
The first, for localization of fault is comprehensive more and convenient, can between programmable logic device (PLD) 103 and other chips, add a small amount of extra signal lines.
The mode that increases signal wire mainly comprises: the signal of wanting to detect is directly moved on the pin of programmable logic device (PLD) 103; And/or directly moving on the pin of programmable logic device (PLD) 103 to detecting useful auxiliary signal.Can add suitable coupling capacitance-resistance on these lines.
The second, as required at the programmable logic device (PLD) 103 inner circuit board signal detection modules that embed.
The 3rd, a debug machine 102 is provided, and between debug machine 102 and programmable logic device (PLD) 103, adds localization of fault interface 105, specifically may be a double socket.
Based on above device, it is self-align to adopt following two kinds of methods to carry out board failure, and first kind is active mode, adopts the internal trigger mode, may further comprise the steps:
At first, the circuit board systems operation that powers on, configuration of programmable logic devices 103 and embedded detection module thereof comprise the configuration signal selection matrix selecting signal to be detected, and the internal trigger mode of configuration detection module is with as trigger condition; Then, when the internal trigger signal of programmable logic device (PLD) generation satisfies trigger condition, the embedded detection module of programmable logic device (PLD) 103 is initiatively sampled to circuit board signals such as detected signal level, rise and fall edge, pulse or sequential, and gives debug machine 102 by localization of fault interface 105; Debug machine 102 carries out signal analysis or artificial judgment, and the circuit board systems fault is positioned.
Another kind is a passive mode, may further comprise the steps: at first, the circuit board systems operation that powers on, configuration of programmable logic devices 103 and embedded detection module thereof, comprise the configuration signal selection matrix selecting signal to be detected, and the external trigger mode of configuration detection module is with as trigger condition; Then, send outer triggering signal for programmable logic device (PLD) 103 by debug machine 102 by the localization of fault interface, when satisfying trigger condition, programmable logic device (PLD) 103 is caught signal to be detected; Then, programmable logic device (PLD) 103 qualified signal sampling after, give debug machine 102; At last, debug machine 102 is analyzed or manual analysis automatically, provides the circuit board systems localization of fault.
In sum, the present invention proposes a kind of brand-new circuit board systems fault locator and method, utilize the intrinsic resource of programmable logic device (PLD) (FPGA/CPLD/EPLD) of circuit board, communicate by letter with peripheral debug machine by default a small amount of interface signal, and cooperate appropriate software or manpower analysis to carry out localization of fault.Can carry out localization of fault to any IC that is connected with programmable logic device (PLD) FPGA/CPLD/EPLD (internal circuit that comprises programmable logic device (PLD)).
Compare with the circuit board means of testing oneself such as the software of lighting a lamp or test oneself, the present invention is the detection hardware line directly, and fault location flexibly, is caught such as the burr of fast signal more comprehensively.Simultaneously, also improve location efficiency, when the integral body of a large amount of signals (tens tunnel even hundreds of road) is caught, do not needed to introduce substantive test socket or test point.And fault location under the situation of original system operation can not influenced.And compare with equipment such as multimeter, oscillograph, logic analysers, the time saving and energy saving cost-saving of the present invention, and avoided the interference of outer bound pair signal effectively.Dirigibility of the present invention is also in fail soft on the debug machine and the plate that the detection module on the programmable logic device (PLD) can be by customization, even on-the-spot the modification.
Though more than describe embodiments of the invention in detail, for those skilled in the art, still can make and revise and do not change the spirit and scope of the invention above-mentioned embodiment.
Claims (9)
1, a kind of board failure self locating device based on programmable logic device (PLD), comprise circuit board systems to be detected, this system comprises the programmable logic device (PLD) and the chip that has signal to be connected with this programmable logic device (PLD) in the plate, it is characterized in that, also comprise the debug machine that is connected with described programmable logic device (PLD) by the localization of fault interface, wherein:
Described programmable logic device (PLD) is embedded with detection module, and this detection module is used for sending described debug machine to described programmable logic device (PLD) signal sampling to be detected that receive and/or its generation and by described localization of fault interface;
Described debug machine automatically or by manually analyzing, is finished the location to described board failure after receiving the signal that transmits from the localization of fault interface.
2, device as claimed in claim 1 is characterized in that, described programmable logic device (PLD) receives the signal to be detected of described chip output by the intrinsic line of circuit board.
3, device as claimed in claim 2 is characterized in that, described programmable logic device (PLD) also is connected with the some signals to be detected or/and the pin of auxiliary signal by extra signal lines.
4, device as claimed in claim 1, it is characterized in that, described detection module comprises signal place in circuit to be detected, sample circuit, impact damper and the localization of fault interface circuit that connects successively, the trigger circuit and the clock module that also comprise sample circuit, the trigger circuit of described sample circuit link to each other with the localization of fault interface circuit respectively with clock module.
5, device as claimed in claim 4 is characterized in that, described signal place in circuit to be detected is a signal selection matrix, and described debug machine is configured this matrix by described localization of fault interface, realizes treating the selection of detection signal.
6, device as claimed in claim 4 is characterized in that, the trigger circuit of described sample circuit are configured by described debug machine, and is connected with the circuit of internal trigger signal and/or outer triggering signal.
7, a kind of board failure method for self-locating based on programmable logic device (PLD), be applied to a board failure self locating device, this device comprises the programmable logic device (PLD) that is embedded with detection module, and by the coupled debug machine of localization of fault interface, this method may further comprise the steps:
(a) described programmable logic device (PLD) and embedded detection module thereof are disposed in the circuit board systems operation that powers on, and comprise the configuration of selecting signal to be detected and to the configuration of trigger condition;
(b) when trigger pip satisfies trigger condition, described detection module is sampled detected circuit board signal, and gives debug machine by the localization of fault interface;
(c) described debug machine carries out signal analysis or artificial judgment, and the circuit board systems fault is positioned.
8, board failure method for self-locating as claimed in claim 7, it is characterized in that, the internal trigger mode that in the described step (a) is the configuration detection module is as trigger condition, and trigger pip satisfies the internal trigger signal that trigger condition is meant that programmable logic device (PLD) produces and satisfies trigger condition in the described step (b).
9, board failure method for self-locating as claimed in claim 7, it is characterized in that, the external trigger mode that in the described step (a) is the configuration detection module is as trigger condition, and the middle trigger pip of described step (b) satisfies trigger condition and is meant that described debug machine satisfies trigger condition by the outer triggering signal that the localization of fault interface sends to detection module.
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| CNB2006100013492A CN100425999C (en) | 2006-01-19 | 2006-01-19 | Circuit board fault self-positioning device and method based on programmable logic device |
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| CNB2006100013492A CN100425999C (en) | 2006-01-19 | 2006-01-19 | Circuit board fault self-positioning device and method based on programmable logic device |
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Cited By (1)
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| CN106199393A (en) * | 2016-07-04 | 2016-12-07 | 四川九洲电器集团有限责任公司 | A kind of fault test set and fault detection method |
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| CN101158708B (en) * | 2007-10-23 | 2011-05-04 | 无锡汉柏信息技术有限公司 | Multiple chips automatic test method based on programmable logic device |
| CN102103186A (en) * | 2009-12-18 | 2011-06-22 | 上海贝尔股份有限公司 | Debug method of FPGA and equipment thereof |
| CN102236065B (en) * | 2010-04-22 | 2015-07-01 | 上海华虹集成电路有限责任公司 | Method for rapidly debugging and locating chip functional fault and debugging circuit |
| CN102236067B (en) * | 2010-04-22 | 2015-07-01 | 上海华虹集成电路有限责任公司 | Method for realizing rapid debugging and locating of chip functional fault and debugging circuit used in same |
| CN102236066B (en) * | 2010-04-22 | 2015-07-01 | 上海华虹集成电路有限责任公司 | Method for realizing rapid debugging and locating of chip functional fault and debugging circuit |
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