CN100405548C - Technique and structure for making convex - Google Patents

Technique and structure for making convex Download PDF

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Publication number
CN100405548C
CN100405548C CNB200510069102XA CN200510069102A CN100405548C CN 100405548 C CN100405548 C CN 100405548C CN B200510069102X A CNB200510069102X A CN B200510069102XA CN 200510069102 A CN200510069102 A CN 200510069102A CN 100405548 C CN100405548 C CN 100405548C
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China
Prior art keywords
projection
rete
sheath
joint sheet
cube structure
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Expired - Fee Related
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CNB200510069102XA
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Chinese (zh)
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CN1862771A (en
Inventor
胡钧屏
陈正中
蔡建文
李育青
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Elan Microelectronics Corp
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Elan Microelectronics Corp
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Priority to CNB200510069102XA priority Critical patent/CN100405548C/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Micromachines (AREA)

Abstract

The present invention relates to a technique and a structure for making convex blocks, which comprises a sheath, wherein the sheath has a smooth surface, and a connection pad of a base plate is covered with the sheath to form an opening; a contact surface of the connection pad is exposed by penetrating the sheath; a convex block is formed on the contact surface and the smooth surface. The sheath has the smooth surface, so the connection pad can be shrunk; the mechanical strength of the sheath at the margin regions of the connection pad is increased; when the convex block is pressed, the convex block has large effective regions; the selection space of different directivity conduction membranes is big; the probability of short circuits and electric leakage in the gaps of the convex block is reduced. The favorable rate of pressing of the convex block and the quality of electric conduction are improved.

Description

Producing lug technology and structure
Technical field
The present invention is relevant a kind of projection (bump) manufacture craft and structure, particularly about a kind of manufacture craft and structure of planarization projection.
Background technology
Routing engages (wire bonding), winding engages (Tap Automatic Bonding automatically; TAB) be the typical technology of integrated circuit (IC) encapsulation with covering that crystalline substance (flip chip) engages.Generally speaking, the routing joint applications is in about 300 low-density line encapsulation below the contact, and the high line density encapsulation that TAB uses reaches about 600 contacts, and chip bonding provides 600 higher line density encapsulation with upper contact.Use the encapsulation of chip bonding to go up the growth projection at the joint sheet (bonding pad) of IC earlier, so that at chip applying glass (Chip On Glass; COG), chip applying circuit board (ChipOn Board; COB), chip applying diaphragm (Chip On Film; COF) or carry out pressing in other canned program.Be to reduce telecommunications and disturb, increase tackness and conductivity, general projection adopts the material of gold more, and this makes that the making of projection is expensive and difficult, so producing lug technology becomes the important topic that encapsulation technology improves with structure.On the other hand, the performance of the density of encapsulation and performance has also limited the size and the performance performance of chip.When IC micro constantly, if the density of encapsulation and performance performance can't and then improve, for example the size of projection and pitch are limited to, and perhaps the conductive performance of projection is good inadequately, and encapsulation will become the bottleneck that chip size further dwindles so.
Fig. 1 shows known golden projection cube structure 10, and the joint sheet 14 on substrate 12 is covered a part, projection underlying metal (Under-Bump Metallization by sheath 16; UBM) 18 on the contact-making surface and sheath 16 that joint sheet 14 exposes, and golden film 20 and golden projection 22 are on UBM 18.Typically, the material of joint sheet 14 is an aluminium, and sheath 16 comprises layer of silicon dioxide 24 and one deck silicon nitride 26, UBM18 is the lamination of titanium and tungsten.Gold film 20 is made with sputtering method, and its crystalline particle is finer and closely woven, can increase the adhesion between golden projection 22 and the UBM18, and golden projection 22 is made with galvanoplastic, and its crystalline particle is bigger, and hardness is higher.Because the ladder 28 that sheath 16 forms at joint sheet 14 edges, the top surface edge of projection 22 also and then forms ladder 30.Therefore have only the sunk area 32 at center to become effective coverage when pressing, the roughness h of this upper surface is about 2 μ m.If obtain enough big effective coverage 32, joint sheet 14 must be bigger, if only increase the width of projection 22, as shown in Figure 2, because the upper surface unevenness of projection 22, the zone 34 of increase remains inactive area, and the size of effective coverage 32 there is no change.Fig. 3 is presented at the situation that a plurality of projections 22 are arranged in the substrate 12, and the width of joint sheet 14 is w1, and the projection gap is g, the projection pitch is p, the width w2 of projection 22 is not more than the width w1 of joint sheet 14, and therefore, effective coverage 32 is very little with joint sheet 14 by comparison.For increasing effective coverage 32, require joint sheet 14 bigger, so the contactor density of chip is lower, the size of chip also can't be dwindled.Big joint sheet 14 also causes big projection pitch P, if projection gap g is constant, improves contactor density and have only and dwindle joint sheet 14, but dwindling joint sheet 14 will cause effective coverage 32 to dwindle, so known technology has the difficulty that can't overcome.
Known producing lug technology is shown in Fig. 4 A to 4E.In Fig. 4 A, the sheath 16 of the about 1.2 μ m of deposit thickness covers on the joint sheet 14 of substrate 12.In Fig. 4 B, etching sheath 16 forms openings 36 exposing joint sheet 14, so also and then form ladder 38 at the edge of joint sheet 14, when the thickness of sheath 16 is thick more, the height of ladder 38 is just high more, and opening 36 is just dark more.In Fig. 4 C, the titanium/tungsten of about 800 dusts of deposit thickness is as UBM18, and the golden film 20 of about 800 dusts of deposit thickness, because the cause of ladder 38, the ladder 40 of Xing Chenging is wideer thereupon, and when the thickness of UBM18 is thick more, the width of depression 42 is just narrow more.Patterning UBM18 and golden film 20 backs are shown in Fig. 4 D.In Fig. 4 E, from the golden projection 22 of the about 17 μ m of golden film 20 growth thickness.Demonstrate from aforementioned technology, ladder 38 is unavoidable.Therefore finally must obtain the effective coverage 32 than small size, and sheath 16 is thick more, roughness h is just big more, and UBM18 is thick more, and effective coverage 32 is just more little.Though IC technology can be dwindled component size, the encapsulation technology of back segment does not but catch up with the speed of component size micro, thereby has limited the minimum dimension of chip.
Known projection cube structure also has shortcoming when pressing.With reference to the COG structure 44 of Fig. 5, when the lead 48 of pressing projection 22 to glass substrate 46, use anisotropy conducting film (Anisotropic Conductive Film between the two; ACF) 50 as interface.ACF is a kind of poly-second vinegar of glue that contains conducting particles, and its conducting particles suffers oppression when pressing and form conducting path on the pressing direction.Because the about 2 μ m of surface roughness of projection 22, so the particle diameter of the conducting particles among the ACF50 52 must could obtain good conduction greater than 3 μ m between projection 22 and lead 48.Yet the conducting particles 52 that particle diameter is bigger causes being carried off the negligible amounts that obtains in effective coverage 32 when pressing, so contact impedance is bigger, the conduction inferior quality after the pressing.On the other hand.When carrying out pressing, the conducting particless 56 in the projection gap 54 cause because of the big crimp easily of particle diameter and are short-circuited between the adjacent projections 22 and leak electricity, and cause the pressing yield low.If use the less conducting particles 52 of particle diameter, then can't provide good being connected between projection 22 and the lead 48, so known technology there is the difficulty that can't overcome.Along with the demand with high pin number (I/O count) of dwindling of IC size, the joint sheet 14 of IC also dwindles, and effective coverage 32 thereby dwindle causes the conduction quality after pressing yield and the pressing to reduce.Moreover, a born shortcoming of chip package be projection 22 fringe regions 58 mechanical strength a little less than, break easily because of horizontal pullling.Yet, obtain less roughness h on projection 22 surfaces, must reduce the height of ladder 28, so the thinner thickness of sheath 16, so the more weak shortcoming of mechanical strength also can't overcome.
Therefore, a kind of producing lug technology of improvement and structure are that people expect.
Summary of the invention
Main purpose of the present invention is to propose a kind of planarization producing lug technology and structure, to improve the various shortcoming of known technology.
According to the present invention, a kind of producing lug technology comprises that forming one has the sheath of a planarized surface to cover the joint sheet on the substrate, form an opening and pass this sheath exposing a contact-making surface of this joint sheet, and form a projection on this planarized surface of this contact-making surface of this joint sheet and this sheath.
According to the present invention, a kind of projection cube structure comprises that a sheath with a planarized surface covers the part of the joint sheet on the substrate, and a projection contacts the surface of this planarization of contact-making surface that this joint sheet do not cover by this sheath and this sheath.
Situation is preferably, and this sheath comprises that the different multiple film layer of hardness piles up.
Situation also has preferably, and this contact-making surface has an elongated shape.
Because this sheath has the cause of this planarized surface, this joint sheet can dwindle, this sheath increases in the mechanical strength of this joint sheet fringe region, when pressing, this projection has bigger effective coverage, the selection space of anisotropy conducting film is bigger, and short circuit in the projection gap and electric leakage probability reduce, and the pressing yield of this projection and conduction quality improve.
Description of drawings
Fig. 1 is the profile of known gold projection cube structure;
Fig. 2 is the schematic diagram behind the projection 22 that strengthens among Fig. 1;
Fig. 3 is the schematic diagram that a plurality of projections 22 are arranged in substrate 12;
Fig. 4 A to Fig. 4 E is known producing lug technology;
Fig. 5 is known COG structure;
Fig. 6 A and Fig. 6 B are the profiles of the present invention's gold projection cube structure;
Fig. 7 A and Fig. 7 B are the top views of the present invention's gold projection cube structure;
Fig. 8 A to Fig. 8 G is first embodiment of the present invention's gold producing lug technology;
Fig. 9 A to Fig. 9 D is second embodiment of the present invention's gold producing lug technology;
Figure 10 is a COG structure of the present invention; And
Figure 11 is the golden projection cube structure that increases sheath thickness.
The main element symbol description:
10: golden projection cube structure
12: substrate
14: joint sheet
16: sheath
18: the projection underlying metal
20: golden film
22: golden projection
24: silicon dioxide
26: silicon nitride
28: ladder
30: ladder
32: the effective coverage
34: inactive area
36: opening
38: ladder
40: ladder
42: depression
The 44:COG structure
46: glass substrate
48: lead
50: the anisotropy conducting film
52: conducting particles
54: the projection gap
56: conducting particles
58: fringe region
60: golden projection cube structure
62: joint sheet
64: sheath
66: golden projection
68: inactive area
70: the effective coverage
72: contact-making surface
74: contact-making surface
76: rete
78: planarized surface
80: rete
82: planarized surface
84: opening
86: planarized surface
The 88:GOG structure
90: the anisotropy conducting film
92: conducting particles
94: the projection gap
96: fringe region
98: rete
Embodiment
According to the present invention, a kind of golden projection cube structure 60 is shown in Fig. 6 A and Fig. 6 B, and its top view is shown in Fig. 7 A and Fig. 7 B, and Fig. 6 A is to be the profile on the Y direction at the profile on the directions X, Fig. 6 B.With reference to Fig. 6 A and Fig. 6 B, in projection cube structure 60, the sheath 64 with planarized surface covers on the joint sheet 62 of substrate 12, and UBM18 and golden film 20 are stacked on joint sheet 62 and the sheath 64, and golden projection 66 is on golden film 20.The material of joint sheet 62 is the metal or alloy of aluminium, aluminium alloy or other highly conductives.Sheath 64 comprises material or its combination that one layer or more silicon dioxide, silicon nitride or other chemical resistance are strong, to protect the circuit in its lower substrate 12.UBM18 mainly avoids in the subsequent technique various chemical moleculars to invade joint sheets 62 at protection joint sheet 62, and to influence product electrical; improve the tackness between golden film 20 and the joint sheet 62 simultaneously; in one embodiment; joint sheet 62 is an aluminium; UBM18 comprises titanium and tungsten, and titanium has good common knot face at bottom with aluminium; tungsten has good common knot face on the upper strata with gold.As shown in Figure 6A, the width w1x of joint sheet 62 on directions X is much smaller than known joint sheet, and the width w2x on directions X is also less for projection 66, so the projection pitch P can significantly be dwindled.Yet on the Y direction, shown in Fig. 6 B, though the also more known joint sheet of the width w1y of joint sheet 62 is little, the width w2y of projection 66 is much larger than the width w1y of joint sheet 62.Because joint sheet 62 is less, so the sunk area 68 at projection 66 upper surface centers contracts forr a short time, if UBM18 is thicker, sunk area 68 can complete obiteration.Owing to use sheath 64, so projection 66 upper surfaces major part is the zone 70 of planarization, the effective coverage in the time of can being provided as pressing with planarized surface.Different with known projection cube structure 10, the effective coverage 70 of projection 66 is around upper surface, and is and non-central, that is to say, main zone above sheath 64.
Fig. 7 A further shows the relation of projection 66 and joint sheet 62, in order to compare the right side that known projection 22 and joint sheet 14 are also shown in Fig. 7 A.In known projection cube structure 10, joint sheet 14 is bigger than projection 22, and projection 22 is for to obtain enough effective coverages, and joint sheet 14 can not dwindle.And in projection cube structure 60 of the present invention, projection 66 can be bigger than joint sheet 62, so joint sheet 62 can dwindle as far as possible.In projection cube structure 60 of the present invention, the contact-making surface 72 that joint sheet 62 exposes for connection projection 66 has elongated shape.And in known projection cube structure 10.Joint sheet 14 exposes for the width of contact-making surface 74 on X and Y direction that connects projection 22 approaching.Fig. 7 B is the schematic diagram that forms high density projection 66 on substrate 12, and projection 66 is long and narrow strip and extends on the Y direction.On directions X, because joint sheet 62 can dwindle, so projection 66 can more be closely aligned, if increase the planarization regions 70 of projection 66, can reach by the width that increases its Y direction.Because joint sheet 62 can dwindle, therefore in the IC of same size, can hold more projection 66, improve contactor density and the pin number of IC.
Fig. 8 A to Fig. 8 G is according to producing lug technology of the present invention.In Fig. 8 A, deposit the joint sheet 62 on rete 76 about 1000 to 1200 dust covered substrates 12 of silicon dioxide for example or silica.To the thickness that stays about 600 to 800 dusts, thereby make it have planarized surface 78 with chemical mechanical milling method etch-back rete 76 for example, shown in Fig. 8 B.In Fig. 8 C, on rete 76, deposit rete 80 about 300 to 500 dusts of silicon nitride for example or silicon oxynitride, because the planarized surface 78 of rete 76, rete 80 also has planarized surface 82.Rete 76 and 80 is as the sheath among Fig. 6 A 64, and situation is preferably, and the material of rete 80 is harder than rete 76, and softer rete 76 is used for the surface of protective substrate 12 and joint sheet 62, and harder rete 80 is used for resisting external force.Shown in Fig. 8 D, etching rete 80 and 76 forms opening 84 and passes rete 80 and 76 from planarized surface 82, exposes the contact-making surface 72 of joint sheet 62.In Fig. 8 E, with sputtering method deposit for example titanium and about 800 dusts of tungsten as UBM18 on the surface 82 of the contact-making surface 72 of joint sheet 62 and rete 80, deposit the golden film 20 of about 800 dusts on UBM18 with sputtering method.Shown in Fig. 8 F, patterned gold film 20 and UBM18.In Fig. 8 G, with galvanoplastic from golden film 20 golden projection 66 about 15 to the 20 μ m that grow up.Owing to form the sheath 76 and 80 with planarized surface in the step formerly, so the depression 68 at projection 66 upper surface centers is very little or depression not, most ofly is the zone 70 of planarization.
Fig. 9 A to Fig. 9 D is according to another producing lug technology of the present invention.In Fig. 9 A; joint sheet 62 on successive sedimentation rete 76 and 80 covered substrates 12; situation is preferably, and the material of rete 80 is harder than rete 76, and softer rete 76 is used for the contact-making surface of protective substrate 12 and joint sheet 62; harder rete 80 is used for resisting external force; for example, rete 76 comprises silicon dioxide or silica, about 200 to 800 dusts of thickness; rete 80 comprises silicon nitride or silicon oxynitride, about 300 to 500 dusts of thickness.In Fig. 9 B, be etched back to the thickness of about 600 to 1000 dusts of gross thickness of rete 76 and 80 with for example chemical mechanical milling method, thereby form planarized surface 86.In Fig. 9 C, form the contact-making surface 72 that opening 84 exposes joint sheet 62.In Fig. 9 D, with sputtering method for example deposit titanium and about 800 dusts of tungsten as UBM18 on the contact-making surface 72 and planarized surface 86 of joint sheet 62, deposit the golden film 20 of about 800 dusts on UBM18 with sputtering method, patterned gold film 20 and UBM18, with galvanoplastic from golden film 20 golden projection 66 about 15 to the 20 μ m that grow up.Because the planarized surface 86 that forms in the step formerly, so the depression 68 at projection 66 upper surface centers is very little or depression not, most ofly is the zone 70 of planarization.
In producing lug technology of the present invention, because use sheath 64 with planarized surface, so UBM18 can obtain very big effective coverage 70 much larger than the area on contact-making surface 72 at the area on this planarized surface, therefore joint sheet 62 can be dwindled as far as possible.
Figure 10 shows the structure 88 of the lead 48 of pressing projection 66 to the glass substrate 46, different with known COG structure 44, it is the zone 70 of planarization that projection 66 provides the effective coverage of pressing, owing to there is not the problem of surface roughness, therefore the particle diameter of the conducting particles 92 among the ACF90 has bigger selection space, 1 to 5 μ m for example is even use the less conducting particles 92 of particle diameter still can obtain the favorable conductive quality.Because the effective coverage is the zone 70 of planarization, its area is bigger, and therefore effective coverage 70 can be carried off and be obtained more conducting particles 92 when pressing, if use the less conducting particles 92 of particle diameter, carries off obtain more, and the conduction quality is better.On the other hand, if use the less conducting particles 92 of particle diameter, the conducting particles 92 projection gap 94 in is squeezed and the probability reduction that is short-circuited or leaks electricity.Moreover, owing to use sheath 64 with planarized surface, so the mechanical strength of projection 66 fringe regions 96 improves difficult breaking.Owing in projection cube structure 60, use sheath 64 with planarized surface, therefore its thickness can not limited to, Figure 11 is an example, sheath 64 comprises rete 76,80 and 98, rete 76 and 98 uses silicon dioxide or silica, rete 80 uses silicon nitride or silicon oxynitrides, and the gross thickness of rete 76,80 and 98 is increased to more than the 1.2 μ m, therefore increases mechanical strength.

Claims (36)

1. producing lug technology is used for forming a projection and is electrically connected to a joint sheet on a substrate, it is characterized in that this technology comprises the following steps:
Form one and have the sheath of a planarized surface to cover this joint sheet;
Form an opening and pass this sheath to expose a contact-making surface of this joint sheet; And
Form this projection on this planarized surface of this contact-making surface of this joint sheet and this sheath.
2. producing lug technology as claimed in claim 1 is characterized in that, the step that described formation one has the sheath of a planarized surface comprises the following steps:
Depositing one first rete covers on this joint sheet;
One surface of this first rete of planarization; And
Deposit one second rete on this first rete.
3. producing lug technology as claimed in claim 2 is characterized in that, described second rete comprises that at least one layer material is hard than this first rete.
4. producing lug technology as claimed in claim 2 is characterized in that, described first rete comprises silicon dioxide or silica, and this second rete comprises silicon nitride or silicon oxynitride.
5. producing lug technology as claimed in claim 2 is characterized in that, described first rete comprises silicon dioxide or silica, and described second rete comprises that one deck is silicon nitride or silicon oxynitride, and another layer is the lamination of silicon dioxide or silica.
6. producing lug technology as claimed in claim 2 is characterized in that, the step on a surface of this first rete of described planarization comprises this first rete of etch-back.
7. producing lug technology as claimed in claim 6 is characterized in that, the step of this first rete of described etch-back comprises this first rete of cmp.
8. producing lug technology as claimed in claim 1 is characterized in that, the step that described formation one has the sheath of a planarized surface comprises the following steps:
Depositing a lamination covers on this joint sheet; And
One surface of this lamination of planarization.
9. producing lug technology as claimed in claim 8 is characterized in that, described lamination comprises:
One first rete; And
One second rete is on this described first rete, and this second rete is hard than this first rete.
10. producing lug technology as claimed in claim 9 is characterized in that, described first rete comprises silicon dioxide or silica, and described second rete comprises silicon nitride or silicon oxynitride.
11. producing lug technology as claimed in claim 8 is characterized in that, described lamination comprises:
One first rete;
One second rete is on this first rete, and this second rete is hard than this first rete; And
One tertiary membrane layer is on this second rete, and this tertiary membrane layer is soft than this second rete.
12. producing lug technology as claimed in claim 11 is characterized in that, described first and the tertiary membrane layer comprise silicon dioxide or silica, described second rete comprises silicon nitride or silicon oxynitride.
13. producing lug technology as claimed in claim 8 is characterized in that, the step on a surface of described this lamination of planarization comprises this lamination of etch-back.
14. producing lug technology as claimed in claim 13 is characterized in that, the step of described this lamination of etch-back comprises this lamination of cmp.
15. producing lug technology as claimed in claim 1 is characterized in that, described opening has an elongated shape on this contact-making surface of this joint sheet.
16. producing lug technology as claimed in claim 1 is characterized in that, the step of this projection of described formation on this planarized surface of this contact-making surface of this joint sheet and this sheath comprises the following steps:
Form a projection underlying metal and have a second area having on this contact-making surface of this joint sheet on one first area and this planarized surface at this sheath, this second area is greater than this first area; And
Form a conductive projection and contact this projection underlying metal.
17. producing lug technology as claimed in claim 16 is characterized in that, the step that described formation one conductive projection contacts this projection underlying metal comprises the following steps:
Sputter one gold medal film is on this projection underlying metal; And
From this gold film gold medal projection of growing up.
18. producing lug technology as claimed in claim 1 is characterized in that, the step of this projection of described formation on this planarized surface of this contact-making surface of this joint sheet and this sheath comprises the following steps:
Form a projection underlying metal on this planarized surface of this contact-making surface of this joint sheet and this sheath; And
Form a conductive projection and contact this projection underlying metal, this conductive projection has the surface of a planarization at the opposite side with respect to this projection underlying metal.
19. producing lug technology as claimed in claim 18 is characterized in that, the step that described formation one conductive projection contacts this projection underlying metal comprises the following steps:
Sputter one gold medal film is on this projection underlying metal; And
From this gold film gold medal projection of growing up.
20. producing lug technology as claimed in claim 1 is characterized in that the area of described conductive projection is greater than the area of this joint sheet.
21. a projection cube structure is used for being electrically connected to the joint sheet on a substrate, it is characterized in that this projection cube structure comprises:
One sheath with a planarized surface covers the part of this joint sheet; And
One projection contacts the surface of this planarization of contact-making surface that this joint sheet do not cover by this sheath and this sheath.
22. projection cube structure as claimed in claim 21 is characterized in that, described sheath comprises:
One has first rete of a planarized surface; And
One second rete is on this first rete.
23. projection cube structure as claimed in claim 22 is characterized in that, described second rete comprises that at least one layer material is hard than this first rete.
24. projection cube structure as claimed in claim 22 is characterized in that, described first rete comprises silicon dioxide or silica, and described second rete comprises silicon nitride or silicon oxynitride.
25. projection cube structure as claimed in claim 22 is characterized in that, described first rete comprises silicon dioxide or silica, and described second rete comprises that one deck is silicon nitride or silicon oxynitride, and another layer is the lamination of silicon dioxide or silica.
26. projection cube structure as claimed in claim 21 is characterized in that, described sheath comprises:
One first rete; And
One has second rete of this planarized surface on this first rete.
27. projection cube structure as claimed in claim 26 is characterized in that, described second rete comprises that at least one layer material is hard than this first rete.
28. projection cube structure as claimed in claim 26 is characterized in that, described first rete comprises silicon dioxide or silica, and described second rete comprises silicon nitride or silicon oxynitride.
29. projection cube structure as claimed in claim 26 is characterized in that, described first rete comprises silicon dioxide or silica, and described second rete comprises that one deck is silicon nitride or silicon oxynitride, and another layer is the lamination of silicon dioxide or silica.
30. projection cube structure as claimed in claim 21 is characterized in that, described sheath comprises that two retes press from both sides a rete hard than this two rete.
31. projection cube structure as claimed in claim 21 is characterized in that, described joint sheet is not had an elongated shape by this contact-making surface that this sheath covers.
32. projection cube structure as claimed in claim 21 is characterized in that, described projection comprises:
One projection underlying metal has a second area having on this contact-making surface that is not covered by this sheath of this joint sheet on one first area and the surface in this planarization of this sheath, and this second area is greater than this first area; And
One conductive projection is on this projection underlying metal.
33. projection cube structure as claimed in claim 32 is characterized in that, described conductive projection comprises:
One gold medal film is on this projection underlying metal; And
One gold medal projection is on this gold film.
34. projection cube structure as claimed in claim 21 is characterized in that, described projection comprises:
One projection underlying metal is on the surface of this planarization of this contact-making surface that is not covered by this sheath of this joint sheet and this sheath; And
One conductive projection contacts this projection underlying metal, and this conductive projection has the surface of a planarization at the opposite side with respect to this projection underlying metal.
35. projection cube structure as claimed in claim 21 is characterized in that, the area of described conductive projection is greater than the area of this joint sheet.
36. a projection pressing structure is used for being electrically connected at a joint sheet and a lead on one second substrate on one first substrate, it is characterized in that this projection pressing structure comprises:
One sheath with a planarized surface covers the part of this joint sheet;
One projection contacts the surface of this planarization of contact-making surface that this joint sheet do not cover by this sheath and this sheath, and this projection has the surface of the surface of a planarization in the face of this planarization of this sheath; And
Between the surface and this lead of oppressed this planarization in this projection of many conducting particless.
CNB200510069102XA 2005-05-10 2005-05-10 Technique and structure for making convex Expired - Fee Related CN100405548C (en)

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US9024438B2 (en) * 2011-07-28 2015-05-05 Taiwan Semiconductor Manufacturing Company, Ltd. Self-aligning conductive bump structure and method of making the same
CN109712897B (en) * 2017-10-26 2020-12-18 中芯国际集成电路制造(上海)有限公司 Semiconductor device, manufacturing method thereof and electronic device

Citations (3)

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Publication number Priority date Publication date Assignee Title
CN1372312A (en) * 2001-02-26 2002-10-02 华泰电子股份有限公司 Wafer formation metal convex block package structure and making method thereof
US20040222520A1 (en) * 2002-09-19 2004-11-11 Yonggang Jin Integrated circuit package with flat metal bump and manufacturing method therefor
US20050017343A1 (en) * 2003-07-23 2005-01-27 Kwon Yong-Hwan Method of forming redistribution bump and semiconductor chip and mount structure fabricated using the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1372312A (en) * 2001-02-26 2002-10-02 华泰电子股份有限公司 Wafer formation metal convex block package structure and making method thereof
US20040222520A1 (en) * 2002-09-19 2004-11-11 Yonggang Jin Integrated circuit package with flat metal bump and manufacturing method therefor
US20050017343A1 (en) * 2003-07-23 2005-01-27 Kwon Yong-Hwan Method of forming redistribution bump and semiconductor chip and mount structure fabricated using the same

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