CN100395887C - Integrated circuit packaging structure and manufacturing method thereof - Google Patents
Integrated circuit packaging structure and manufacturing method thereof Download PDFInfo
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- CN100395887C CN100395887C CNB2004100511573A CN200410051157A CN100395887C CN 100395887 C CN100395887 C CN 100395887C CN B2004100511573 A CNB2004100511573 A CN B2004100511573A CN 200410051157 A CN200410051157 A CN 200410051157A CN 100395887 C CN100395887 C CN 100395887C
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
Abstract
The present invention relates to an integrated circuit packaging structure which comprises an integrated circuit chip arranged on a base plate, an integrated radiating fin positioned above the integrated circuit chip and a carbon nanotube array, wherein the lower end of the edge of the integrated radiating fin is fixed to the base plate, and the integrated radiating fin comprises an inner surface and an outer surface; the carbon nanotube array is arranged between the integrated circuit chip and the integrated radiating fin. The carbon nanotube array is formed on the inner surface of the integrated radiating fin, and both ends of the carbon nanotube array respectively vertically contact the integrated radiating fin and the integrated circuit chip; nanometer metal materials with high heat conductivity is filled in carbon nanotubes.
Description
[technical field]
The present invention relates to a kind of integrated circuit package structure and manufacture method thereof, relate in particular to a kind of integrated circuit package structure and manufacture method thereof of using carbon nano pipe array heat conduction.
[background technology]
In the encapsulation field of semiconductor integrated circuit, along with semiconductor integrated circuit is constantly improving, developing, volume constantly reduced when it improved constantly on function, and dense degree constantly increases, and package dimension is also constantly diminishing.Owing to be in so little space, to carry out calculation process during integrated circuit (IC) chip work, will produce sizable heat.The heat that is produced must shed by suitable mode, to avoid integrated circuit (IC) chip because of the overheated calculation process mistake that causes, can cause the damage of hardware circuit when serious.Therefore, the heat dissipation problem in the encapsulation is just crucial all the more.
Traditional packaged type is because the conductive coefficient of plastic packaging material is not high, and the heat that integrated circuit (IC) chip produces can not distribute in real time, causes chip temperature too high easily, has reduced the power that chip can be supported.In order to address this problem, seeing also method shown in Figure 1, initial is bonding one fin 5 on substrate 3, and then with plastic packaging glue 7 plastic packagings such as chip 2, gold thread 4, fin 5 is got up.Fin 5 is positioned at chip 2 tops, and its upper surface is exposed in the air, is used for the heat that chip 2 produces is dispersed, and prevents that chip 2 temperature are too high.Yet the heat that its chip 2 produces need can arrive fin 5 by the conduction of plastic packaging colloid 7, heat energy is dissipated again.But, cause its radiating effect limited because plastic packaging colloid 7 is a poor conductor of heat.
Along with the appearance of thermal interfacial material and the development of semiconductor packaging process, people combine thermal interfacial material and have obtained better radiating effect with semiconductor packaging process.See also Fig. 2, thermal interfacial material 6 places between chip 2 end faces and the fin 5 inner surfaces.During integrated circuit work, the heat that chip 2 is produced can be passed to fin 5 inner surfaces by direct thermal interfacial material 6 contacted with it, is absorbed by fin 5, and by other heat abstractor of fin 5 outsides heat is dissipated.Yet the semiconductor integrated circuit package method of this kind application thermal interfacial material is subjected to the restriction of the capacity of heat transmission of thermal interfacial material own.
For improving the performance of thermal interfacial material, improve its coefficient of heat conduction, various materials are by extensive experimentation.People such as Savas Berber delivered the article of a piece " Unusually HighThermal Conductivity of Carbon Nanotubes " by name and point out in AIP in 2000, " Z " shape (10,10) carbon nano-tube conductive coefficient under room temperature can reach 6600W/mK, particular content can be consulted document Phys.Rev.Lett (2000), Vol.84, P.4613.How research is used for carbon nano-tube thermal interfacial material and gives full play to its good thermal conductivity becoming an important directions that improves the thermal interfacial material performance.
United States Patent (USP) the 6th, 407 discloses a kind of thermal interfacial materials that utilize carbon nano-tube heat conduction No. 922, and it is mixed the elargol matrix with carbon nano-tube and strikes up partnership, and makes thermal interfacial material by injection molded.The area of two heat-transfer surfaces of this thermal interfacial material does not wait, and the area that wherein contacts one side with radiator is greater than the area that contacts one side with thermal source, and this thermal interface material applications can improve its heat-sinking capability in semiconductor packages.But, the thermal interfacial material that this method makes has weak point, one, it is bigger that injection molded makes thermal interfacial material thickness, though the conductive coefficient of this thermal interfacial material is higher, but the increase of this thermal interfacial material volume is incompatible to the trend of miniaturization development with device, and this thermal interfacial material lacks pliability; Its two, carbon nano-tube is arranged in basis material in order, its uniformity that distributes in matrix difficulty guarantees, thereby heat conducting uniformity also is affected, the advantage of the vertical heat conduction of carbon nano-tube is underused, and influences the coefficient of heat conduction of thermal interfacial material.
Laid-open U.S. Patents application on January 8 in 2004 discloses a kind of thermal interfacial material based on carbon nano pipe array No. 20040005736, and the semiconductor package that comprises this thermal interfacial material, it places integral fin (Integrated Heat Spreader with thermal interfacial material when encapsulating, IHS) and between the integrated circuit (IC) chip (DIE), perhaps place between integrated circuit (IC) chip and the radiator (Heat Sink).Wherein, this thermal interfacial material is to comprise the carbon nano pipe array that is mixed with polymeric matrix material, carbon nano-tube is evenly distributed with preface and arranges in polymeric matrix material, can avoid influencing the thermal conductivity of thermal interfacial material owing to the lack of alignment of carbon nano-tube, simultaneously, carbon nano pipe array is basically perpendicular to and extends the contact surface of thermal interfacial material, guarantees that carbon nano-tube can directly contact with integrated circuit (IC) chip or radiating element.But, semiconductor package based on this thermal interfacial material has weak point, one, because the heat conductivility of polymeric matrix material is not good, therefore, carbon nano-tube is mixed the heat conductivility that the thermal interfacial material that forms can not be given full play to carbon nano-tube with polymeric matrix, and this thermal interfacial material can be because the inhomogeneous heating of chip causes heat conducting inhomogeneities when using, and then influence the heat conduction efficiency and the heat conducting stability of whole thermal interfacial material, further influence the radiating effect of this encapsulating structure; They are two years old, mixing carbon nano-pipe array in the above-mentioned semiconductor package, to list in the thermal interfacial material of polymeric matrix be to be formed on the integrated circuit (IC) chip (DIE), because can not bearing, integrated circuit (IC) chip forms the required high temperature of carbon nano pipe array, so need be pre-formed this carbon nano pipe array thermal interfacial material on substrate, on this substrate, make integrated circuit (IC) chip again, making is comparatively complicated with encapsulation process, is unfavorable for applying.
Therefore, provide a kind of heat-conductive characteristic that can give full play to carbon nano-tube, good heat dissipation effect, the manufacture method of making simple integrated circuit package structure and this encapsulating structure thereof is very necessary.
[summary of the invention]
For solving the technical problem of prior art, the purpose of this invention is to provide a kind of heat-conductive characteristic that can give full play to carbon nano-tube, good heat dissipation effect is made simple integrated circuit package structure.。
Another object of the present invention provides the manufacture method of this kind integrated circuit package structure.
For realizing purpose of the present invention, the invention provides a kind of integrated circuit package structure, it comprises: a substrate; One integrated circuit (IC) chip is arranged on the substrate; One integral fin places the integrated circuit (IC) chip top, and its lower end, edge is fixed on the substrate, and this integral fin comprises an inner surface and an outer surface; And a carbon nano pipe array is arranged between said integrated circuit chip and the radiating element; Wherein, this carbon nano pipe array is the inner surface that is formed at integral fin, and its two ends are respectively with integral fin and integrated circuit (IC) chip is vertical contacts.
In the integrated circuit package structure of the present invention, be filled with the nano metal material of high heat-conduction coefficient in this carbon nano-tube.
This integrated circuit package structure can comprise further that a carbon nano pipe array is formed at the outer surface of integral fin, and during application, these carbon nano-tube two ends are respectively with integral fin and external connection radiating device is vertical contacts.This carbon nano pipe array can be the carbon nano pipe array of the nano metal material that is filled with high heat-conduction coefficient in the pipe equally.
For realizing another object of the present invention, the present invention also provides the manufacture method of this kind integrated circuit package structure, may further comprise the steps:
One substrate is provided, and it comprises that two is surperficial relatively;
Provide an integrated circuit (IC) chip and with this die bonding on a surface of substrate, by gold thread the circuit on integrated circuit (IC) chip and the substrate is electrically connected again;
One integral fin is provided, and it comprises an inner surface and an opposed outer surface;
By the inner surface carbon nano tube array grows of chemical method at integral fin;
Integral fin is fixed on the substrate, makes carbon nano pipe array between integral fin and integrated circuit (IC) chip, and with direct vertical contact of integrated circuit (IC) chip;
On substrate, integrated circuit (IC) chip, integral fin, do the setting of adhesive material;
Substrate with respect to another surface of chip on weldering paste the tin ball.
Wherein, the growing method of carbon nano pipe array may further comprise the steps among the present invention:
The surface of the integral fin of carbon nano tube array grows is desired in polishing;
At this integral fin surface deposition catalyst;
Feed carbon source gas, at the superficial growth carbon nano pipe array of integral fin.
In the manufacture method of integrated circuit package structure of the present invention, this carbon nano pipe array further comprises the carbon nano pipe array of the nano metal material that is filled with high heat-conduction coefficient in the pipe.
The formation method that the present invention is filled with the carbon nano pipe array of nano metal material may further comprise the steps:
The catalyst layer of a regular patternization on the fin surface cloth of need carbon nano tube array grows;
With laser evaporation method (Laser Ablation) with the graphite rod of containing metal element with superlaser moment gasification;
Under the argon gas atmosphere of 500Torr, the carbon based metal steam that gasifies is sent to the fin surface that is furnished with catalyst with the argon gas that flows;
Cooling obtains being filled with the carbon nano pipe array of nano metal material.
Compared with prior art, the present invention is based on the following advantage of integrated circuit package structure tool of carbon nano pipe array heat conduction: one, carbon nano pipe array is to be directly grown in the integral fin surface before the encapsulation, and method is simple, and can avoid growing the time to the influence of integrated circuit (IC) chip; Its two, this carbon nano pipe array can directly contact with integral fin and integrated circuit (IC) chip during application, or touches with the direct vertical connection of external connection radiating device, forms a plurality of heat conduction channels, can bring into play the excellent heat conducting performance of carbon nano-tube admirably; Its three, be filled with nano metal material in the carbon nano-tube, can provide Homogeneouslly-radiating also the time in that thermal source heating is inhomogeneous, thereby can improve its heat conducting efficient and heat conducting stability effectively.
[description of drawings]
Fig. 1 is the schematic diagram of the semiconductor integrated circuit package structure of prior art.
Fig. 2 is the schematic diagram that is packaged with fin semiconductor integrated circuit package structure of prior art.
Fig. 3 is the schematic diagram of first execution mode of integrated circuit package structure of the present invention.
Fig. 4 is the local enlarged diagram of the 3rd figure.
Fig. 5 is the schematic diagram of second execution mode of integrated circuit package structure of the present invention.
Fig. 6 is the schematic flow sheet of the manufacture method of integrated circuit package structure of the present invention.
[embodiment]
The present invention is described in detail below in conjunction with the accompanying drawings and the specific embodiments.
See also Fig. 3 and Fig. 4, the invention provides a kind of integrated circuit package structure 10, it comprises: a substrate 11; One integrated circuit (IC) chip (DIE) 12 is bonded on the substrate 11, and electrically connects by gold thread 121 and substrate; One integral fin (Integrated Heat Spreader, IHS) 13 be arranged at integrated circuit (IC) chip 12 tops, this integral fin 13 comprises an inner surface and an outer surface, its lower end, edge 131 is adhered on the substrate 11, this integral fin plays sealing and the effect of protecting integrated circuit (IC) chip 12, simultaneously, lower end 131, integral fin 13 edge is electrical connected by circuit and substrate 11 earth polars, plays the effect of electrostatic screen; One carbon nano pipe array 14 is formed at the inner surface of integral fin 13, this carbon nano pipe array 14 comprises a plurality of being evenly distributed and carbon nano-tube 141 parallel to each other, these carbon nano-tube 141 two ends respectively with integrated circuit (IC) chip 12 and integral fin 13 vertical contacts, constitute a plurality of heat conduction channels.Wherein, this carbon nano pipe array 14 is to be directly grown on the integral fin 13, is equivalent to one deck thermal interfacial material.The height of carbon nano pipe array 14 can be controlled by controlling its growth time, and the height of carbon nano pipe array 14 of the present invention is 0.01～0.1 millimeter.Preferably, all be filled with the nano metal material of high heat conductance in the carbon nano-tube 141 that the present invention forms, can improve its heat conducting efficient better during application, significantly improve heat conducting stability, nano metal material of the present invention comprises the nanometer copper product.In addition, substrate 11 of the present invention can electrically connect by connector 16 and motherboard 17, thereby can finish the function that is connected with other electronic building brick on the motherboard 17.
See also Fig. 5, in order to obtain radiating effect better, in actual applications, can be further form a carbon nano pipe array 15 with same method at the outer surface of integral fin 13, to be passed to heat on the integral fin 13 from integrated circuit (IC) chip 12 by this and pass to external radiator 18 better and disperse rapidly, thereby reduce the working temperature of integrated circuit (IC) chip 12 effectively.The external radiator 18 of present embodiment is selected from finned radiator.
See also Fig. 6, the manufacture method of integrated circuit package structure of the present invention comprises the steps:
Wherein, but the present invention's further growth carbon nano-pipe array is listed in the outer surface of fin, during application, makes this carbon nano pipe array between fin and external radiator, helps heat and transmits better.
Preferably, the carbon nano pipe array that the present invention forms comprises the carbon nano pipe array that is filled with the high heat conductance nano metal material, and the nano metal material of present embodiment is selected from the nanometer copper product.
Carbon nano tube array grows of the present invention may further comprise the steps in the method for fin:
At first, (Chemical MechanicalPolish CMP), makes its surface roughness be reduced to 5～10 dusts, and cleans this surface to do a cmp polishing on the surface of fin;
Secondly, at surface deposition one catalyst layer of the fin of having handled, the thickness of catalyst layer is 5～30 nanometers, and the method for catalyst layer deposition can be selected the vacuum thermal evaporation volatility process for use, also optional deposited by electron beam evaporation method.The material of catalyst can be selected iron, cobalt, nickel or its alloy for use, and present embodiment selects for use iron as catalyst material, and the thickness of its deposition is 10 nanometers;
At last, the radiator that will have catalyst layer places air, 300 ℃ of down annealing, so that the catalyst layer oxidation, shrink and become nano level catalyst granules.Treat that annealing finishes, the surface that will be distributed with the fin of catalyst granules again places in the reative cell, feed carbon source gas acetylene, utilize the low temperature thermal chemical vapor deposition method, carbon nano-tube on above-mentioned catalyst granules, form carbon nano-tube film, carbon source gas also can be selected the gas of other carbon containing for use, as ethene etc.Current, the growing method of carbon nano pipe array is comparatively ripe, specifically can consult document Science, and 1999,283,512-414 and document J.Am.Chem.Soc, 2001,123,11502-11503.The height of carbon nano pipe array of the present invention is 0.01～0.1 millimeter, and the diameter of present embodiment carbon nanotubes grown is 20 nanometers, highly is 50 microns, and spacing is 100 nanometers.
In the optimal way of the present invention, the method that growth is filled with the carbon nano pipe array of nano metal copper product may further comprise the steps:
At first, make a cmp polishing (Chemical Mechanical Polish in the fin surface of need carbon nano tube array grows, CMP), make its surface roughness be reduced to 5～10 dusts, and on the surperficial cloth of the fin of having handled the catalyst layer of a regular patternization, concrete grammar be earlier according to predetermined pattern successively by photoresistance on soft baking, exposure, the development cloth, again with catalyst on the vacuum splashing and plating or the coating method cloth that volatilizees.The material of catalyst can be selected iron, cobalt, nickel or its alloy for use, and present embodiment selects for use iron as catalyst material, and the thickness of its deposition is 10 nanometers;
Secondly, with laser evaporation method (Laser Ablation) with the graphite rod of containing metal element with superlaser moment gasification, wherein, superlaser is selected from nd yag doubled-frequency laser (Nd YAG Laser), the metallic element of present embodiment is selected from metallic copper;
Once more, with the argon gas that flows the carbon based metal steam that gasifies is sent to the fin surface that is furnished with catalyst under the argon gas atmosphere of 500Torr, wherein, the content of metallic element is no less than 1%;
At last, cooling obtains being filled with the carbon nano pipe array of metal material.
Integrated circuit package structure of the present invention is when using, because carbon nano-tube is directly to contact with fin and integrated circuit (IC) chip, further, when carbon nano pipe array is arranged between fin and the external connection radiating device, this carbon nano-tube directly contacts with fin and external connection radiating device, thereby can give full play to the excellent heat conducting performance of carbon nano-tube, the heat transferred integral fin that can well integrated circuit (IC) chip be come out is also dispersed rapidly by external connection radiating device, has excellent radiating effect.In addition, owing to be filled with nano metal material in the carbon nano-tube, can further improve heat conduction efficiency and heat conducting stability.
Claims (15)
1. integrated circuit package structure, it comprises a substrate, one integrated circuit (IC) chip is arranged on the substrate, one integral fin places the integrated circuit (IC) chip top, its lower end, edge is fixed on the substrate, this integral fin comprises an inner surface and an outer surface, one carbon nano pipe array is arranged between said integrated circuit chip and the integral fin, it is characterized in that: this carbon nano pipe array is formed at the inner surface of integral fin, and its two ends are respectively with integral fin and integrated circuit (IC) chip is vertical contacts.
2. integrated circuit package structure as claimed in claim 1 is characterized in that further being filled with in this CNT (carbon nano-tube) the high heat-conduction coefficient nano metal material.
3. integrated circuit package structure as claimed in claim 1 is characterized in that further comprising that a carbon nano pipe array is formed at the outer surface of integral fin, and these CNT (carbon nano-tube) two ends are respectively with integral fin and external connection radiating device is vertical contacts.
4. integrated circuit package structure as claimed in claim 1, what it is characterized in that this carbon nano pipe array highly is 0.01～0.1 millimeter.
5. integrated circuit package structure as claimed in claim 2 is characterized in that the high heat-conduction coefficient nano metal material comprises the nano metal copper product.
6. the manufacture method of an integrated circuit package structure, it may further comprise the steps:
One substrate is provided, and it comprises that a first surface reaches and this first surface opposing second surface;
Provide an integrated circuit (IC) chip and with this die bonding on the first surface of substrate, by gold thread the circuit on integrated circuit (IC) chip and the substrate is electrically connected again;
One integral fin is provided, and it comprises an inner surface and an opposed outer surface;
By the inner surface carbon nano tube array grows of chemical method at integral fin;
Integral fin is fixed on the substrate, makes carbon nano pipe array between integral fin and integrated circuit (IC) chip, and with direct vertical contact of integrated circuit (IC) chip;
On substrate, integrated circuit (IC) chip, integral fin, do the setting of adhesive material;
The tin ball is pasted in weldering on the second surface of substrate.
7. the manufacture method of integrated circuit package structure as claimed in claim 6 is characterized in that further being filled with in this CNT (carbon nano-tube) the high heat-conduction coefficient nano metal material.
8. the manufacture method of integrated circuit package structure as claimed in claim 7 is characterized in that further comprising forming the outer surface that a carbon nano-pipe array that is filled with nano metal material is equally listed in integral fin.
9. the manufacture method of integrated circuit package structure as claimed in claim 6 is characterized in that the growing method of this carbon nano pipe array may further comprise the steps:
The surface of the integral fin of carbon nano tube array grows is desired in polishing;
At this integral fin surface deposition catalyst;
Feed carbon source gas, at the superficial growth carbon nano pipe array of integral fin.
10. the manufacture method of integrated circuit package structure as claimed in claim 7 is characterized in that the formation method of the carbon nano pipe array that this is filled with nano metal material may further comprise the steps:
The surface of the integral fin of carbon nano tube array grows is desired in polishing;
The catalyst layer of a regular patternization on the fin surface cloth after the processing;
With the laser evaporation method with the graphite rod of containing metal element with superlaser moment gasification;
Under the argon gas atmosphere of 500Torr, the carbon based metal steam that gasifies is sent to the fin surface that is furnished with catalyst with the argon gas that flows;
Cooling obtains being filled with the carbon nano pipe array of nano metal material.
11. the manufacture method of integrated circuit package structure as claimed in claim 10, the formation method that it is characterized in that the catalyst layer of this patterning comprise earlier according to predetermined pattern in the integral fin surface successively by soft baking, exposure, development cloth on photoresistance, again with catalyst on the vacuum splashing and plating or the coating method cloth that volatilizees.
12. the manufacture method of integrated circuit package structure as claimed in claim 10 is characterized in that this nano metal material comprises the nano metal copper product.
13. the manufacture method of integrated circuit package structure as claimed in claim 10 is characterized in that the content of metallic element in this carbon based metal steam is no less than 1%.
14. the manufacture method of integrated circuit package structure as claimed in claim 10 is characterized in that this superlaser is selected from nd yag doubled-frequency laser.
15. the manufacture method of integrated circuit package structure as claimed in claim 10, the height that it is characterized in that this carbon nano pipe array is 0.01～0.1 millimeter.
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| CNB2004100511573A CN100395887C (en) | 2004-08-14 | 2004-08-14 | Integrated circuit packaging structure and manufacturing method thereof |
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| CNB2004100511573A CN100395887C (en) | 2004-08-14 | 2004-08-14 | Integrated circuit packaging structure and manufacturing method thereof |
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| CN100395887C true CN100395887C (en) | 2008-06-18 |
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| CN102280418A (en) * | 2010-06-09 | 2011-12-14 | 海力士半导体有限公司 | Semiconductor package with heat dissipation devices |
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| WO2009107229A1 (en) * | 2008-02-29 | 2009-09-03 | 富士通株式会社 | Sheet structure, semiconductor device and method of growing carbon structure |
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| KR101328353B1 (en) * | 2009-02-17 | 2013-11-11 | (주)엘지하우시스 | Heating sheet using carbon nano tube |
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| CN103117356A (en) * | 2013-02-28 | 2013-05-22 | 华北电力大学 | Carbon nanometer tube array based chip radiating method |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6407922B1 (en) * | 2000-09-29 | 2002-06-18 | Intel Corporation | Heat spreader, electronic package including the heat spreader, and methods of manufacturing the heat spreader |
| US20030173338A1 (en) * | 2001-11-21 | 2003-09-18 | Vallance Robert Ryan | Processes for nanomachining using carbon nanotubes |
| US20040005736A1 (en) * | 2002-07-02 | 2004-01-08 | Intel Corporation | Method and apparatus using nanotubes for cooling and grounding die |
| CN1483668A (en) * | 2002-09-17 | 2004-03-24 | 清华大学 | Carbon nano pipe array growth method |
| CN1501483A (en) * | 2002-11-14 | 2004-06-02 | 清华大学 | A thermal interfacial material and method for manufacturing same |
| CN1509794A (en) * | 2002-12-23 | 2004-07-07 | ���ǵ�����ʽ���� | Filter of applied carbon nanometer tube |
-
2004
- 2004-08-14 CN CNB2004100511573A patent/CN100395887C/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6407922B1 (en) * | 2000-09-29 | 2002-06-18 | Intel Corporation | Heat spreader, electronic package including the heat spreader, and methods of manufacturing the heat spreader |
| US20030173338A1 (en) * | 2001-11-21 | 2003-09-18 | Vallance Robert Ryan | Processes for nanomachining using carbon nanotubes |
| US20040005736A1 (en) * | 2002-07-02 | 2004-01-08 | Intel Corporation | Method and apparatus using nanotubes for cooling and grounding die |
| CN1483668A (en) * | 2002-09-17 | 2004-03-24 | 清华大学 | Carbon nano pipe array growth method |
| CN1501483A (en) * | 2002-11-14 | 2004-06-02 | 清华大学 | A thermal interfacial material and method for manufacturing same |
| CN1509794A (en) * | 2002-12-23 | 2004-07-07 | ���ǵ�����ʽ���� | Filter of applied carbon nanometer tube |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102280418A (en) * | 2010-06-09 | 2011-12-14 | 海力士半导体有限公司 | Semiconductor package with heat dissipation devices |
| CN102280418B (en) * | 2010-06-09 | 2015-02-18 | 海力士半导体有限公司 | Semiconductor package with heat dissipation devices |
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| CN1734754A (en) | 2006-02-15 |
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