CN100372084C - Method for mfg. heat reinforced ball grid array IC packaging substrate and packaging substrate - Google Patents
Method for mfg. heat reinforced ball grid array IC packaging substrate and packaging substrate Download PDFInfo
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- CN100372084C CN100372084C CNB03140457XA CN03140457A CN100372084C CN 100372084 C CN100372084 C CN 100372084C CN B03140457X A CNB03140457X A CN B03140457XA CN 03140457 A CN03140457 A CN 03140457A CN 100372084 C CN100372084 C CN 100372084C
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- conductive pattern
- bga
- heat radiation
- copper
- copper coin
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Abstract
The present invention relates to a method for manufacturing a thermally enhanced BGA integrated circuit package basal plate. The present invention comprises the steps that a corrosion resistant plate is fully electroplated with copper foil, a BGA conductive pattern is formed on the copper foil, and an insulating medium layer is arranged; heat conducting copper columns are formed on the surface of a radiating copper plate; the surface provided with the heat conducting copper columns of the radiating copper plate and the surface provided with the BGA conductive pattern of the corrosion resistant plate are stacked so that the radiating copper plate, the insulating medium layer and the corrosion resistant plate are prompted to be solidified and stuck through vacuum thermal press plate technology; the corrosion resistant plate is stripped, the copper foil is removed, a solder resistance layer is formed on the BGA conductive pattern, a metal racket of the BGA conductive pattern is electroplated, and fingers and rings are bound; an IC package cavity is created and then partitioned into a plurality of individual basal plate units. The present invention has the advantages of original conception and simple manufacturing technology; the conductive pattern is embedded into an insulating medium, a heat conducting copper column structure is arranged, so radiating capability is greatly enhanced; besides, fine lines can be formed, so package reliability is high.
Description
Technical field
(Integrated Circuit, IC) base plate for packaging and manufacturing technology thereof specifically are a kind of thermal-enhanced ball grid array (Enhanced BGA) integrated circuit (IC) substrate package and manufacture methods thereof to the present invention relates to integrated circuit.
Background technology
Along with making rapid progress of information electronic technology, more and more faster to the rate request of transmission of Information and processing, the operating frequency of integrated circuit (IC) chip is also more and more higher.For making chip give full play to its performance, considerable role is being played the part of in the integrated circuit encapsulation.The high-frequency resistance coupling and the heat dissipation of chip all need to finish by the structure and the wires design of encapsulation.
Ball grid array (BALL GRID ARRAY-BGA) encapsulates the mode of utilizing soldered ball (Solder Ball) to be covered with the floor space of whole base plate, replaces the pin of traditional conductive metal frames.Because BGA can utilize the layout of the floor space of whole base plate as contact, so have the advantage of high input and output I/O number.In addition, during with the Reflow Soldering operation of BGA packaged integrated circuits and motherboard assembling process, surface tension after the soldered ball dissolving can produce the phenomenon of the self-calibrating between BGA pin and motherboard pin, therefore the aligning accuracy of pin is less demanding between assembling process BGA encapsulation and motherboard, add good, the good electrical characteristic of bond strength, make BALL GRID ARRAY become one of main flow of present integrated circuit encapsulation.
A kind of BGA encapsulated type that is born under thermal-enhanced BGA (the Thermal Enhanced BGA-EBGA) situation that to be integrated circuit (IC) chip have higher requirements to the heat dissipation of encapsulation.EBGA is the bga substrate that the conductive pattern layer of BGA, insulating barrier and heat radiation copper coin are combined as a whole.
The Tape BGA that comprises heat dissipating layer (coil type BGA) the base plate for packaging manufacture craft that Fig. 1-6 expression is known, its step is as follows:
At first with reference to figure 1, the substrate of Tape BGA (101) is an one with Copper Foil (103) pressing, and by the boundary vicinity formation Tape Consistent through hole (102) of machining process at substrate (101), Tape through hole (102) is used for the transmission destination of substrate (101) on Tape BGA frock clamp, and substrate (101) is the polyimide insulative base material.
Subsequently as shown in Figure 2, to Tape through hole surface remove photoresist slag (Desmear), chemical polishing etc., then go up and form photoresist layer (Photo resist) at Copper Foil (103), by exposure, development and etching, perhaps the method for attenuate Copper Foil and graphic plating forms BGA conductive pattern (104), and resist layer at last again fades away.
Then, as shown in Figure 3, go up coating solder mask (105),, the racket on the BGA conductive pattern (104), nation are pointed surely and encircle figures and partly come out by exposure, development at BGA conductive pattern (104).
As shown in Figure 4, racket, the nation that the opening part of solder mask (105) is exposed points and partially conductive figure such as ring carries out the plating of follow-up nickel (106) and golden (107) surely.
As shown in Figure 5, on substrate (101), process chip cavity (110), and substrate cut become unit group with the prefabricated corresponding size of heat radiation copper coin (109), at last bonding sheet (108) is placed between substrate (101) and the heat radiation copper coin (109), hot pressing technique commonly used is bonded in substrate (101) on the heat radiation copper coin (109) in making by printed substrate.Fig. 6 for this product after removing through hole (102) frame and the profile after loading onto tin ball (111).
Method need be pasted heat radiation copper coin (109) one by one and is one, technology length consuming time with substrate (101) bar pressing as mentioned above.And because between heat radiation copper coin (109) and BGA substrate (101), need to adhere to one deck adhesion coating (108), this adhesion coating plays outside the inhibition by the heat dissipation channel of tin ball (111) to mainboard chip on the one hand, and the global reliability to substrate also exerts a certain influence on the other hand.In addition, the base material of making this substrate is a polyimides, costs an arm and a leg, and causes the substrate cost higher.
Simultaneously, the conductor layer that obtains in this method for preparing substrate is positioned at above the insulating medium layer, the BGA conductive pattern that forms, surely point etc. as nation, all have certain side direction slope shown in Figure 7 to extend, and often with burr, therefore follow-up nickel, gold are electroplated and can be extended and the burr edge to the slope Zoom Side, as shown in Figure 8, this defective will limit the design density that nation points surely.
Summary of the invention
In order to overcome the problems referred to above that existing Tape BGA manufacturing technology exists, the invention provides a kind of thermal-enhanced ball grid array (Enhanced BGA) integrated circuit (IC) substrate package and manufacture method thereof.
The thermal-enhanced ball grid array integrated circuit (IC) substrate package of the present invention manufacture method is achieved in that it comprises the steps:
A, on corrosion resistant plate whole plate electro copper foil, paste etchant resist at copper foil surface, on described Copper Foil, form the BGA conductive pattern by exposure, development, graphic plating and the method that takes off film; The insulating medium layer of semi-cured state is set on described BGA conductive pattern;
B, paste etchant resist, form heat conduction copper post, form one deck promoting layer by oxidation processes then by exposure, development, graphic plating and the method that takes off film on heat radiation copper coin surface;
C, the copper coin that will dispel the heat have the one side of heat conduction copper post and face folded with one of the BGA conductive pattern that has of corrosion resistant plate, the ground connection racket of conductive pattern on the heat conduction copper post of heat radiation on the copper coin and the corrosion resistant plate is aimed at up and down, impelled heat radiation copper coin and insulating medium layer, corrosion resistant plate curing bonding by vacuum hotpressing plate technology then;
D, corrosion resistant plate is peeled off from Copper Foil, removed Copper Foil, form solder mask on the BGA conductive pattern that exposes, and point surely and encircle in Metal racket, the nation of BGA conductive pattern and all form opening, electronickelling, gold form nickel dam, gold layer at described opening part;
E, offer the cavity of IC encapsulation usefulness, will put in order plate then and be divided into some single base board units.
The integrated circuit (IC) substrate package unit that adopts the inventive method to make, mainly comprise the heat radiation copper coin, it is characterized in that: above the heat radiation copper coin (301) insulating medium layer (205) is set, between insulating medium layer (205) and the heat radiation copper coin (301) dielectric adhesion promotion layer (303) is arranged, insulating medium layer (205) surface is inlaid with BGA conductive pattern (203), solder mask (206) is arranged on BGA conductive pattern (203), solder mask (206) is gone up the Metal racket of the BGA conductive pattern that exposes, nation points surely with ring surface and is coated with nickel dam (208) and gold layer (209), have the cavity (212) that is used to place chip in the middle of the heat radiation copper coin (301), heat radiation copper coin (301) has heat conduction copper post (302), and heat conduction copper post (302) ground connection racket (204) direct and conductive pattern connects.
The present invention adopts and form circuit and coating dielectric on corrosion resistant plate, forms heat conduction copper post on the heat radiation copper coin, and the technology mode by the vacuum hotpressing plate makes circuit and dielectric transfer to method on the heat radiation copper coin from corrosion resistant plate.Its simplified manufacturing process has been avoided technologies such as traditional de-smear, electroless copper plating, is easy to control, can reduce substrate manufacturing costs, improves heat-sinking capability, and can form than the fine rule road, and product has good reliability.
Its B6A conductive pattern is to be embedded in the dielectric, in the electroplating process of metallic nickel that racket, the nation subsequently points surely and encircle and gold, the dielectric of finger side plays the effect of electroplating mask plate, the nickel gold plating burr and the lateral expansion that make nation point surely are minimum, help making the substrate that high density nation points surely.Simultaneously, because the flatness height of finger, the fixed effective area of nation increases the good reliability of encapsulation.
The used selectable scope of dielectric raw material is wide, and price is suitable, is convenient to use good electric property, cost is low and damp and hot reliability is very high insulating material.
The heat radiation copper coin has the heat conduction Copper column structure, this heat conduction copper post ground connection racket direct and conductive pattern connects, the heat part of distributing during chip operation can be transmitted on the motherboard copper layer of electronic installation by heat radiation copper coin, heat conduction copper post, ground connection racket and tin ball, thereby has strengthened the heat dissipation of substrate.
Description of drawings
Fig. 1-the 5th, the manufacture craft schematic flow sheet of the IC base plate for packaging of traditional Tape BGA;
Fig. 6 is the profile of traditional Tape BGA;
Fig. 7, the 8th, the nation in traditional Tape BGA manufacture process in the conductor layer point the forward and backward partial enlarged drawing of nickel gold surely;
Fig. 9-the 29th, manufacture craft flow chart of the present invention;
Wherein:
Fig. 9-14 is illustrated in electric plating of whole board Copper Foil and the graphic plating process on the corrosion resistant plate;
Figure 15 is a coating dielectric schematic diagram on the corrosion resistant plate of Figure 14;
Figure 16-the 17th, the heat conduction copper post on the heat radiation copper coin form and the brown or the melanism on surface are handled schematic diagram;
Figure 18 is a schematic diagram of the BGA conductive pattern on the corrosion resistant plate being transferred to the heat radiation copper coin by the coating dielectric;
Figure 19 is a schematic diagram of the BGA conductive pattern on the corrosion resistant plate being transferred to the heat radiation copper coin by the dielectric film of semi-solid preparation;
Figure 20 is the state diagram after stainless steel is peeled off from Copper Foil;
Figure 21 is the state diagram after Copper Foil is removed by Copper Foil reduction process method on the circuit;
Figure 22 is the schematic diagram that forms solder mask on the basis of Figure 21;
Figure 23 is the schematic diagram of position electronickelling gold such as racket, the nation of the BGA conductive pattern that exposes on the solder mask points surely, ring;
Figure 24, the 25th, nation points the nickel gold surely and electroplates forward and backward cross section enlarged drawing in the substrate of the present invention;
Figure 26 is a heat radiation copper coin back side electroless nickel layer schematic diagram;
Figure 27 is the base board unit structural representation of offering behind the cavity of placing chip;
Figure 28 is that the whole plate of production usefulness forms the base board unit schematic diagram through over-segmentation;
Figure 29 is the cutaway view behind the employing base board unit packaged chip of the present invention.
Specific implementation method
Invention further specifies to one's duty below in conjunction with accompanying drawing.
Label declaration in the accompanying drawing:
101 substrates 110 are placed the cavity of chip
102Tape through hole 111 tin balls
103 Copper Foils, 112 comparative example substrate nations point surely
The slope expansion of 104BGA conductive pattern electronickelling gold side direction
105 solder masks, 200 corrosion resistant plates
Tack coat 203BGA conductive pattern between 108 substrates and heat radiation copper coin
109 heat radiation copper coin 204BGA ground connection rackets
205 dielectrics, 301 heat radiation copper coins
The insulating medium layer 302 heat conduction copper posts of 205a silk-screen coating
The dielectric film 303 dielectric adhesion promotion layers of 205b prepreg
206 solder masks, 304 heat radiation copper coin back side electroless nickel layers
The nickel gold of 207 solder masks is electroplated opening 305 chips
210 nations point conductive copper layer 308 ground loops surely
211 substrate of the present invention nations point nickel gold 309 power rings surely
310 encapsulating compounds are extended on the side direction slope of electroplating
212 place cavity 311 nation's deposit lines of chip
300 base plate for packaging unit
The main manufacturing process of integrated circuit of the present invention (IC) base plate for packaging is as follows:
One, the coating of the formation of BGA conductive pattern and dielectric on the corrosion resistant plate
As Fig. 9, shown in 10, at first to go up by whole plate electric plating method and electroplate the thin Copper Foil (201) of one deck at corrosion resistant plate (200), this Copper Foil plays the buffer action of dielectric and corrosion resistant plate.
Shown in Figure 11-14, paste etchant resist (202) on Copper Foil (201) surface, go up at described Copper Foil (201) by exposure, development, graphic plating and the method that takes off film and form BGA conductive pattern (203), see Figure 14.
With reference to Figure 15, the insulating medium layer of semi-cured state is set on described BGA conductive pattern.Described dielectric has the applied dielectric printing ink of hot pressing adhesive solidification character, or has the semi-solid preparation resin sheet of hot pressing adhesive solidification character or semi-solid preparation resin dry film etc.
The method that insulating medium layer can adopt silk-screen or roller coat or curtain to be coated with applies one deck dielectric printing ink (205a) on the line, through suitable baking condition, make dielectric (205a) reach semi-cured state (B-Stage), promptly be solid-state under the normal temperature state, still can present liquid state being heated to certain high temperature.The thickness of the dielectric (205a) of institute's silk-screen depends on the thickness of insulating layer requirement behind the final formation bga substrate.
Above-mentioned dielectric material (205a) can be selected the AE-3000 heat curing-type insulating resin etc. that changes into the liquid state of production as Hitachi for use; Above-mentioned dielectric film (205b) can be selected the dry-film type LFI-700BP that produces as Japanese sun printing ink company etc. for use.
Two, the processing of heat radiation copper coin
With reference to Figure 16,17, paste etchant resist on heat radiation copper coin (301) surface, form heat conduction copper post (302) by exposure, development, graphic plating and the method that takes off film, form the promoting layer (303) of one deck resin bonding then by the method for black oxidation or brown oxidation technology.
Three, the transfer of circuit
As shown in figure 18, the copper coin (301) that will dispel the heat has the one side of heat conduction copper post (302) and resin-bonded promoting layer (303), with corrosion resistant plate (200) have a BGA conductive pattern (203), and be coated with dielectric resin (205a) one in the face of folded, utilize the method for the pin location ground connection racket (204) of BGA conductive pattern that will dispel the heat on heat conduction copper post (302) and the corrosion resistant plate on the copper coin to aim at up and down, then by traditional vacuum hotpressing plate technology impel dispel the heat copper coin (301) and dielectric resin (205a) and be loaded with the curing of corrosion resistant plate (200) of BGA conductive pattern bonding.
Said process also can utilize the dielectric film (205b) with the prepreg state to be clipped in the corrosion resistant plate that forms the BGA conductive pattern (200) shown in Figure 14 and the heat conduction of formation copper post (302) and growth shown in Figure 17 has between the heat radiation copper coin (301) of resin bonding promoting layer (303), utilize the method for the pin location ground connection racket (204) of BGA conductive pattern that will dispel the heat on heat conduction copper post (302) and the corrosion resistant plate on the copper coin to aim at up and down, the technology of utilizing the vacuum hotpressing plate then with BGA conductive pattern (203) on the corrosion resistant plate and heat radiation copper coin (301) by the prepreg state (205b) pressing of dielectric film and be cured as one, see Figure 19.
Corrosion resistant plate (200) and Copper Foil (201) are peeled off, finished BGA conductive pattern (203) by dielectric (205) as shown in figure 20 transfer to the heat radiation copper coin (301).Be to utilize on corrosion resistant plate and the corrosion resistant plate adhesion between the Copper Foil much smaller than the adhesion of described Copper Foil and dielectric separating between the Copper Foil of electroplating on corrosion resistant plate and the corrosion resistant plate, thereby stainless steel is realized peeling off from Copper Foil.
As shown in figure 21, the Copper Foil (201) that will cover on the BGA conductive pattern (203) by the Copper Foil reduction process is removed clean.
Four, the formation of solder mask
As shown in figure 22, solder mask (206) be by figure transfer (be silk-screen, exposure, develop) but with photosensitive solder resist resin figure transfer to the base board unit face.Solder mask (206) forms protective layer and the Metal racket on BGA conductive pattern (203) to the BGA conductive pattern, nation points surely and encircle and form open (207) that need the plating of follow-up nickel gold.
Five, follow-up nickel-gold layer forms
Metal racket, the nation that utilizes nickel, golden electroplating technology that solder mask (206) upper shed (207) is located to expose points surely and ring carries out follow-up electronickelling, gold, forms nickel, gold layer (208,209), sees Figure 23.
Figure 24, the 25th, nation points the local amplification profile of electronickelling gold front and back surely in the substrate of the present invention.The nation that Figure 24 demonstrates substrate of the present invention points conductive copper layer (210) surely and is embedded in the dielectric (205), the side that nation points conductive copper layer surely is wrapped in dielectric, and these dielectrics play the plating mask effect in follow-up nickel gold electroplating process, therefore the side direction slope extension (211) of nickel (208) and gold (209) is very little in follow-up nickel gold electroplating process, sees Figure 25.The design that this characteristics of substrate of the present invention will help high density nation to point surely.
Six. heat radiation copper coin back side nickel is electroplated
Protecting under the positive BGA figure situation with taking off except that film, utilizing the nickel electroplating technology to electroplate layer of metal nickel dam (304) at the heat radiation copper coin back side, it is not oxidized to play protection heat radiation copper coin face, and is convenient to the substrate back lettering, sees Figure 26.
Seven, integrated circuit (IC) chip is placed the formation of cavity
With reference to Figure 27, by the traditional mechanical method for processing, open a cavity (212) in the centre of the heat radiation copper coin of each base board unit, be used for placing the IC chip.Form black or brown oxide layer at this cavity (212) inner surface with chemical method simultaneously.
Eight, the cutting of base board unit
By cutting route as schematically shown in Figure 28, with the way of machining the big plate of an integral body is divided into some single base board units (300), Figure 27 is a typical case of base board unit (300).
With reference to Figure 27, the integrated circuit (IC) substrate package unit of the inventive method manufacturing comprises the heat radiation copper coin, above its heat radiation copper coin (301) insulating medium layer (205) is set, between insulating medium layer (205) and the heat radiation copper coin (301) dielectric adhesion promotion layer (303) is arranged, insulating medium layer (205) surface is inlaid with BGA conductive pattern (203), solder mask (206) is arranged on BGA conductive pattern (203), solder mask (206) is gone up the Metal racket of the BGA conductive pattern that exposes, nation points surely with ring surface and is coated with nickel dam (208) and gold layer (209), have the cavity (212) that is used to place chip in the middle of the heat radiation copper coin (301), but bottom surface nickel coating (304).
Heat radiation copper coin (301) has heat conduction copper post (302), and heat conduction copper post (302) ground connection racket (204) direct and conductive pattern connects.The heat part of distributing during chip operation can be transmitted on the motherboard copper layer of electronic installation by heat radiation copper coin, heat conduction copper post, ground connection racket and tin ball, thereby has strengthened the heat dissipation of substrate.
Figure 29 is the cutaway view behind the employing base board unit packaged chip of the present invention.Chip (305) is placed in the cavity (212), realizes being communicated with of chip (305) signal port and substrate BGA conductive pattern (203) by nation's deposit line (311).
Printing encapsulating compound box dam (307), and in box dam (307), inject encapsulating compound (310) and seal chip (305) and fixed (the being bonding) gold thread (311) of nation, protection chip (305) and nation's deposit line (311) are not subjected to the influence of external environment.Place at last tin ball (306) to the BGA substrate the racket position and by Reflow Soldering the tin ball is fixed on the racket, just obtain complete BGA encapsulated integrated circuit.
Claims (10)
1. a thermal-enhanced ball grid array integrated circuit (IC) substrate package manufacture method is characterized in that comprising the steps:
A, on corrosion resistant plate whole plate electro copper foil, on described Copper Foil, form the BGA conductive pattern, the insulating medium layer of semi-cured state is set on described BGA conductive pattern;
B, surperficial by graphic plating technology formation heat conduction copper post at the heat radiation copper coin forms one deck promoting layer by oxidation processes then;
The one side that c, the copper coin that will dispel the heat have a heat conduction copper post and corrosion resistant plate have the BGA conductive pattern one in the face of folded, the ground connection racket of conductive pattern on the heat conduction copper post of heat radiation on the copper coin and the corrosion resistant plate is aimed at up and down, impelled heat radiation copper coin and insulating medium layer, corrosion resistant plate curing bonding by vacuum hotpressing plate technology then;
D, peel off corrosion resistant plate, remove Copper Foil, form solder mask on the BGA conductive pattern that exposes, Metal racket, the nation of electroplating the BGA conductive pattern point and the ring place surely, form nickel dam, gold layer;
E, offer the cavity of IC encapsulation usefulness, will put in order plate then and be divided into some single base board units.
2. according to the described manufacture method of claim 1, it is characterized in that: among the step a, paste etchant resist, on described Copper Foil, form the BGA conductive pattern by exposure, development, graphic plating and the method that takes off film at copper foil surface.
3. according to the described manufacture method of claim 1, it is characterized in that: among the step a, the method that adopts silk-screen or roller coat or curtain to be coated with applies one deck dielectric on described BGA conductive pattern, and baking makes dielectric become semi-cured state.
4. according to the described manufacture method of claim 1, it is characterized in that: among the step a, on described BGA conductive pattern, attach the dielectric film of semi-cured state.
5. according to the described manufacture method of claim 3, it is characterized in that: described dielectric is the applied dielectric printing ink with hot pressing adhesive solidification character.
6. according to the described manufacture method of claim 4, it is characterized in that: described dielectric film is the semi-solid preparation resin sheet with hot pressing adhesive solidification character, or semi-solid preparation resin dry film.
7. according to the described manufacture method of claim 1, it is characterized in that: among the step b, paste etchant resist on heat radiation copper coin surface, form heat conduction copper post by exposure, development, graphic plating and the method that takes off film, the promoting layer on surface, heat conduction copper post place and heat conduction copper post surface is to adopt black oxidation or the realization of brown oxidation technology.
8. according to the described manufacture method of claim 1, it is characterized in that: in steps d, at heat radiation copper coin back side plated metal nickel dam.
9. according to the described manufacture method of claim 1, it is characterized in that: the inner surface of the cavity in the middle of the heat radiation copper coin of base board unit has oxide layer.
10. the integrated circuit (IC) substrate package unit of making according to the method for claim 1, comprise the heat radiation copper coin, it is characterized in that: above the heat radiation copper coin (301) insulating medium layer (205) is set, between insulating medium layer (205) and the heat radiation copper coin (301) dielectric adhesion promotion layer (303) is arranged, insulating medium layer (205) surface is inlaid with BGA conductive pattern (203), solder mask (206) is arranged on BGA conductive pattern (203), solder mask (206) is gone up the Metal racket of the BGA conductive pattern that exposes, nation points surely with ring surface and is coated with nickel dam (208) and gold layer (209), have the cavity (212) that is used to place chip in the middle of the heat radiation copper coin (301), heat radiation copper coin (301) has heat conduction copper post (302), and heat conduction copper post (302) ground connection racket (204) direct and conductive pattern connects.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB03140457XA CN100372084C (en) | 2003-09-04 | 2003-09-04 | Method for mfg. heat reinforced ball grid array IC packaging substrate and packaging substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB03140457XA CN100372084C (en) | 2003-09-04 | 2003-09-04 | Method for mfg. heat reinforced ball grid array IC packaging substrate and packaging substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1591805A CN1591805A (en) | 2005-03-09 |
| CN100372084C true CN100372084C (en) | 2008-02-27 |
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| CNB03140457XA Expired - Fee Related CN100372084C (en) | 2003-09-04 | 2003-09-04 | Method for mfg. heat reinforced ball grid array IC packaging substrate and packaging substrate |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101944512A (en) * | 2010-09-30 | 2011-01-12 | 无锡中微高科电子有限公司 | Switching base plate packaged by integrated circuit |
| US9406658B2 (en) * | 2010-12-17 | 2016-08-02 | Advanced Semiconductor Engineering, Inc. | Embedded component device and manufacturing methods thereof |
| WO2016209244A1 (en) * | 2015-06-25 | 2016-12-29 | Intel Corporation | Integrated circuit structures with recessed conductive contacts for package on package |
| CN106658977B (en) * | 2015-10-29 | 2019-11-12 | 碁鼎科技秦皇岛有限公司 | The circuit manufacturing method of circuit board and the circuit board made using this method |
| CN109788664B (en) * | 2017-11-14 | 2020-07-24 | 何崇文 | Circuit substrate and manufacturing method thereof |
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| US20020017716A1 (en) * | 2000-06-29 | 2002-02-14 | Tatsuya Ohtaka | Tab tape with stiffener and semiconductor device using same |
| JP2002124594A (en) * | 2000-10-18 | 2002-04-26 | Hitachi Cable Ltd | Semiconductor element packaging component and semiconductor device using the same |
| US20020114133A1 (en) * | 2001-01-30 | 2002-08-22 | Siliconware Precision Industries Co., Ltd. | Cavity-down tape ball grid array package assembly with grounded heat sink and method of fabricating the same |
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5397921A (en) * | 1993-09-03 | 1995-03-14 | Advanced Semiconductor Assembly Technology | Tab grid array |
| CN1239588A (en) * | 1996-12-02 | 1999-12-22 | 美国3M公司 | Tab tape ball grid array package with vias laterally offset from solder ball bond sites |
| JPH11251485A (en) * | 1998-03-06 | 1999-09-17 | Sony Corp | Semiconductor device and its manufacture |
| US20020017716A1 (en) * | 2000-06-29 | 2002-02-14 | Tatsuya Ohtaka | Tab tape with stiffener and semiconductor device using same |
| JP2002124594A (en) * | 2000-10-18 | 2002-04-26 | Hitachi Cable Ltd | Semiconductor element packaging component and semiconductor device using the same |
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| Publication number | Publication date |
|---|---|
| CN1591805A (en) | 2005-03-09 |
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