CN100371278C - Multicrystal silicon etching process capable of avoiding forming burr on channel bottom - Google Patents

Multicrystal silicon etching process capable of avoiding forming burr on channel bottom Download PDF

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CN100371278C
CN100371278C CNB200410087099XA CN200410087099A CN100371278C CN 100371278 C CN100371278 C CN 100371278C CN B200410087099X A CNB200410087099X A CN B200410087099XA CN 200410087099 A CN200410087099 A CN 200410087099A CN 100371278 C CN100371278 C CN 100371278C
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oxygen
reactant gases
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CN1616367A (en
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孙静
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Beijing North Microelectronics Co Ltd
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Beijing North Microelectronics Co Ltd
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Abstract

The present invention relates to a polysilicon etching process which comprises steps as following: (1) hard mask etching; (2) degumming operation; (3) polysilicon etching; (4) over etching; tetracarbon octafluoride process gas with the flow quantity of 2 to 50 sccm is added into the traditional process; in addition, the flow quantity of hydrogen bromide is from 100 to 500 sccm, the flow quantity of He/oxygen is from 0 to 100 sccm, the power of an upper electrode and the power of a lower electrode are respectively from 400 to 1500w and from 0 to 200w, and the pressure is from 10 to 200mTorr. the process can be used for avoiding the excessive generation of polymers and the rough edges generated at the bottom of a groove.

Description

The polycrystalline silicon etching process of avoiding the channel bottom burr to generate
Invention field
The present invention relates to a kind of polycrystalline silicon etching process, particularly a kind of polycrystalline silicon etching process of avoiding burr to generate.
Background of invention
Along with the development of semiconductor technology, grid oxide layer is more and more thinner, and the lines of etching are more and more thinner, and this just requires, and etch polysilicon has higher selection ratio with grid oxygen in the etching technics.The silicon etching of existing technology generally adopts chlorine (Cl 2), hydrogen bromide (HBr), helium+oxygen (He+O 2) as main reaction gas.Concrete processing condition are as follows:
Minimum value Maximum value
He+O 2(sccm) C1 2(sccm) HBr (sccm) pressure (mTorr) upper electrode power (w) 0 30 50 10 500 20 100 400 30 1500
Lower electrode power (w) 100 1000
Silicon etching to be selected ratio in order improving, to be reduced damage in one step, generally adopted the flow velocity that increases hydrogen bromide (HBr) when over etching, and added helium+oxygen or nitrogen passivation gas, and the method that reduces lower electrode power simultaneously is with the reduction etch rate.Concrete technology is as follows:
Minimum value Maximum value
He/O 2(sccm) HBr (sccm) pressure (mTorr) upper electrode power (w) 0 5 2 400 100 500 100 1500
Lower electrode power (w) 0 500
But low etch rate causes polymkeric substance too much to produce, and forms little mask (micro-mask) at channel bottom, thereby causes the generation of burr (grass).
Summary of the invention
The purpose of this invention is to provide a kind of polycrystalline silicon etching process of avoiding burr to generate.
The objective of the invention is to reach by the following technical programs:
Polysilicon silicon chip erosion pre-structure is as follows:
(1) bottom is a silicon chip;
(2) growth layer of silicon dioxide 10-50 dust on the silicon chip;
(3) growth one deck polysilicon 1000-3000 dust on the silicon-dioxide;
(4) the hard mask of growth one deck on the polysilicon; Hard mask can be silicon oxide, silicon nitride, silicon oxynitride;
(5) silicon chip topmost is the optical cement figure after the photoetching.
A kind of polycrystalline silicon etching process, its step is as follows:
(1) the hard mask of etching: fluoro-gas C in the reactant gases XF YH ZWherein X is the integer among the 1-4; Y is the integer among the 4-8; Z is 0-1;
(2) remove photoresist;
(3) etching polysilicon;
(4) over etching;
Hydrogen bromide is 100-500sccm in the reactant gases in the described step (4), and octafluoroization four carbon are 2-50sccm, and the flow of helium+oxygen is 20-100sccm, and upper/lower electrode power is respectively 400-1500w, 0-200w, and pressure is 10-200mTorr.
A kind of optimal technical scheme is characterized in that: it is characterized in that: fluoro-gas C in the reactant gases in the described step (1) XF YH ZFlow be 65-100sccm, the flow of oxygen is 0-12sccm, the flow of argon gas is 200-400sccm, upper/lower electrode power is respectively 400-1500w, 0-1000w, pressure is 2-20mTorr.
A kind of optimal technical scheme is characterized in that: remove photoresist with the chamber of removing photoresist independently in the described step (2).
A kind of optimal technical scheme, it is characterized in that: the flow of oxygen is 1-10sccm in the reactant gases in the described step (3), and the flow of chlorine is 0-150sccm, and the flow of hydrogen bromide is 50-500sccm, upper/lower electrode power is respectively 400-1500w, 0-200w, and pressure is 2-100mTorr.
A kind of optimal technical scheme, it is characterized in that: hydrogen bromide is 100-500sccm in the reactant gases in the described step (4), and octafluoroization four carbon are 2-50sccm, and the flow of helium+oxygen is 20-100sccm, upper/lower electrode power is respectively 400-1500w, 0-200w, and pressure is 10-200mTorr.
A kind of optimal technical scheme is characterized in that: flow is helium+oxygen of 20-100sccm in the reactant gases in the described step (4), with flow be 2-50sccm nitrogen substitute.
A kind of optimal technical scheme is characterized in that: fluoro-gas C in the reactant gases in the described step (1) 3F 6H 1Flow be 80sccm, the flow of oxygen is 0sccm, the flow of argon gas is 200sccm, upper/lower electrode power is respectively 500w, 80w, pressure is 5mTorr; Oxygen is 3sccm in the reactant gases in the described step (3), and chlorine is 50sccm, and hydrogen bromide is 250sccm, and upper/lower electrode power is respectively 400w, 20w, and pressure is 10mTorr; Hydrogen bromide is 300sccm in the reactant gases in the described step (4), and octafluoroization four carbon are 5sccm, and helium+oxygen is 20sccm, and upper/lower electrode power is respectively 400w, 0w, and pressure is 60mTorr.
In the step, notice that pressure is high more at over etching (Overetch), oxygen is not easy to be taken out more, easy more formation protective layer.
According to the present invention, add octafluoroization four carbon (C in the step at over etching (Overetch) 4F 8) gas, by adjusting HBr/C 4F 8/ He/O 2The flow of etching gas within optimum range, can be avoided the generation of burr (grass) with its gas setting, and obtain higher selection than with section preferably.
Fluorine is the strongest with respect to the activity of chlorine, bromine, so etching speed is the fastest; Tetrafluoro-methane (CF 4) do not have polymkeric substance to produce substantially, and etch rate is the fastest; CHF 3Relatively slow, there is a spot of polymkeric substance to generate; Octafluoroization four carbon (C 4F 8) etching speed is slower, produces polymkeric substance, polymer formation protective layer protective side wall and bottom in etching process; Under oxygen containing plasma ambient, the polymkeric substance of carbon is etched, thereby by parameters such as adjustments of gas flow velocitys, finds the trim point of deposit and etching.In etching, add octafluoroization four carbon (C 4F 8), the flow velocity of minimizing helium+oxygen or nitrogen reaches the purpose of avoiding polymkeric substance too much to produce and generate at channel bottom burr (grass).
The present invention is described in detail but and do not mean that limiting the scope of the invention below by the drawings and specific embodiments.
Description of drawings
The etching that Fig. 1 forms for the comparative example is figure as a result;
Fig. 2 is the etching polysilicon of etching technics of the present invention processing figure as a result.
Embodiment
The comparative example 1
Polysilicon silicon chip erosion pre-structure is as follows:
(1) bottom is a silicon chip;
(2) growth layer of silicon dioxide 30 dusts on the silicon chip;
(3) growth one deck polysilicon 2000 dusts on the silicon-dioxide;
(4) the hard mask of growth one deck silicon oxide on the polysilicon;
(5) silicon chip topmost is the optical cement figure after the photoetching.
A kind of polycrystalline silicon etching process, its step is as follows:
(1) the hard mask of etching: fluoro-gas C in the reactant gases XF YH ZFlow is 65sccm, and the flow of oxygen is 0sccm, and the flow of argon gas is 200sccm, and upper/lower electrode power is respectively 800w, 120w, and pressure is 2mTorr; C XF YH ZMiddle X is 1; Y is 4; Z is 0;
(2) remove photoresist: the employing independently chamber of removing photoresist is removed photoresist;
(3) etching polysilicon:
The flow of oxygen is 5sccm in the reactant gases, and the flow of chlorine is 80sccm, and the flow of hydrogen bromide is 120sccm, and upper/lower electrode power is respectively 600w, 50w, and pressure is 8mTorr;
(4) over etching:
The flow of hydrogen bromide is 350sccm in the reactant gases, and the flow of helium/oxygen is 80sccm, and upper/lower electrode power is respectively 800w, 0w, and pressure is 15mTorr.
The structure of gained etch polysilicon has burr to generate at channel bottom as shown in Figure 1.
Embodiment 1
Polysilicon silicon chip erosion pre-structure is as follows:
(1) bottom is a silicon chip;
(2) growth layer of silicon dioxide 13 dusts on the silicon chip;
(3) growth one deck polysilicon 1000 dusts on the silicon-dioxide;
(4) hard mask 400 dusts of growth one deck silicon oxide on the polysilicon;
(5) silicon chip topmost is the optical cement figure after the photoetching.
A kind of polycrystalline silicon etching process, its step is as follows:
(1) the hard mask of etching: fluoro-gas C in the reactant gases XF YH ZFlow be 100sccm, the flow of oxygen is 0sccm, the flow of argon gas is 300sccm, upper/lower electrode power is respectively 500w, 80w, pressure is 2mTorr; C XF YH ZMiddle X is 1; Y is 4; Z is 0;
(2) remove photoresist: the employing independently chamber of removing photoresist is removed photoresist;
(3) etching polysilicon:
The flow of oxygen is 3sccm in the reactant gases, and the flow of chlorine is 30sccm, and the flow of hydrogen bromide is 100sccm, and upper/lower electrode power is respectively 500w, 20w, and pressure is 8mTorr;
(4) over etching:
The flow of hydrogen bromide is 300sccm in the reactant gases, and the flow of octafluoroization four carbon is 10sccm, and the flow of helium+oxygen is 50sccm, and upper/lower electrode power is respectively 600w, 0w, and pressure is 20mTorr.
Embodiment 2
Polysilicon silicon chip erosion pre-structure is as follows:
(1) bottom is a silicon chip;
(2) growth layer of silicon dioxide 50 dusts on the silicon chip;
(3) growth one deck polysilicon 3000 dusts on the silicon-dioxide;
(4) growth one deck silicon oxynitride hard mask film 400 dusts on the polysilicon;
(5) silicon chip topmost is the optical cement figure after the photoetching.
A kind of polycrystalline silicon etching process, its step is as follows:
(1) the hard mask of etching: fluoro-gas C in the reactant gases XF YH ZFlow be 65sccm, the flow of oxygen is 0sccm, the flow of argon gas is 400sccm, upper/lower electrode power is respectively 400w, 30w, pressure is 2mTorr; C XF YH ZMiddle X is 4; Y is 8; Z is 0;
(2) remove photoresist: the employing independently chamber of removing photoresist is removed photoresist;
(3) etching polysilicon:
The flow of oxygen is 2sccm in the reactant gases, and the flow of chlorine is 150sccm, and the flow of hydrogen bromide is 50sccm, and upper/lower electrode power is respectively 800w, 80w, and pressure is 10mTorr;
(4) over etching:
The flow of hydrogen bromide is 300sccm in the reactant gases, and the flow of octafluoroization four carbon is 2sccm, and the flow of helium+nitrogen is 40sccm, and upper/lower electrode power is respectively 500w, 0w, and pressure is 45mTorr.
Embodiment 3
Polysilicon silicon chip erosion pre-structure is as follows:
(1) bottom is a silicon chip;
(2) growth layer of silicon dioxide 15 dusts on the silicon chip;
(3) growth one deck polysilicon 1500 dusts on the silicon-dioxide;
(4) growth one deck silicon nitride hard mask 400 dusts on the polysilicon;
(5) silicon chip topmost is the optical cement figure after the photoetching.
A kind of polycrystalline silicon etching process, its step is as follows:
(1) the hard mask of etching: fluoro-gas C in the reactant gases XF YH ZFlow be 80sccm, the flow of oxygen is 0sccm, the flow of argon gas is 200sccm, upper/lower electrode power is respectively 500w, 80w, pressure is 5mTorr; C XF YH ZMiddle X is 1; Y is 4; Z is 0;
(2) remove photoresist: the employing independently chamber of removing photoresist is removed photoresist;
(3) etching polysilicon:
The flow of oxygen is 3sccm in the reactant gases, and the flow of chlorine is 50sccm, and the flow of hydrogen bromide is 255sccm, and upper/lower electrode power is respectively 400w, 0w, and pressure is 10mTorr;
(4) over etching:
The flow of hydrogen bromide is 300sccm in the reactant gases, and the flow of octafluoroization four carbon is 5sccm, and the flow of helium+oxygen is 20sccm, and upper/lower electrode power is respectively 400w, 0w, and pressure is 60mTorr.
The structure of gained etch polysilicon does not have burr to generate at channel bottom as shown in Figure 2.

Claims (6)

1. polycrystalline silicon etching process, its step is as follows:
(1) the hard mask of etching: fluoro-gas C in the reactant gases XF YH ZWherein X is the integer among the 1-4; Y is the integer among the 4-8; Z is 0-1;
(2) remove photoresist;
(3) etching polysilicon;
(4) over etching;
Hydrogen bromide is 100-500sccm in the reactant gases in the described step (4), and octafluoroization four carbon are 2-50sccm, and the flow of helium+oxygen is 20-100sccm, and upper/lower electrode power is respectively 400-1500w, 0-200w, and pressure is 10-200mTorr.
2. polycrystalline silicon etching process according to claim 1 is characterized in that: fluoro-gas C in the reactant gases in the described step (1) XF YH ZFlow be 65-100sccm, the flow of oxygen is 0-12sccm, the flow of argon gas is 200-400sccm, upper/lower electrode power is respectively 400-1500w, 0-1000w, pressure is 2-20mTorr.
3. polycrystalline silicon etching process according to claim 2 is characterized in that: remove photoresist with the chamber of removing photoresist independently in the described step (2).
4. polycrystalline silicon etching process according to claim 3, it is characterized in that: the flow of oxygen is 1-10sccm in the reactant gases in the described step (3), the flow of chlorine is 0-150sccm, the flow of hydrogen bromide is 50-500sccm, upper/lower electrode power is respectively 400-1500w, 0-200w, and pressure is 2-100mTorr.
5. polycrystalline silicon etching process according to claim 4 is characterized in that: flow is helium+oxygen of 20-100sccm in the reactant gases in the described step (4), with flow be 2-50sccm nitrogen substitute.
6. according to claim 4 or 5 described polycrystalline silicon etching process, it is characterized in that: fluoro-gas C in the reactant gases in the described step (1) 3F 6H 1Flow be 80sccm, the flow of oxygen is 0sccm, the flow of argon gas is 200sccm, upper/lower electrode power is respectively 500w, 80w, pressure is 5mTorr; Oxygen is 3sccm in the reactant gases in the described step (3), and chlorine is 50sccm, and hydrogen bromide is 250sccm, and upper/lower electrode power is respectively 400w, 20w, and pressure is 10mTorr; Hydrogen bromide is 300sccm in the reactant gases in the described step (4), and octafluoroization four carbon are 5sccm, and helium+oxygen is 20sccm, and upper/lower electrode power is respectively 400w, 0w, and pressure is 60mTorr.
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CN100397590C (en) * 2005-12-02 2008-06-25 北京北方微电子基地设备工艺研究中心有限责任公司 Gate etching process
CN100377315C (en) * 2005-12-02 2008-03-26 北京北方微电子基地设备工艺研究中心有限责任公司 Silicon gate etching method
CN102270572A (en) * 2010-06-04 2011-12-07 中芯国际集成电路制造(上海)有限公司 Forming methods of side wall and MOS (metal oxide semiconductor) transistor
CN102420124B (en) * 2011-05-26 2014-04-02 上海华力微电子有限公司 Etching method of dielectric layer
CN103531459B (en) * 2012-07-03 2017-07-11 中国科学院微电子研究所 Method, semi-conductor device manufacturing method
CN104752158B (en) * 2013-12-30 2019-02-19 北京北方华创微电子装备有限公司 Silicon color sensor method
CN105759356B (en) * 2014-12-17 2019-10-08 北京北方华创微电子装备有限公司 A kind of lithographic method of silica

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Patent Citations (1)

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Publication number Priority date Publication date Assignee Title
US4818334A (en) * 1988-03-15 1989-04-04 General Electric Company Method of etching a layer including polysilicon

Non-Patent Citations (3)

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Address after: 100176 8 Wenchang Avenue, Beijing economic and Technological Development Zone

Patentee after: Beijing North China microelectronics equipment Co Ltd

Address before: 100016 floor 2, block M5, 1 Jiuxianqiao East Road, Chaoyang District, Beijing.

Patentee before: Beifang Microelectronic Base Equipment Proces Research Center Co., Ltd., Beijing