CH494475A - Verfahren zur Herstellung eines Schaltungsmoduls mit einer integrierten Halbleiterschaltanordnung - Google Patents
Verfahren zur Herstellung eines Schaltungsmoduls mit einer integrierten HalbleiterschaltanordnungInfo
- Publication number
- CH494475A CH494475A CH116865A CH116865A CH494475A CH 494475 A CH494475 A CH 494475A CH 116865 A CH116865 A CH 116865A CH 116865 A CH116865 A CH 116865A CH 494475 A CH494475 A CH 494475A
- Authority
- CH
- Switzerland
- Prior art keywords
- soldered
- insulating plate
- plate
- head piece
- contact
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12036—PN diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Die Bonding (AREA)
- Wire Bonding (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Manufacturing Of Printed Wiring (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB4215/64A GB1048214A (en) | 1964-01-31 | 1964-01-31 | Improvements in or relating to semiconductor devices |
Publications (1)
Publication Number | Publication Date |
---|---|
CH494475A true CH494475A (de) | 1970-07-31 |
Family
ID=9772919
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH116865A CH494475A (de) | 1964-01-31 | 1965-01-26 | Verfahren zur Herstellung eines Schaltungsmoduls mit einer integrierten Halbleiterschaltanordnung |
Country Status (5)
Country | Link |
---|---|
BE (1) | BE659092A (xx) |
CH (1) | CH494475A (xx) |
DE (1) | DE1244889B (xx) |
GB (1) | GB1048214A (xx) |
NL (1) | NL6501144A (xx) |
-
1964
- 1964-01-31 GB GB4215/64A patent/GB1048214A/en not_active Expired
-
1965
- 1965-01-26 CH CH116865A patent/CH494475A/de not_active IP Right Cessation
- 1965-01-29 NL NL6501144A patent/NL6501144A/xx unknown
- 1965-01-30 DE DEST23285A patent/DE1244889B/de active Pending
- 1965-02-01 BE BE659092D patent/BE659092A/xx unknown
Also Published As
Publication number | Publication date |
---|---|
NL6501144A (xx) | 1965-08-02 |
BE659092A (xx) | 1965-08-02 |
GB1048214A (en) | 1966-11-16 |
DE1244889B (de) | 1967-07-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PL | Patent ceased |