CH409471A - Anordnung zur Subtraktion zweier als Soll- und Istwerte vorliegender natürlicher Binärzahlen, die durch Gleichspannungssignale realisiert sind - Google Patents
Anordnung zur Subtraktion zweier als Soll- und Istwerte vorliegender natürlicher Binärzahlen, die durch Gleichspannungssignale realisiert sindInfo
- Publication number
- CH409471A CH409471A CH159563A CH159563A CH409471A CH 409471 A CH409471 A CH 409471A CH 159563 A CH159563 A CH 159563A CH 159563 A CH159563 A CH 159563A CH 409471 A CH409471 A CH 409471A
- Authority
- CH
- Switzerland
- Prior art keywords
- setpoints
- subtracting
- implemented
- arrangement
- voltage signals
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/3808—Details concerning the type of numbers or the way they are handled
- G06F2207/3832—Less usual number representations
- G06F2207/3836—One's complement
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Feedback Control In General (AREA)
- Picture Signal Circuits (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DEL41215A DE1292889B (de) | 1962-02-12 | 1962-02-12 | Mehrstellige Anordnung zur Subtraktion zweier Binaerzahlen |
Publications (1)
Publication Number | Publication Date |
---|---|
CH409471A true CH409471A (de) | 1966-03-15 |
Family
ID=7269352
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH159563A CH409471A (de) | 1962-02-12 | 1963-02-09 | Anordnung zur Subtraktion zweier als Soll- und Istwerte vorliegender natürlicher Binärzahlen, die durch Gleichspannungssignale realisiert sind |
Country Status (5)
Country | Link |
---|---|
US (1) | US3257550A (de) |
CH (1) | CH409471A (de) |
DE (1) | DE1292889B (de) |
GB (1) | GB1036921A (de) |
NL (1) | NL288834A (de) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3422255A (en) * | 1965-09-29 | 1969-01-14 | Ibm | Maximum occurring event determining apparatus |
-
0
- NL NL288834D patent/NL288834A/xx unknown
-
1962
- 1962-02-12 DE DEL41215A patent/DE1292889B/de active Pending
-
1963
- 1963-02-08 US US257186A patent/US3257550A/en not_active Expired - Lifetime
- 1963-02-09 CH CH159563A patent/CH409471A/de unknown
- 1963-02-12 GB GB5758/63A patent/GB1036921A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
NL288834A (de) | |
US3257550A (en) | 1966-06-21 |
GB1036921A (en) | 1966-07-20 |
DE1292889B (de) | 1969-04-17 |
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