CA951433A - Threshold logic circuits - Google Patents

Threshold logic circuits

Info

Publication number
CA951433A
CA951433A CA123,221,A CA123221A CA951433A CA 951433 A CA951433 A CA 951433A CA 123221 A CA123221 A CA 123221A CA 951433 A CA951433 A CA 951433A
Authority
CA
Canada
Prior art keywords
logic circuits
threshold logic
threshold
circuits
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA123,221,A
Other languages
English (en)
Other versions
CA123221S (en
Inventor
John D. Heightley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Priority to CA173,961A priority Critical patent/CA957774A/en
Application granted granted Critical
Publication of CA951433A publication Critical patent/CA951433A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/501Half or full adders, i.e. basic adder cells for one denomination
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/0813Threshold logic
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/288Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
    • H03K3/2885Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit the input circuit having a differential configuration
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/48Indexing scheme relating to groups G06F7/48 - G06F7/575
    • G06F2207/4802Special implementations
    • G06F2207/4818Threshold devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Power Engineering (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
CA123,221,A 1971-03-04 1971-09-20 Threshold logic circuits Expired CA951433A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA173,961A CA957774A (en) 1971-03-04 1973-06-13 Storage-processor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12083471A 1971-03-04 1971-03-04

Publications (1)

Publication Number Publication Date
CA951433A true CA951433A (en) 1974-07-16

Family

ID=22392816

Family Applications (1)

Application Number Title Priority Date Filing Date
CA123,221,A Expired CA951433A (en) 1971-03-04 1971-09-20 Threshold logic circuits

Country Status (9)

Country Link
US (1) US3720821A (de)
JP (1) JPS5650291B1 (de)
BE (1) BE780199A (de)
CA (1) CA951433A (de)
DE (1) DE2210037C3 (de)
FR (1) FR2128630B1 (de)
GB (1) GB1380317A (de)
NL (1) NL167064C (de)
SE (1) SE374987B (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3950636A (en) * 1974-01-16 1976-04-13 Signetics Corporation High speed multiplier logic circuit
US3903405A (en) * 1974-03-11 1975-09-02 Hughes Aircraft Co Variable threshold digital correlator
EP0086851A1 (de) * 1982-02-18 1983-08-31 Deutsche ITT Industries GmbH Überlaufdetektor für algebraische Addierwerke
US9473139B2 (en) * 2014-07-03 2016-10-18 Arizona Board Of Regents On Behalf Of Arizona State University Threshold logic element with stabilizing feedback

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2888579A (en) * 1955-03-07 1959-05-26 North American Aviation Inc Transistor multivibrator
US3421026A (en) * 1964-06-29 1969-01-07 Gen Electric Memory flip-flop
US3445684A (en) * 1965-12-15 1969-05-20 Corning Glass Works High speed trailing edge bistable multivibrator
US3524977A (en) * 1967-01-17 1970-08-18 Rca Corp Binary multiplier employing multiple input threshold gate adders
US3506817A (en) * 1967-02-24 1970-04-14 Rca Corp Binary arithmetic circuits employing threshold gates in which both the sum and carry are obtained in one gate delay interval
US3609329A (en) * 1969-05-05 1971-09-28 Shell Oil Co Threshold logic for integrated full adder and the like

Also Published As

Publication number Publication date
GB1380317A (en) 1975-01-15
BE780199A (fr) 1972-07-03
NL167064B (nl) 1981-05-15
FR2128630A1 (de) 1972-10-20
FR2128630B1 (de) 1977-12-09
NL7202853A (de) 1972-09-06
DE2210037A1 (de) 1972-09-14
US3720821A (en) 1973-03-13
DE2210037C3 (de) 1974-09-19
NL167064C (nl) 1981-10-15
SE374987B (de) 1975-03-24
DE2210037B2 (de) 1974-02-14
JPS5650291B1 (de) 1981-11-27

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