CA918805A - Error checking arrangement in electronic data processing systems - Google Patents
Error checking arrangement in electronic data processing systemsInfo
- Publication number
- CA918805A CA918805A CA084048A CA84048A CA918805A CA 918805 A CA918805 A CA 918805A CA 084048 A CA084048 A CA 084048A CA 84048 A CA84048 A CA 84048A CA 918805 A CA918805 A CA 918805A
- Authority
- CA
- Canada
- Prior art keywords
- data processing
- electronic data
- processing systems
- error checking
- checking arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2268—Logging of test results
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2294—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by remote test
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Small-Scale Networks (AREA)
- Debugging And Monitoring (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19691927549 DE1927549A1 (de) | 1969-05-30 | 1969-05-30 | Fehlerpruefeinrichtung in elektronischen Datenverarbeitungsanlagen |
Publications (1)
Publication Number | Publication Date |
---|---|
CA918805A true CA918805A (en) | 1973-01-09 |
Family
ID=5735616
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA084048A Expired CA918805A (en) | 1969-05-30 | 1970-05-28 | Error checking arrangement in electronic data processing systems |
Country Status (6)
Country | Link |
---|---|
US (1) | US3659273A (de) |
JP (1) | JPS5040625B1 (de) |
CA (1) | CA918805A (de) |
DE (1) | DE1927549A1 (de) |
FR (1) | FR2046564A5 (de) |
GB (1) | GB1243160A (de) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3806878A (en) * | 1971-08-05 | 1974-04-23 | Ibm | Concurrent subsystem diagnostics and i/o controller |
US3798613A (en) * | 1971-10-27 | 1974-03-19 | Ibm | Controlling peripheral subsystems |
DE2158433C3 (de) * | 1971-11-25 | 1975-07-31 | Ibm Deutschland Gmbh, 7000 Stuttgart | Verfahren und Einrichtung zur Fehlerprüfung und Fehlerlokalisierung in einer moduleren Datenverarbeitungsanlage |
FR2178762B1 (de) * | 1972-04-05 | 1974-08-02 | Alsthom Cgee | |
US3798614A (en) * | 1972-05-26 | 1974-03-19 | Storage Technology Corp | Maintenance facility for a magnetic tape subsystem |
US3838400A (en) * | 1972-05-26 | 1974-09-24 | Storage Technology Corp | Maintenance facility for a magnetic tape subsystem |
US3778767A (en) * | 1972-05-30 | 1973-12-11 | Burroughs Corp | Dynamic debug aid for computer data communication networks |
US3806887A (en) * | 1973-01-02 | 1974-04-23 | Fte Automatic Electric Labor I | Access circuit for central processors of digital communication system |
US4381540A (en) * | 1978-10-23 | 1983-04-26 | International Business Machines Corporation | Asynchronous channel error mechanism |
JPS55119720A (en) * | 1979-03-09 | 1980-09-13 | Tokyo Electric Power Co Inc:The | Operation processing unit |
DE2932749A1 (de) * | 1979-08-13 | 1981-03-26 | Siemens AG, 1000 Berlin und 8000 München | Pruefeinrichtung zur fehlerdiagnose in mehrrechner-systemen, insbesondere in multimikrocomputer-systemen |
JPS5811959A (ja) * | 1981-07-15 | 1983-01-22 | Fuji Xerox Co Ltd | 電子複写機の出力チエツク装置 |
JPS5886648A (ja) * | 1981-11-18 | 1983-05-24 | Mitsubishi Electric Corp | トレ−ス装置 |
US4525802A (en) * | 1982-05-14 | 1985-06-25 | Cache Technology Corporation | Portable electronic testing apparatus |
EP0104293B1 (de) * | 1982-09-28 | 1986-12-30 | International Business Machines Corporation | Anordnung zum Laden und Lesen verschiedener Kippschaltungsketten in einem Datenverarbeitungssystem |
US5119489A (en) * | 1985-10-02 | 1992-06-02 | International Business Machines Corporation | Method of monitoring the bring up of all units in a multiple system from a remote unit including diagnostic testing with visual indicator illumination indicating operability |
US5184312A (en) * | 1985-10-13 | 1993-02-02 | The Boeing Company | Distributed built-in test equipment system for digital avionics |
US4831511A (en) * | 1986-09-03 | 1989-05-16 | Northern Telecom Limited | Microcomputer implemented control device with maintenance provisions |
US4845475A (en) * | 1987-11-17 | 1989-07-04 | The Boeing Company | Automatic testing of position sensing devices employing stored sensed position |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3343141A (en) * | 1964-12-23 | 1967-09-19 | Ibm | Bypassing of processor sequence controls for diagnostic tests |
US3387262A (en) * | 1965-01-12 | 1968-06-04 | Ibm | Diagnostic system |
US3405395A (en) * | 1965-04-27 | 1968-10-08 | Ericsson Telefon Ab L M | Circuit arrangement for activating an electric circuit by means of an instruction word |
US3387276A (en) * | 1965-08-13 | 1968-06-04 | Sperry Rand Corp | Off-line memory test |
US3488634A (en) * | 1967-03-02 | 1970-01-06 | Sperry Rand Corp | Bidirectional distribution system |
US3510843A (en) * | 1967-03-27 | 1970-05-05 | Burroughs Corp | Digital data transmission system having means for automatically determining the types of peripheral units communicating with the system |
US3518413A (en) * | 1968-03-21 | 1970-06-30 | Honeywell Inc | Apparatus for checking the sequencing of a data processing system |
-
1969
- 1969-05-30 DE DE19691927549 patent/DE1927549A1/de active Pending
-
1970
- 1970-04-28 FR FR7015368A patent/FR2046564A5/fr not_active Expired
- 1970-05-08 GB GB22256/70A patent/GB1243160A/en not_active Expired
- 1970-05-08 JP JP45038771A patent/JPS5040625B1/ja active Pending
- 1970-05-26 US US40643A patent/US3659273A/en not_active Expired - Lifetime
- 1970-05-28 CA CA084048A patent/CA918805A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
FR2046564A5 (de) | 1971-03-05 |
JPS5040625B1 (de) | 1975-12-25 |
US3659273A (en) | 1972-04-25 |
GB1243160A (en) | 1971-08-18 |
DE1927549A1 (de) | 1970-12-03 |
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