CA2890398A1 - Selective and non-selective micro-device transferring - Google Patents

Selective and non-selective micro-device transferring Download PDF

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Publication number
CA2890398A1
CA2890398A1 CA2890398A CA2890398A CA2890398A1 CA 2890398 A1 CA2890398 A1 CA 2890398A1 CA 2890398 A CA2890398 A CA 2890398A CA 2890398 A CA2890398 A CA 2890398A CA 2890398 A1 CA2890398 A1 CA 2890398A1
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CA
Canada
Prior art keywords
micro
substrate
pixel
sub
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA2890398A
Other languages
French (fr)
Inventor
Gholamreza Chaji
Ehsanallah Fathi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ignis Innovation Inc
Original Assignee
Ignis Innovation Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ignis Innovation Inc filed Critical Ignis Innovation Inc
Priority to CA2890398A priority Critical patent/CA2890398A1/en
Priority to PCT/IB2016/050307 priority patent/WO2016116889A1/en
Priority to CN201680006964.4A priority patent/CN107851586B/en
Priority to US15/002,662 priority patent/US20160219702A1/en
Priority to CN202110684431.4A priority patent/CN113410146A/en
Priority to DE112016000447.8T priority patent/DE112016000447T5/en
Priority to US15/060,942 priority patent/US10134803B2/en
Publication of CA2890398A1 publication Critical patent/CA2890398A1/en
Priority to CN201780013977.9A priority patent/CN109075119B/en
Priority to CN202310495809.5A priority patent/CN116525532A/en
Priority to US15/653,120 priority patent/US10700120B2/en
Priority to TW112137111A priority patent/TW202406172A/en
Priority to KR1020237044348A priority patent/KR20240001289A/en
Priority to CN202311598175.2A priority patent/CN117613166A/en
Priority to CN201880047604.8A priority patent/CN110892530B/en
Priority to PCT/IB2018/055347 priority patent/WO2019016730A1/en
Priority to DE112018003713.4T priority patent/DE112018003713T5/en
Priority to KR1020207004053A priority patent/KR102618938B1/en
Priority to TW107124809A priority patent/TWI820033B/en
Priority to US16/107,680 priority patent/US20180358404A1/en
Priority to US16/107,692 priority patent/US10847571B2/en
Priority to US16/912,049 priority patent/US11735623B2/en
Priority to US16/931,132 priority patent/US11728302B2/en
Priority to US17/200,467 priority patent/US20210202572A1/en
Priority to US17/365,708 priority patent/US11476216B2/en
Priority to US17/365,634 priority patent/US11735545B2/en
Priority to US17/569,918 priority patent/US11735547B2/en
Priority to US17/569,900 priority patent/US11735546B2/en
Priority to US17/569,893 priority patent/US11728306B2/en
Priority to US17/730,719 priority patent/US20220254745A1/en
Priority to US18/177,613 priority patent/US20230207611A1/en
Abandoned legal-status Critical Current

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Abstract

Post-processing steps for integrating of micro devices into system (receiver) substrate or improving the performance of the micro devices after transfer. Post processing steps for additional structures such as reflective layers, fillers, black matrix or other layers may be used to improve the out coupling or confining of the generated LED light. Dielectric and metallic layers may be used to integrate an electro-optical thin film device into the system substrate with transferred micro devices. Color conversion layers may be integrated into the system substrate to create different outputs from the micro devices.

Description

Selective and non-Selective Micro-Device transferring Introduction This document discloses various methods for the integration of monolithic array of micro-devices into a system substrate or selective transferring of an array of micro devices to a system substrate. Here, the proposed processes are divided into two categories. In the first category, the pitch of the bonding pads on the system substrate is the same the pitch of the bonding pads of the micro-devices. In the second category, bonding pads on the system substrate have a larger pitch compared to that of the micro-devices. For the first category, three different schemes are offered; 1- Front-side Bonding, 2- Back-side bonding and 3-Substrate Through-via Bonding.
Front-side Bonding In this invention micro-devices may be of the same type or different types in terms of functionality. In one embodiment, micro-devices are micro-LEDs of the same color or multi-colors (Red, Green and Blue), and the system substrate is the backplane, controlling individual micro-LEDs. Such multi-color LED arrays are fabricated directly on a substrate or transferred to a temporary substrate from the growth substrate. In one example, RGB micro-LED
arrays were grown on a sacrificial/buffer layer. In one case, the system substrate can be aligned and bonded to the micro-device substrate as it is shown in Figure 1. After removing the micro-device substrate and sacrificial/buffer layer, a filler dielectric coating (e.g.
Polyimide resist) is spin-coated/deposited on the integrated sample. This step is followed by an etching process to reveal the tops of the micro-LED devices. In the case of micro-LED devices a common transparent electrode (such as ITO) is deposited on the sample. In other cases, one can deposit the top electrode can pattern it to isolate micro-devices for subsequent processes.

LEDs =
IN
talaMangftWaitM

mim,111 System Substrate 6 ',xi = d=1,. =

7 A ill III 11111 Ilona vtoiessialiamessoriesiose =

ra MI6 011 III/ ap 711 MI a Figure 1: Process steps for the Front-side bonding.
Back-side Bonding In another embodiment, as shown in Figure 2 the micro-device structures (here for example RGB micro-LEDs) are grown on a buffer/sacrificial layer. A dielectric layer is deposited/spin-coated on the substrate to fully cover the micro-devices. In one example this step is followed by an etching process (e.g. RIE) to reveal the tops of the micro-devices to form the top common contact and seeding layer for subsequent process (e.g. electroplating). A
thick mechanical supporting layer was then deposited, grown or bonded on the tops of the samples. Here, the filer layer can be black matrix (or reflective materials). Also, before depositing the mechanical support, one can deposit an electrode (either as patterned or common layer).
Then the mechanical support layer is deposited which in case of optoelectronic devices such as LEDs, it needs to be transparent. As shown in Figure 2, the micro-device substrate is then removed using various processes such as laser lift-off or etching. In one case, the thickness of the substrate is initially reduced to a few micrometers by deep reactive-ion etching (DRIE). The remaining substrate then is removed by use of a wet chemical etching process.
In this case, the buffer/sacrificial layer may act as an etch-stop layer to ensure a uniform etched sub-surface and to avoid any damage to the micro-devices. After removing the buffer layer, another etching (e.g. RIE) is performed to expose the micro-devices. One may deposit and pattern a metallic layer to serve as the upper contacts and bond pads for the micro-devices if they haven't been formed during the micro-device fabrication. The system substrate can be then aligned and bonded to the micro-device substrate. Depending on the type and functionality of the micro-devices the mechanical supporting layer may be removed. One can remove the supporting layer or the filler layer.

Through Substrate Via bonding In this scheme, through substrate vias are being implemented to make contacts to the back of the micro-devices. In one embodiment, the micro-devices may be multicolor micro- LEDs grown on an insulating buffer layer. This buffer layer may function as an etch-stop layer as well. As the first step a dielectric layer is deposited as a filler layer. Using processes like photolithography, patterns are formed on the backside of the substrate. In one embodiment, a method such as DRIE is used to make through substrate holes in the micro-devices substrate.
Buffer layer which may act as an etch-stop layer may be removed using a wet-etch process. In the next step an insulating film is deposited on the back of the substrate. This film is removed from back side of the micro-LEDs. The through holes are filled with a conductive material using processes such as cupper electroplating. Here, the vias act as the micro-LED contact and bonding pads. The micro-LED substrate is then aligned and bonded to the system substrate which may be a backplane controlling individual devices in this example. The common front contact of micro-LEDs is made by an etching process (e.g. using RIE) to reveal the tops of the micro-devices and depositing transparent conductive layers to from the front contact.
Buffer Layer LEDs 1. F1 1111 1111 IA ,5 No ,14 Su 1-)tr,tt., Protective Layer Coating " "War III 105111 DI = up 44 = =,
2 Substrate 6 -1g6 Conan Common EIOCI7ne -7; IMP r^i
3 7 ON
st 311 IN '
4 - 113, -Onloctrk Wye, NIA
Figure 3: Process steps for the Through Substrate Via Bonding.

Selective Bonding-Same Pitch In this case, micro-devices have been fabricated on substrate with arbitrary pitch length to maximize the production yield. In one example the micro-devices are multi-color micro-LEDs (e.g. RGB). The system substrate in this example may be a display backplane with contacts pads pitch length different than those of the micro-LEDs. One can design the pitch of these contact pads proportional to those of the micro-LEDs as it is shown in Figure 4. In this example, the system substrate and micro-devices are brought together, aligned and put in contact. Using some methods such as laser lift-off (LLO) one can selectively transfer RGB pixels to the system substrate. Display fabrication is completed by depositing a filler layer and a conformal transparent conductive layer on top of the system substrate as the common electrode for micro-LEDs.
System Substrate Substarte System Substrate Substarte System Substrate System substrate . MI
System Substrate Figure 4: Process steps for Selective bonding of the micro-LEDs to the backplane with the same contact pitch.

Isolation LEDs Buffer Layer =.... - so rg =
micro-LEDs with different height Filling Material im 71 NI
Wel Ell LI
Electrostatic Grip--Figure 5: Micro-LED substrate with isolated buffer layer In another embodiment (shown in Figure 5) where a buffer layer is necessary for the fabrication of micro-LEDs, this layer is deposited on the sacrificial layer and patterned to isolate multicolor LEDs. Also, one can isolate the sacrificial layer as well. One, instead of isolating individual pixels, may isolate an arbitrary group of pixels to facilitate the transfer process. A filling material such as polyimide may be spin coated n the substrate to fill the gap between the individual micro-LEDs. This filling step insures the mechanical strength during the transfer. This is particularly important when a process like laser lift-off is used to detach micro-LEDs from the carrier. In addition, micro-LEDs may not have the same height which make it difficult to bond them to the system substrate (see Figure 5). In these cases, one can implement an electrostatic grip mechanism in the system substrate to temporary keep the micro-LED and the system substrate bonding pads in-contact for the final bonding steps. The grip mechanism may be local for pixels/sub-pixels or a global grip for the group of pixels or in the case of same-pitch transfer for the whole wafer.
The elector static electrode (grip) can be on a layer above the contact electrode. In this case, a planarization layer may be used.
Selective bonding-Different Pitch In another embodiment the pitch of the bonding pads of the pixel and sub-pixel on the system substrate may be different than those of the multi-color micro-LEDs on the device substrate (donor substrate). In general, one may fabricate micro-LEDs with smallest possible pitch to increase the production yield. On the other hand, the pitch of the pixel and sub-pixel bonding pads on the system substrate is designed based on the final product specification (in the case of micro-LED displays, resolution and the display size dictate this specification). In order to transfer micro-LEDs to the system substrate one may design the micro-LED and system substrate layout so that in the first transfer step, at least one of the sub-pixel pads are being aligned with their respective micro-LEDs on the donor substrate. As figure 6 shows, all the Red sub pixels on the system substrate are aligned with the Red micro-LEDs on the donor substrate.
After the first transfer step, one will populate the system substrate with all Red micro-LEDs. The above mentioned requirement for the Red LEDs enables subsequent self-alignment for the Green and Blue micro-LEDs. One only needs to shift the donor substrate to align all the Green and then Blue micro-LEDs with the respective bonding pads.
In another embodiment shown in Figure 7, when sub-pixel pitch is larger than the individual micro-LEDs (e.g. in large displays), LED substrate is laid out in the form of 2-dimensional single color arrays. Using this technique, one may relax the micro-LED fabrication requirements and reduce the selective transferring process compared to that explained in Figure 6. In one case, when using shadow mask to fabricate multi-color LEDs, mask patterns are scaled up which facilitate the mask production and the deposition process. Figure 8 shows an alternative pattern where RGB LEDs are not formed in 2-dinnentional groups. One may use different LED
array patterns for different levels of alignment pitch depending to the display size.
In another case, one may first transfer micro-LEDs to a conductive semi-transparent common substrate, then integrate this substrate to a system substrate as shown in Figure 9. In this case, common bonding pads (transparent and conductive) formed on the semi-transparent substrate, define the resolution of the display.

LEDs Brrrhr Leryr r 1 Substarte 7 Filler Coating System Substrate POW Layer 2 Substarte 8 System Substrate Support Coating.
r - e-3 9 - - ¨
System Substrate =
System Substrate = 7 743:,, 11 1 in I. pl III IN
111 IN IN 111-11' System Substrate mu mu um = III mu Im IN MI IN IN NI
Figure 2: Process steps for the back-side bonding.

.'ifivrv,..,,...õ't,i1 0,Altriailols 'cfeikeu.'1-6' , , . ,, . . ' ' ' =::
.:.
' -v'm'Sliallinijilialafflia4c¨ --7.-,-- 4 . ?.:f==,, ,,f,õ, ' - ,*.:;', ;_1,,:=1>=:,i'''' , -'.. 'ZkS, ` ' . ,..641-:- '4.',.';''z'' , ; ';';',_':::`,' .,..v= ''''.=====:',7,. ' . õ",.õ..;
i7JAS';44:11L,Ali,;',:illif!' ,'Iiiii:t11:lit'aie . ' = .
kimmormisin_gmaipiipou ="::..4.z.: ',Ht,-:,-,-2-,,F4,,,, System -Substrate 1111113110 IIIIIIIM IIIIIIIIp Ellin III WU = G M MI 1111 ,õ,:l , ', , õ ,,,:,,,i , ' ', , ,,,, _ , " t; '7, l, '....,,,,õ =,,, ..7,,, ::': '.-õ:',",. ','-'-'"
:7171k.4.4..-S,::01,Pat'-'' 4'. = ',7-'7,-: igetti:dribstiate ' - . , 4:',,t.,-;ei=fill'AtIt,t,e,..- = s: ,:47.;.4.,.%,?=.:'',,-.,,l; . ' =
. =.' .
.. ,, .7- -,:v....;.y,-.- : - - = - u .., , ill!klisubstarte Figure 6: Process steps for the selective bonding of micro-LEDs to the back-plane with arbitrary contact pitch.

B
G
R
..
, System Substrate , ---r_lr ___ =IlldP, õ:- --- -, = .---- *-=,- ,õõ, 1&16.õ.õLite .,U, *F1m4At r''' --__ ''= = , - -- _ =------ 1 , System Substrate ,4,1 , z= = I 1 , ,,,.: - __ + ,7 .4,,,, .
Sta Lte ___________________ ,' A 1 11 oil Full II lirilyll '4.11.,=,'-.--- --4,11e -- - -1-11 'ye bonding of m Ii itliji for the select' s steps Process Figure 7: P i o - L-E-D s to the back-plane with arbitrary contact Pitch.
B
G
R
, system substrate = = -'- . . "a 2 - "4",-I. r . * ...i ' ket"A rte õ - ',11,441.4,4 ,,,,õ, = , ,,,,,, wo, =,õ-'õ -ii' ii.õ,õ,, ....
lir-11, 1 , , , II., 1 1 L õ _ .__ _ ,.
',.,,..
System Substrate , ..
,1 = .7n11111 ,Z; " - - - , . - ' . --i=-=,-,-..,---,,-------- -- ----- 1 ,a¨ o --k ,,..
'-:, = *=,..-"H,:; õsp. -' -=-'::', '1.13. 1 1 ,11 ,L
g..,...1.4.c.actommoi , .
with arbitrary for the selective ' e 8: ProcessFigur steps .= bonding of micro-LEDs to the back-plane=
contact pitch.

Semi-transparent Substrate tr:7 Semi-transparent Substrate IN NI
semi-transparent substrate = =
System Substrate Semi-transparent Substrate System Substrate Figure 9: Process steps for the selective bonding of micro-LEDs to the semi-transparent common substrate.
Pad structures with electrostatic or electromagnetic force Micro Device Dielectric , Conductive / a ¨ ' reflective layer Support Strucutre Substrate (a) Micro Device 'e Dielectric 2 ,_/-----//:===1>://21, Layer 2 Dielectric 1 Structure Layer /./
Substrate Layer 1 (b) Figure 10: (a) concave pad structure for more reflective effect and (b) concave pad with electro static grip In case of using concave pads on system substrate, the conductive layer is used also as reflective layer.
In another case, one can pattern the conductive layer into two sections: a core for conductive pad and a ring for electro static pad. Here the electro static pad (Grip) is covered by the dielectric. Also, one can deposit a dielectric layer before depositing the conductive layer for electro static grip. In this case, the electrostatic grip can have overlap with the conductive layer (layer 1). Here the elector static grip and/or conductive pad can be also reflective layer as well.

Micro Device =
Pad St-ructu:
Dielectric _ Contact Electro Static ' electrode ;=7 _ Substrate (a) Micro Device r Pad rSViict[it'e Dielectric =,4,-,:!1 5 , Conductive Layer /
Planarization Contact Pads Substrate (b) Figure 11: flat pad structure: (a) with electrostatic electrode in the same plain as the contact electrode and (b) electrostatic pads in a different plain that contact electrode.
Figure 11 shows another embodiment of the pad structure where the pad is flat.
Here the different function pads can be either in the same plain or different plain.
Similar pad structure (or negative structure) can be also applied to the micro devices.
Post processing the integrated system substrate After the integration of the devices into the system substrate, one can do some extra steps to improve the performance of the device or finish the functional connection required. In case of optoelectronic devices, using reflective layers can improve the out-coupling of the generated light. The post-processing of the micro devices can offer more device extraction from the donor substrate. In case of processing the devices on the substrate, more area will be wasted by creating the structures for the micro devices.

Figure 12 shows one embodiment of post processing the optoelectronic devices integrated into the system substrate. After the integration with one of the aforementioned pad structure (or different structure), a dielectric and reflective layers are deposited on the integrated devices. After that the two layers are patterned so that opens a window for the output light. Here, a black matrix can be deposited on the reflective layer to reduce the reflection of ambient light.
Reflective Layer - \\µµ=\._ "\I
Micro Device Micro Device -= N.
Dielectric ¨ = = ¨ = ¨ = = = = =
- =
Substrate Base developed during previous steps (that can include refelector) (a) Reflective Layer =
Micro Device \ = = Micro Device Dielectri c 111111,11,1111111111111111-:
11101101001111111=1111110111111.1 ...-.:11=011111111111111H1111111111111111111 - ' =
Substrate Base developed during previous steps (that can include refelector) (b) Planarizer or "
black matrix' ¨ \ =
Reflective Layer Micro Device Micro Device =
= , .
= . = = .= =-="=
Substrate Base developed during previous steps (that can include refelector) (C) electrode , = ¨ /
NZ
Planarizer =
Reflective Layer Micro Device Micro Device ---, .
:.,............i....i.iiiiii.iiii .===,\,, , .. . , N , , , Dielectric '---- N '717---,=7,17J,,,iii'i::
"::Y;Iri.).i7iJ);iiii.';=M
, i ..,..=.= =.-...=.........=...=.....,.¨.-.=.=,.,..,.,.,...,...õ..,... .
d' 11,51:.!.:l.i.Ii..i,!":::::!!!:!::!:2:::::!:2:i!ilii,i!i!ii!i)i):ii!:
i'.:='::-' " = : =
:".:.:=""Mi!iiggnO*1 Substrate Base developed during previous steps (that can include refelector) (d) Figure 12: Post processing of optoelectronic devices deposited into the system substrate.
Also it can act as planarization layer (one can use a separate planarization layer as well). After that, an electrode is deposited. Here, one can use the reflective layer as a booster in conductivity of transparent electrode. In this case, part of reflective layer leaves exposed so that the electrode layer can connect to it (depending on the structure, one can cover the entire reflective layer to avoid connecting electrode layer and reflective layer).
Reflective Layer ,----\ .. .
Micro Device \:', ii = " Micro Device Dielectric '----- \
= = ''= .:
iiiii;iiiiri'ii.q]nigiiPiNiNiiiiiiii;iit i. -.= H. ' "iiiii'ii]iiiii iMPil -.
N-,4,i4 -:iii:iiiiiiiiiiiiiiiiiii:iiiiiii)iiiiiii)iiiiiiiiiii,iiiiiii:(1 j4ii)iiiii)i)i)ii)i)!iii)i:iiiii:iffiejk,-h,,)' Substrate Base developed during previous steps (that can include refelector) (a) Reflective Layer ,---- ,..;µ, .N '4.. .
t!..:kil..,": =
Micro Device Micro Device Dielectric 4,..Ø,4.,,i,,l_ , , .õii,..,iiii:ii;iii.i:i*iii;i,i:ifiiii,.-1-,"'' ,-,-ii'zi.4,',.,' ' 4 ,-'=ii,'iiiiiiiiii _ Substrate i i Base developed during previous steps (that can include refelector) (b) ' Reflective Layer-, =
Black Matrix Micro Device Micro Device Dielectric\\\ N
1T-7- - Ei.-EYT" = = === = :'= = ' = = E
Substrate Base developed during previous steps (that can include refelector) (C) Figure 13: Post processing of optoelectronic devices deposited into the system substrate.
In another case, the dielectric layer is patterned before depositing the reflective layer. This will allow creating a direct contact between micro device and the reflective layer as conductive layer. After that the empty area is filed with black matrix (or planarization) layer. One can deposit an electrode although it may not be necessary. Also, one can integrate other optical layer on top of the micro device to enhance the out-coupling.
General terms To transfer a few devices that are adjacent, one can separate each individual device by removing the material in space between the devices or few devices by removing the material in space between groups. The etching can be stopped at the substrate or at the buffer later (or at sacrificial layer). Also, to improve the transfer, the space between the devices or the groups can be filled with some shock absorption material before transfer. The same separation process can be done for the shock absorption material as well.
If the resolution of the donor substrate is higher than the resolution of system substrate, one can use specific arrangement to make the fabrication easier. Here, the space between the different devices in donor substrate is field with the one of the devices. As a result, it make using shadow masking (or other sort of masking) much easier to making different devices in one substrate.
The scope of this invention is not limited to micro-LEDs. One can use these methods to transfer any micro-device array to any system substrate.
Different methods such as laser lift-off (LLO), lapping, wet/dry etching may be used to transfer micro-devices from one substrate to another.

Micro devices may be first transfer to another substrate (from growth substrate) and then transferred to the system substrate.
This invention is not limited to any particular substrate.

Claims (14)

WHAT IS CLAIMED IS:
1. A method of integrated device fabrication, the integrated device comprising a plurality pixels each comprising at least one sub-pixel comprising a micro device integrated on a substrate, the method comprising:
extending an active area of a first sub-pixel to an area larger than an area of a first micro device of the first sub-pixel by patterning of a filler layer about the first micro device and between the first micro device and at least one second micro device.
2. A method according to claim 1 further comprising:
fabricating at least one reflective layer covering at least a portion of one side of the patterned filler layer, the reflective layer for confining at least a portion of incoming or outgoing light within the active area of the sub-pixel.
3. A method according to claim 2 wherein the reflective layer is fabricated as an electrode of the micro device.
4. A method according to claim 1 wherein the patterning of the filler layer further patterns the filler layer about a further sub-pixel.
5. A method according to claim 1 wherein the patterning of the filler layer further is performed with a dielectric filler material.
6. An integrated device comprising:
a plurality pixels each comprising at least one sub-pixel comprising a micro device integrated on a substrate; and a patterned filler layer formed about a first micro device of a first sub-pixel and between the first micro device and at least one second micro device, the patterned filler layer extending an active area of the first sub-pixel to an area larger than an area of the first micro device.
7. An integrated device according to claim 6 further comprising:
at least one reflective layer covering at least a portion of one side of the patterned filler layer, the reflective layer for confining at least a portion of incoming or outgoing light to the active area of the first sub-pixel.
8. An integrated device according to claim 7 wherein the reflective layer is an electrode of the micro device.
9. An integrated device according to claim 7 wherein the patterned filler layer is formed about a further sub-pixel.
10. A method of integrated device fabrication, the device comprising a plurality pixels each comprising at least one sub-pixel comprising a micro device integrated on a substrate, the method comprising:
integrating at least one micro device into a receiver substrate; and subsequently to the integration of the at least one micro device, integrating at least one thin-film electro-optical device into the receiver substrate.
11. A method according to claim 10, wherein integrating the at least one thin-film electro-optical device comprises forming an optical path for the micro device through all or some layers of the at least one electro-optical device.
12. A method according to claim 10 wherein integrating the at least one thin-film electro-optical device is such that an optical path for the micro device is through a surface or area of the integrated device other than a surface or area of the electro-optical device.
13. A method according to claim 10, further comprising fabricating an electrode of the thin-film electro-optical device, the electrode of the thin-film electro-optical device defining an active area of at least one of a pixel and a sub-pixel.
14.
A method of according to claim 10, further comprising fabricating an electrode which serves as a shared electrode of both the thin-film electro-optical device and the light emitting micro device.
CA2890398A 2015-01-23 2015-05-04 Selective and non-selective micro-device transferring Abandoned CA2890398A1 (en)

Priority Applications (30)

Application Number Priority Date Filing Date Title
CA2890398A CA2890398A1 (en) 2015-05-04 2015-05-04 Selective and non-selective micro-device transferring
PCT/IB2016/050307 WO2016116889A1 (en) 2015-01-23 2016-01-21 Selective micro device transfer to receiver substrate
CN201680006964.4A CN107851586B (en) 2015-01-23 2016-01-21 Selective micro device transfer to a receptor substrate
US15/002,662 US20160219702A1 (en) 2015-01-23 2016-01-21 Selective micro device transfer to receiver substrate
CN202110684431.4A CN113410146A (en) 2015-01-23 2016-01-21 Selective micro device transfer to a receptor substrate
DE112016000447.8T DE112016000447T5 (en) 2015-01-23 2016-01-21 Selective micro-device transfer to a receptor substrate
US15/060,942 US10134803B2 (en) 2015-01-23 2016-03-04 Micro device integration into system substrate
CN201780013977.9A CN109075119B (en) 2015-01-23 2017-03-06 Integrated device manufacturing method
CN202310495809.5A CN116525532A (en) 2015-01-23 2017-03-06 Integrated device manufacturing method
US15/653,120 US10700120B2 (en) 2015-01-23 2017-07-18 Micro device integration into system substrate
KR1020237044348A KR20240001289A (en) 2015-01-23 2018-07-18 Micro device integration into system substrate
PCT/IB2018/055347 WO2019016730A1 (en) 2015-01-23 2018-07-18 Micro device integration into system substrate
TW107124809A TWI820033B (en) 2015-01-23 2018-07-18 Micro device integration into system substrate
CN202311598175.2A CN117613166A (en) 2015-01-23 2018-07-18 Integrated optical system
CN201880047604.8A CN110892530B (en) 2015-01-23 2018-07-18 Integrated optical system
TW112137111A TW202406172A (en) 2015-01-23 2018-07-18 Micro device integration into system substrate
DE112018003713.4T DE112018003713T5 (en) 2015-01-23 2018-07-18 MICRO DEVICE INTEGRATION IN SYSTEM SUBSTRATE
KR1020207004053A KR102618938B1 (en) 2015-01-23 2018-07-18 Microdevice integration into the system board
US16/107,680 US20180358404A1 (en) 2015-01-23 2018-08-21 Micro device integration into system substrate
US16/107,692 US10847571B2 (en) 2015-01-23 2018-08-21 Micro device integration into system substrate
US16/912,049 US11735623B2 (en) 2015-01-23 2020-06-25 Micro device integration into system substrate
US16/931,132 US11728302B2 (en) 2015-01-23 2020-07-16 Selective micro device transfer to receiver substrate
US17/200,467 US20210202572A1 (en) 2015-01-23 2021-03-12 Micro device integration into system substrate
US17/365,634 US11735545B2 (en) 2015-01-23 2021-07-01 Selective micro device transfer to receiver substrate
US17/365,708 US11476216B2 (en) 2015-01-23 2021-07-01 Selective micro device transfer to receiver substrate
US17/569,918 US11735547B2 (en) 2015-01-23 2022-01-06 Selective micro device transfer to receiver substrate
US17/569,900 US11735546B2 (en) 2015-01-23 2022-01-06 Selective micro device transfer to receiver substrate
US17/569,893 US11728306B2 (en) 2015-01-23 2022-01-06 Selective micro device transfer to receiver substrate
US17/730,719 US20220254745A1 (en) 2015-01-23 2022-04-27 Selective micro device transfer to receiver substrate
US18/177,613 US20230207611A1 (en) 2015-01-23 2023-03-02 Micro device integration into system substrate

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017149521A1 (en) * 2016-03-04 2017-09-08 Vuereal Inc. Micro device integration into system substrate
US10134803B2 (en) 2015-01-23 2018-11-20 Vuereal Inc. Micro device integration into system substrate
US10700120B2 (en) 2015-01-23 2020-06-30 Vuereal Inc. Micro device integration into system substrate
US10847571B2 (en) 2015-01-23 2020-11-24 Vuereal Inc. Micro device integration into system substrate
US11476216B2 (en) 2015-01-23 2022-10-18 Vuereal Inc. Selective micro device transfer to receiver substrate

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10134803B2 (en) 2015-01-23 2018-11-20 Vuereal Inc. Micro device integration into system substrate
US10700120B2 (en) 2015-01-23 2020-06-30 Vuereal Inc. Micro device integration into system substrate
US10847571B2 (en) 2015-01-23 2020-11-24 Vuereal Inc. Micro device integration into system substrate
US11476216B2 (en) 2015-01-23 2022-10-18 Vuereal Inc. Selective micro device transfer to receiver substrate
US11728306B2 (en) 2015-01-23 2023-08-15 Vuereal Inc. Selective micro device transfer to receiver substrate
US11728302B2 (en) 2015-01-23 2023-08-15 Vuereal Inc. Selective micro device transfer to receiver substrate
US11735545B2 (en) 2015-01-23 2023-08-22 Vuereal Inc. Selective micro device transfer to receiver substrate
US11735546B2 (en) 2015-01-23 2023-08-22 Vuereal Inc. Selective micro device transfer to receiver substrate
US11735547B2 (en) 2015-01-23 2023-08-22 Vuereal Inc. Selective micro device transfer to receiver substrate
US11735623B2 (en) 2015-01-23 2023-08-22 Vuereal Inc. Micro device integration into system substrate
WO2017149521A1 (en) * 2016-03-04 2017-09-08 Vuereal Inc. Micro device integration into system substrate

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