CA1216960A - Boitiers hermetiques pour puces de puissance - Google Patents

Boitiers hermetiques pour puces de puissance

Info

Publication number
CA1216960A
CA1216960A CA000461633A CA461633A CA1216960A CA 1216960 A CA1216960 A CA 1216960A CA 000461633 A CA000461633 A CA 000461633A CA 461633 A CA461633 A CA 461633A CA 1216960 A CA1216960 A CA 1216960A
Authority
CA
Canada
Prior art keywords
power chip
package
bonded
electrode
hermetic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000461633A
Other languages
English (en)
Inventor
Constantine A. Neugebauer
Alexander J. Yerman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Application granted granted Critical
Publication of CA1216960A publication Critical patent/CA1216960A/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/049Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being perpendicular to the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331Disposition
    • H01L2224/3318Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181On opposite sides of the body

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
CA000461633A 1983-09-06 1984-08-23 Boitiers hermetiques pour puces de puissance Expired CA1216960A (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US52929583A 1983-09-06 1983-09-06
US529,295 1990-05-29

Publications (1)

Publication Number Publication Date
CA1216960A true CA1216960A (fr) 1987-01-20

Family

ID=24109306

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000461633A Expired CA1216960A (fr) 1983-09-06 1984-08-23 Boitiers hermetiques pour puces de puissance

Country Status (4)

Country Link
JP (1) JPS6094742A (fr)
CA (1) CA1216960A (fr)
DE (1) DE3432449A1 (fr)
GB (1) GB2146174B (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5148264A (en) * 1990-05-02 1992-09-15 Harris Semiconductor Patents, Inc. High current hermetic package
US5446316A (en) * 1994-01-06 1995-08-29 Harris Corporation Hermetic package for a high power semiconductor device
FR2793350B1 (fr) * 1999-05-03 2003-08-15 St Microelectronics Sa Protection d'une puce semiconductrice
US7138708B2 (en) 1999-09-24 2006-11-21 Robert Bosch Gmbh Electronic system for fixing power and signal semiconductor chips
DE10156626A1 (de) * 2001-11-17 2003-06-05 Bosch Gmbh Robert Elektronische Anordnung
DE19950026B4 (de) * 1999-10-09 2010-11-11 Robert Bosch Gmbh Leistungshalbleitermodul
US6693350B2 (en) 1999-11-24 2004-02-17 Denso Corporation Semiconductor device having radiation structure and method for manufacturing semiconductor device having radiation structure
US6703707B1 (en) 1999-11-24 2004-03-09 Denso Corporation Semiconductor device having radiation structure
JP4479121B2 (ja) 2001-04-25 2010-06-09 株式会社デンソー 半導体装置の製造方法
US8018056B2 (en) 2005-12-21 2011-09-13 International Rectifier Corporation Package for high power density devices
CN111146152B (zh) * 2019-10-30 2021-09-10 苏师大半导体材料与设备研究院(邳州)有限公司 一种半导体封装件

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3125709A (en) * 1960-10-17 1964-03-17 Housing assembly
DE1815799C3 (de) * 1968-12-19 1979-09-13 Siemens Ag, 1000 Berlin Und 8000 Muenchen Anordnung eines Halbleiterbauelementgehäuses
US3646405A (en) * 1969-01-08 1972-02-29 Mallory & Co Inc P R Hermetic seal
DE2213915A1 (de) * 1972-03-22 1973-10-04 Siemens Ag Gehaeuse fuer halbleitersysteme
US3994430A (en) * 1975-07-30 1976-11-30 General Electric Company Direct bonding of metals to ceramics and metals
CH660258A5 (de) * 1983-01-20 1987-03-31 Landis & Gyr Ag Keramikgehaeuse fuer einen hybridschaltkreis.

Also Published As

Publication number Publication date
JPS6094742A (ja) 1985-05-27
DE3432449C2 (fr) 1991-08-22
GB8420944D0 (en) 1984-09-19
DE3432449A1 (de) 1985-04-04
GB2146174B (en) 1987-04-23
JPH0118583B2 (fr) 1989-04-06
GB2146174A (en) 1985-04-11

Similar Documents

Publication Publication Date Title
US4646129A (en) Hermetic power chip packages
US4907067A (en) Thermally efficient power device package
US4249034A (en) Semiconductor package having strengthening and sealing upper chamber
US4410927A (en) Casing for an electrical component having improved strength and heat transfer characteristics
US5577656A (en) Method of packaging a semiconductor device
JPH11330283A (ja) 半導体モジュール及び大型半導体モジュール
US4227036A (en) Composite flanged ceramic package for electronic devices
CA1216960A (fr) Boitiers hermetiques pour puces de puissance
US4627533A (en) Ceramic package for compensated crystal oscillator
US4905075A (en) Hermetic semiconductor enclosure
JPH0129068B2 (fr)
US4266089A (en) All metal flat package having excellent heat transfer characteristics
US5057648A (en) High voltage hybrid package
US20050161778A1 (en) Power module and power module assembly
US3303265A (en) Miniature semiconductor enclosure
JP2001035968A (ja) ボールグリッドアレイを具えるパワー半導体実装パッケージ
EP0517967B1 (fr) Boîtier hermétique à courant fort
US3312540A (en) Method of making an integrated circuit package
EP0190077B1 (fr) Structure d'empaquetage pour une puce semi-conductrice
US3254393A (en) Semiconductor device and method of contacting it
EP0244767A2 (fr) Boîtier hermétique pour semi-conducteur et procédé de fabrication
JPS5892241A (ja) 半導体装置用容器
US5313091A (en) Package for a high power electrical component
JPS62217643A (ja) 混成集積回路素子収納用パツケ−ジ
JP2870501B2 (ja) 半導体装置

Legal Events

Date Code Title Description
MKEX Expiry