BR9910717A - Método de fabricação de um cartão de circuito integrado e cartão obtido - Google Patents

Método de fabricação de um cartão de circuito integrado e cartão obtido

Info

Publication number
BR9910717A
BR9910717A BR9910717-1A BR9910717A BR9910717A BR 9910717 A BR9910717 A BR 9910717A BR 9910717 A BR9910717 A BR 9910717A BR 9910717 A BR9910717 A BR 9910717A
Authority
BR
Brazil
Prior art keywords
card
integrated circuit
manufacturing
module
plate element
Prior art date
Application number
BR9910717-1A
Other languages
English (en)
Inventor
Jean Christophe Fidalgo
Michael Zafrany
Philippe Patrice
Didier Elbaz
Original Assignee
Gemplus Card Int
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus Card Int filed Critical Gemplus Card Int
Publication of BR9910717A publication Critical patent/BR9910717A/pt

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745Mounting details of integrated circuit chips
    • G06K19/07747Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743External electrical contacts
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745Mounting details of integrated circuit chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
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    • H01L2224/161Disposition
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    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
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    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/24225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24226Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/4805Shape
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    • H01L2224/48091Arched
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    • H01L24/42Wire connectors; Manufacturing methods related thereto
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    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15151Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

Resumo da Patente de Invenção para: <B>"MéTODO DE FABRICAçãO DE UM CARTãO DE CIRCUITO INTEGRADO E CARTãO OBTIDO"<D> A invenção diz respeito a um método para a produção de um circuito integrado, incluindo-se a etapa em que o módulo (12) é criado e fixado no corpo de um cartão (20) e provido com um circuito integrado (14) e placas de contato (16). A invenção é caracterizada pelo fato de que a etapa em que o módulo (12) é criado compreende um estágio que consiste em formar fendas em um elemento de placa (26) produzido a partir de um material condutor, em que as fendas definem pelo menos parcialmente as superfícies do elemento de placa (20) que formarão as placas de contato. A invenção também se caracteriza por uma etapa subseq³ente que consiste em cobrir uma face inferior (32) do elemento de placa pelo menos parcialmente com um material adesivo (30) para permitir que o módulo (12) seja fixado ao corpo do cartão (20) em uma etapa posterior.
BR9910717-1A 1998-06-12 1999-05-31 Método de fabricação de um cartão de circuito integrado e cartão obtido BR9910717A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9807602A FR2779851B1 (fr) 1998-06-12 1998-06-12 Procede de fabrication d'une carte a circuit integre et carte obtenue
PCT/FR1999/001268 WO1999066445A1 (fr) 1998-06-12 1999-05-31 Procede de fabrication d'une carte a circuit integre et carte obtenue

Publications (1)

Publication Number Publication Date
BR9910717A true BR9910717A (pt) 2001-01-23

Family

ID=9527470

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9910717-1A BR9910717A (pt) 1998-06-12 1999-05-31 Método de fabricação de um cartão de circuito integrado e cartão obtido

Country Status (11)

Country Link
EP (1) EP1084482B1 (pt)
JP (1) JP2002518751A (pt)
CN (1) CN1305618A (pt)
AT (1) ATE259980T1 (pt)
AU (1) AU4043699A (pt)
BR (1) BR9910717A (pt)
CA (1) CA2333790A1 (pt)
DE (1) DE69914902D1 (pt)
FR (1) FR2779851B1 (pt)
MX (1) MXPA00012220A (pt)
WO (1) WO1999066445A1 (pt)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2828333B1 (fr) * 2000-06-23 2003-11-07 Gemplus Card Int Procede d'isolation electrique de puces comportant des circuits integres par le depot d'une couche isolante
FR2816107B1 (fr) * 2000-10-30 2003-11-28 Gemplus Card Int Module de circuit integre sur film et son procede de fabrication
FR2817656B1 (fr) * 2000-12-05 2003-09-26 Gemplus Card Int Isolation electrique de microcircuits regroupes avant collage unitaire
FR2968431B1 (fr) * 2010-12-06 2012-12-28 Oberthur Technologies Procédé de fabrication d'un dispositif a microcircuit
US9439334B2 (en) 2012-04-03 2016-09-06 X-Card Holdings, Llc Information carrying card comprising crosslinked polymer composition, and method of making the same
US9122968B2 (en) 2012-04-03 2015-09-01 X-Card Holdings, Llc Information carrying card comprising a cross-linked polymer composition, and method of making the same
CN110163327B (zh) 2013-03-15 2023-03-10 X卡控股有限公司 用于制作信息携带卡的芯层的方法以及结果产品
EP3422828A1 (de) * 2017-06-29 2019-01-02 voestalpine Stahl GmbH Verfahren und vorrichtung zur herstellung eines elektrischen anschlusskontakts - kontaktinator
WO2019173455A1 (en) 2018-03-07 2019-09-12 X-Card Holdings, Llc Metal card

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2120861B (en) * 1982-05-27 1985-10-02 Vladimir Iosifovich Livshits Process for manufacturing panels to be used in microelectronic systems
FR2632100B1 (fr) * 1988-05-25 1992-02-21 Schlumberger Ind Sa Procede de realisation d'une carte a memoire electronique et cartes a memoire electronique obtenue par la mise en oeuvre dudit procede
DE4336501A1 (de) * 1993-10-26 1995-04-27 Giesecke & Devrient Gmbh Verfahren zur Herstellung von Ausweiskarten mit elektronischen Modulen
DE4443767A1 (de) * 1994-12-08 1996-06-13 Giesecke & Devrient Gmbh Elektronisches Modul und Datenträger mit elektrischem Modul
FR2740935B1 (fr) * 1995-11-03 1997-12-05 Schlumberger Ind Sa Procede de fabrication d'un ensemble de modules electroniques pour cartes a memoire electronique

Also Published As

Publication number Publication date
CN1305618A (zh) 2001-07-25
CA2333790A1 (fr) 1999-12-23
FR2779851A1 (fr) 1999-12-17
WO1999066445A1 (fr) 1999-12-23
AU4043699A (en) 2000-01-05
ATE259980T1 (de) 2004-03-15
DE69914902D1 (de) 2004-03-25
JP2002518751A (ja) 2002-06-25
FR2779851B1 (fr) 2002-11-29
EP1084482B1 (fr) 2004-02-18
WO1999066445A8 (fr) 2000-02-10
MXPA00012220A (es) 2002-06-04
EP1084482A1 (fr) 2001-03-21

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