BR8900343A - Interface e metodo para comunicacao - Google Patents

Interface e metodo para comunicacao

Info

Publication number
BR8900343A
BR8900343A BR898900343A BR8900343A BR8900343A BR 8900343 A BR8900343 A BR 8900343A BR 898900343 A BR898900343 A BR 898900343A BR 8900343 A BR8900343 A BR 8900343A BR 8900343 A BR8900343 A BR 8900343A
Authority
BR
Brazil
Prior art keywords
interface
communication
Prior art date
Application number
BR898900343A
Other languages
English (en)
Inventor
James Stanley Pogorzelski
Craig Henry Shempert
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR8900343A publication Critical patent/BR8900343A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
BR898900343A 1988-01-29 1989-01-27 Interface e metodo para comunicacao BR8900343A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/149,796 US5014236A (en) 1988-01-29 1988-01-29 Input/output bus expansion interface

Publications (1)

Publication Number Publication Date
BR8900343A true BR8900343A (pt) 1989-09-19

Family

ID=22531834

Family Applications (1)

Application Number Title Priority Date Filing Date
BR898900343A BR8900343A (pt) 1988-01-29 1989-01-27 Interface e metodo para comunicacao

Country Status (6)

Country Link
US (1) US5014236A (pt)
EP (1) EP0325856B1 (pt)
JP (1) JPH01197866A (pt)
AR (1) AR245302A1 (pt)
BR (1) BR8900343A (pt)
DE (1) DE3855300T2 (pt)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04233059A (ja) * 1990-06-25 1992-08-21 Internatl Business Mach Corp <Ibm> 情報処理装置
KR0181471B1 (ko) * 1990-07-27 1999-05-15 윌리암 피.브레이든 컴퓨터 데이타 경로배정 시스템
JPH05120124A (ja) * 1990-10-11 1993-05-18 Lsi Logic Corp マイクロプロセツサ内蔵型のメモリ制御構造
JPH04157550A (ja) * 1990-10-22 1992-05-29 Toshiba Corp パーソナルコンピュータシステム
EP0518488A1 (en) * 1991-06-12 1992-12-16 Advanced Micro Devices, Inc. Bus interface and processing system
US5274783A (en) * 1991-06-28 1993-12-28 Digital Equipment Corporation SCSI interface employing bus extender and auxiliary bus
US5495594A (en) * 1991-07-12 1996-02-27 Zilog, Inc. Technique for automatically adapting a peripheral integrated circuit for operation with a variety of microprocessor control signal protocols
US5229926A (en) * 1992-04-01 1993-07-20 Digital Equipment Corporation Power supply interlock for a distributed power system
EP0568329A1 (en) * 1992-05-01 1993-11-03 Advanced Micro Devices, Inc. Peripheral memory buffer apparatus and method of using same
TW276312B (pt) * 1992-10-20 1996-05-21 Cirrlis Logic Inc
USH1507H (en) * 1993-04-23 1995-12-05 The United States Of America As Represented By The Secretary Of The Navy Demand assigned multiple access (DAMA) device controller interface
US5598514A (en) * 1993-08-09 1997-01-28 C-Cube Microsystems Structure and method for a multistandard video encoder/decoder
US5721841A (en) * 1994-11-04 1998-02-24 Texas Instruments Incorporated Adapter having data aligner including register being loaded to or from memory with an offset in accordance with predetermined network fragmentation parameters
JP3566364B2 (ja) * 1994-12-22 2004-09-15 キヤノン株式会社 データ処理装置及び方法
US5910909A (en) * 1995-08-28 1999-06-08 C-Cube Microsystems, Inc. Non-linear digital filters for interlaced video signals and method thereof
US5764927A (en) * 1995-09-29 1998-06-09 Allen Bradley Company, Inc. Backplane data transfer technique for industrial automation controllers
US6002883A (en) * 1996-07-18 1999-12-14 International Business Machines Corporation System with intersystem information links for intersystem traffic having I/O traffic being transmitted to and from processor bus via processor means
KR100291005B1 (ko) 1998-03-05 2001-07-12 윤종용 알에스-485 다중접속을 위한 팬-아웃확장회로
US7020726B2 (en) * 2001-05-24 2006-03-28 Lsi Logic Corporation Methods and apparatus for signaling to switch between different bus bandwidths
US7124222B2 (en) * 2003-12-16 2006-10-17 1X1 Mobile, Ltd. Control system and method for a communications interface
FR3015068B1 (fr) * 2013-12-18 2016-01-01 Commissariat Energie Atomique Module de traitement du signal, notamment pour reseau de neurones et circuit neuronal

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3725864A (en) * 1971-03-03 1973-04-03 Ibm Input/output control
US4447878A (en) * 1978-05-30 1984-05-08 Intel Corporation Apparatus and method for providing byte and word compatible information transfers
US4417303A (en) * 1981-02-25 1983-11-22 Leeds & Northrup Company Multi-processor data communication bus structure
US4716527A (en) * 1984-12-10 1987-12-29 Ing. C. Olivetti Bus converter
US4727477A (en) * 1985-03-22 1988-02-23 International Business Machines Corp. Logically transportable microprocessor interface control unit permitting bus transfers with different but compatible other microprocessors
JPS61265653A (ja) * 1985-05-20 1986-11-25 Fujitsu Ltd ダイレクトメモリアクセス方式

Also Published As

Publication number Publication date
DE3855300T2 (de) 1996-11-21
JPH01197866A (ja) 1989-08-09
US5014236A (en) 1991-05-07
AR245302A1 (es) 1993-12-30
EP0325856A3 (en) 1990-07-18
EP0325856A2 (en) 1989-08-02
EP0325856B1 (en) 1996-05-15
DE3855300D1 (de) 1996-06-20

Similar Documents

Publication Publication Date Title
BR8900343A (pt) Interface e metodo para comunicacao
DE3855766D1 (de) Kommunikationssystem und Kommunikationsverfahren
DE3676688D1 (de) Frequenzreferenzsystem und -methode.
KR860003524A (ko) 탐사방법 및 장치
BR8604619A (pt) Interface de comunicacao para processador de sinal e metodo para fazer a interface
DE68919977D1 (de) Schachtelschneidevorrichtung und -verfahren.
KR880700715A (ko) 연마장치 및 연마방법
DE69032366D1 (de) Datenübertragungsverfahren
ATE165651T1 (de) Schnee-erzeugungseinrichtung und -verfahren
KR880700319A (ko) 장치 및 그 제조방법
DE68902684D1 (de) Umwickelverfahren und -vorrichtung.
DE3683584D1 (de) Entwicklungsverfahren und -vorrichtung.
DE68927086D1 (de) Datenvereinheitlichungssystem und -methode
IT1207060B (it) Metodo ed apparecchiatura di interfaccia.
ES2019565A4 (es) Procedimiento y dispositivo para peletizar
DE69026924D1 (de) Datenkomprimierungsverfahren
KR860004693A (ko) 조립 부분품의 공급방법 및 장치
DE3855739D1 (de) Nachrichtenübertragungssystem und -verfahren
KR890700405A (ko) 피복장치와 방법
DE3855494D1 (de) Abfragevorrichtung und -methode
DE69023730D1 (de) Kommunikationsvorrichtung und -verfahren.
DE68916020D1 (de) Auftragemethode.
KR900700640A (ko) 일렉트로-슬랙 주조 장치 및 방법
KR890016060A (ko) N2--l-리신 유도체 및 이를 사용한 리시노프릴의 제조방법
KR860005581A (ko) 연체류 양식 방법과 그 장치

Legal Events

Date Code Title Description
FB36 Technical and formal requirements: requirement - article 36 of industrial property law
FA8 Dismissal: dismissal - article 36, par. 1 of industrial property law