BR7806949A - Dispositivo bipolar de alto desempenho e metodo de fabricacao do mesmo - Google Patents
Dispositivo bipolar de alto desempenho e metodo de fabricacao do mesmoInfo
- Publication number
- BR7806949A BR7806949A BR7806949A BR7806949A BR7806949A BR 7806949 A BR7806949 A BR 7806949A BR 7806949 A BR7806949 A BR 7806949A BR 7806949 A BR7806949 A BR 7806949A BR 7806949 A BR7806949 A BR 7806949A
- Authority
- BR
- Brazil
- Prior art keywords
- manufacturing
- high performance
- bipolar device
- performance bipolar
- performance
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53271—Conductive materials containing semiconductor material, e.g. polysilicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42304—Base electrodes for bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/051—Etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/122—Polycrystalline
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/131—Reactive ion etching rie
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/844,769 US4160991A (en) | 1977-10-25 | 1977-10-25 | High performance bipolar device and method for making same |
Publications (1)
Publication Number | Publication Date |
---|---|
BR7806949A true BR7806949A (pt) | 1979-05-15 |
Family
ID=25293582
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR7806949A BR7806949A (pt) | 1977-10-25 | 1978-10-23 | Dispositivo bipolar de alto desempenho e metodo de fabricacao do mesmo |
Country Status (9)
Country | Link |
---|---|
US (1) | US4160991A (pt) |
EP (1) | EP0001550B1 (pt) |
JP (1) | JPS5466076A (pt) |
AU (1) | AU517690B2 (pt) |
BR (1) | BR7806949A (pt) |
CA (1) | CA1097825A (pt) |
DE (1) | DE2861136D1 (pt) |
ES (1) | ES474421A1 (pt) |
IT (1) | IT1159126B (pt) |
Families Citing this family (42)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4277883A (en) * | 1977-12-27 | 1981-07-14 | Raytheon Company | Integrated circuit manufacturing method |
US4157269A (en) * | 1978-06-06 | 1979-06-05 | International Business Machines Corporation | Utilizing polysilicon diffusion sources and special masking techniques |
US4209350A (en) * | 1978-11-03 | 1980-06-24 | International Business Machines Corporation | Method for forming diffusions having narrow dimensions utilizing reactive ion etching |
US4209349A (en) * | 1978-11-03 | 1980-06-24 | International Business Machines Corporation | Method for forming a narrow dimensioned mask opening on a silicon body utilizing reactive ion etching |
US4269636A (en) * | 1978-12-29 | 1981-05-26 | Harris Corporation | Method of fabricating self-aligned bipolar transistor process and device utilizing etching and self-aligned masking |
US4214315A (en) * | 1979-03-16 | 1980-07-22 | International Business Machines Corporation | Method for fabricating vertical NPN and PNP structures and the resulting product |
US4238278A (en) * | 1979-06-14 | 1980-12-09 | International Business Machines Corporation | Polycrystalline silicon oxidation method for making shallow and deep isolation trenches |
US4338622A (en) * | 1979-06-29 | 1982-07-06 | International Business Machines Corporation | Self-aligned semiconductor circuits and process therefor |
US4252582A (en) * | 1980-01-25 | 1981-02-24 | International Business Machines Corporation | Self aligned method for making bipolar transistor having minimum base to emitter contact spacing |
US4309812A (en) * | 1980-03-03 | 1982-01-12 | International Business Machines Corporation | Process for fabricating improved bipolar transistor utilizing selective etching |
US4318751A (en) * | 1980-03-13 | 1982-03-09 | International Business Machines Corporation | Self-aligned process for providing an improved high performance bipolar transistor |
US4319932A (en) * | 1980-03-24 | 1982-03-16 | International Business Machines Corporation | Method of making high performance bipolar transistor with polysilicon base contacts |
US4259680A (en) * | 1980-04-17 | 1981-03-31 | Bell Telephone Laboratories, Incorporated | High speed lateral bipolar transistor |
US4339767A (en) * | 1980-05-05 | 1982-07-13 | International Business Machines Corporation | High performance PNP and NPN transistor structure |
US4691219A (en) * | 1980-07-08 | 1987-09-01 | International Business Machines Corporation | Self-aligned polysilicon base contact structure |
US4758528A (en) * | 1980-07-08 | 1988-07-19 | International Business Machines Corporation | Self-aligned metal process for integrated circuit metallization |
US4409722A (en) * | 1980-08-29 | 1983-10-18 | International Business Machines Corporation | Borderless diffusion contact process and structure |
US4484211A (en) * | 1981-02-04 | 1984-11-20 | Matsushita Electric Industrial Co., Ltd. | Oxide walled emitter |
US4508579A (en) * | 1981-03-30 | 1985-04-02 | International Business Machines Corporation | Lateral device structures using self-aligned fabrication techniques |
DE3277343D1 (en) * | 1982-06-14 | 1987-10-22 | Ibm Deutschland | Method of adjusting the edge angle in polysilicon |
US4464825A (en) * | 1983-02-17 | 1984-08-14 | Harris Corporation | Process for fabrication of high-speed radiation hard bipolar semiconductor devices |
JPS6038873A (ja) * | 1983-08-11 | 1985-02-28 | Rohm Co Ltd | 半導体装置の製造方法 |
US4656050A (en) * | 1983-11-30 | 1987-04-07 | International Business Machines Corporation | Method of producing electronic components utilizing cured vinyl and/or acetylene terminated copolymers |
DE3586341T2 (de) * | 1984-02-03 | 1993-02-04 | Advanced Micro Devices Inc | Bipolartransistor mit in schlitzen gebildeten aktiven elementen. |
US4609934A (en) * | 1984-04-06 | 1986-09-02 | Advanced Micro Devices, Inc. | Semiconductor device having grooves of different depths for improved device isolation |
JPS6146063A (ja) * | 1984-08-10 | 1986-03-06 | Hitachi Ltd | 半導体装置の製造方法 |
US4583282A (en) * | 1984-09-14 | 1986-04-22 | Motorola, Inc. | Process for self-aligned buried layer, field guard, and isolation |
US4574469A (en) * | 1984-09-14 | 1986-03-11 | Motorola, Inc. | Process for self-aligned buried layer, channel-stop, and isolation |
US4568601A (en) * | 1984-10-19 | 1986-02-04 | International Business Machines Corporation | Use of radiation sensitive polymerizable oligomers to produce polyimide negative resists and planarized dielectric components for semiconductor structures |
JPH0658912B2 (ja) * | 1985-05-07 | 1994-08-03 | 日本電信電話株式会社 | バイポーラトランジスタの製造方法 |
US4711017A (en) * | 1986-03-03 | 1987-12-08 | Trw Inc. | Formation of buried diffusion devices |
US4910575A (en) * | 1986-06-16 | 1990-03-20 | Matsushita Electric Industrial Co., Ltd. | Semiconductor integrated circuit and its manufacturing method |
JPH0760809B2 (ja) * | 1987-09-08 | 1995-06-28 | 日本電気株式会社 | 半導体装置の製造方法 |
GR1000174B (el) * | 1989-10-20 | 1991-12-10 | Minas Iosifidis | Επιφανειες εφαρμογης κρεμαστων επιχρισματων. |
US5159429A (en) * | 1990-01-23 | 1992-10-27 | International Business Machines Corporation | Semiconductor device structure employing a multi-level epitaxial structure and method of manufacturing same |
DE4309898B4 (de) * | 1992-03-30 | 2005-11-03 | Rohm Co. Ltd. | Verfahren zur Herstellung eines Bipolartransistors mit einer Polysiliziumschicht zwischen einem Halbleiterbereich und einem Oberflächenelektrodenmetall |
JP3311044B2 (ja) * | 1992-10-27 | 2002-08-05 | 株式会社東芝 | 半導体装置の製造方法 |
US5294558A (en) * | 1993-06-01 | 1994-03-15 | International Business Machines Corporation | Method of making double-self-aligned bipolar transistor structure |
WO1996024160A2 (en) * | 1995-01-30 | 1996-08-08 | Philips Electronics N.V. | Method of manufacturing a semiconductor device with a semiconductor body with field insulation regions provided with recessed connection conductors |
US6063699A (en) * | 1998-08-19 | 2000-05-16 | International Business Machines Corporation | Methods for making high-aspect ratio holes in semiconductor and its application to a gate damascene process for sub- 0.05 micron mosfets |
JP6729999B2 (ja) * | 2015-02-16 | 2020-07-29 | 富士電機株式会社 | 半導体装置 |
US11094806B2 (en) * | 2017-12-29 | 2021-08-17 | Texas Instruments Incorporated | Fabricating transistors with implanting dopants at first and second dosages in the collector region to form the base region |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1457139A (en) * | 1973-09-27 | 1976-12-01 | Hitachi Ltd | Method of manufacturing semiconductor device |
JPS5242670B2 (pt) * | 1973-12-12 | 1977-10-26 | ||
JPS5215262A (en) * | 1975-07-28 | 1977-02-04 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and its manufacturing method |
JPS52117579A (en) * | 1976-03-30 | 1977-10-03 | Nec Corp | Semiconductor device |
JPS5427774A (en) * | 1977-08-03 | 1979-03-02 | Nec Corp | Semiconductor device |
-
1977
- 1977-10-25 US US05/844,769 patent/US4160991A/en not_active Expired - Lifetime
-
1978
- 1978-07-18 CA CA307,631A patent/CA1097825A/en not_active Expired
- 1978-07-28 AU AU38448/78A patent/AU517690B2/en not_active Expired
- 1978-09-06 DE DE7878100830T patent/DE2861136D1/de not_active Expired
- 1978-09-06 EP EP78100830A patent/EP0001550B1/de not_active Expired
- 1978-09-14 JP JP11246978A patent/JPS5466076A/ja active Granted
- 1978-09-27 IT IT28121/78A patent/IT1159126B/it active
- 1978-10-23 BR BR7806949A patent/BR7806949A/pt unknown
- 1978-10-23 ES ES474421A patent/ES474421A1/es not_active Expired
Also Published As
Publication number | Publication date |
---|---|
ES474421A1 (es) | 1979-04-16 |
IT1159126B (it) | 1987-02-25 |
JPS62588B2 (pt) | 1987-01-08 |
EP0001550A1 (de) | 1979-05-02 |
AU3844878A (en) | 1980-01-31 |
IT7828121A0 (it) | 1978-09-27 |
JPS5466076A (en) | 1979-05-28 |
CA1097825A (en) | 1981-03-17 |
AU517690B2 (en) | 1981-08-20 |
EP0001550B1 (de) | 1981-10-07 |
DE2861136D1 (en) | 1981-12-17 |
US4160991A (en) | 1979-07-10 |
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